DM54123 [NSC]
Dual Retriggerable One-Shot with Clear and Complementary Outputs; 双可重触发单稳态具有清零和互补输出
| 型号： | DM54123 |
| 厂家： | 
National Semiconductor |
| 描述： | Dual Retriggerable One-Shot with Clear and Complementary Outputs |
| 文件： | 总6页 (文件大小：133K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
March 1993
DM54123/DM74123 Dual Retriggerable One-Shot with
Clear and Complementary Outputs
General Description
Features
Y
DC triggered from active-high transition or active-low
transition inputs
The ’123 is a dual retriggerable monostable multivibrator
capable of generating output pulses from a few nano-sec-
onds to extremely long duration up to 100% duty cycle.
Each device has three inputs permitting the choice of either
leading-edge or trailing edge triggering. Pin (A) is an active-
low transition trigger input and pin (B) is an active-high tran-
sition trigger input. A low at the clear (CLR) input terminates
the output pulse: which also inhibits triggering. An internal
connection from CLR to the input gate makes it possible to
trigger the circuit by a positive-going signal on CLR as
shown in the truth table.
Y
Y
Y
Y
Y
Retriggerable to 100% duty cycle
Direct reset terminates output pulse
Compensated for V
and temperature variations
CC
DTL, TTL compatible
Input clamp diodes
Functional Description
The basic output pulse width is determined by selection of
an external resistor (R ) and capacitor (C ). Once triggered,
X
X
To obtain the best and trouble free operation from this de-
vice please read the operating rules as well as the NSC
one–shot application notes carefully and observe recom-
mendations.
the basic pulse width may be extended by retriggering the
gated active-low transition or active-high transition inputs or
be reduced by use of the active-low transition clear input.
Retriggering to 100% duty cycle is possible by application of
an input pulse train whose cycle time is shorter than the
output cycle time such that a continuous ‘‘HIGH’’ logic state
is maintained at the ‘‘Q’’ output.
Connection Diagram
Dual-In-Line Package
Triggering Truth Table
Inputs
Response
A
B
CLR
X
X
L
L
X
H
No Trigger
No Trigger
Trigger
K
K
H
H
L
L
L
L
H
X
H
No Trigger
Trigger
L
Trigger
e
e
e
H
L
HIGH Voltage Level
LOW Voltage Level
Immaterial
X
TL/F/6539–1
Order Number DM54123J-MIL, DM54123W-MIL or DM74123N
See NS Package Number J16A, N16A or W16A
C
1995 National Semiconductor Corporation
TL/F/6539
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Supply Voltage
Input Voltage
7V
5.5V
Operating Free Air Temperature Range
DM54
DM74
b
b
a
55 C to 100 C
§
0 C to 70 C
§
a
§
§
a
65 C to 150 C
Storage Temperature
§
§
Recommended Operating Conditions
DM54123
DM74123
Symbol
Parameter
Units
Min
4.5
2
Nom
Max
Min
4.75
2
Nom
Max
V
V
V
Supply Voltage
5
5.5
5
5.25
V
V
CC
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
IH
0.8
0.8
V
IL
b
b
I
I
0.8
0.8
mA
mA
OH
OL
16
16
t
Pulse Width
(Note 5)
A or B High
A or B Low
Clear Low
A or B
40
40
40
W
ns
T
WQ
(Min)
Minimum Width of
Pulse at Q (Note 5)
80
65
50
ns
R
C
C
External Timing Resistor
External Timing Capacitance
Wiring Capacitance
5
0
kX
mF
EXT
No Restriction
EXT
WIRE
50
70
pF
at R Terminal (Note 5)
/C
EXT EXT
b
T
A
Free Air Operating Temperature
55
125
C
§
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
(Note 1)
Symbol
Parameter
Conditions
Min
Max
Units
e
e
e b
e
b
1.5
V
V
Input Clamp Voltage
V
V
V
Min, I
Min, I
12 mA
Max
V
V
I
CC
I
High Level Output
Voltage
DM54
DM74
2.4
2.5
OH
CC
OH
3.4
0.2
e
e
Max, V
Min
IL
IH
e
e
e
e
V
OL
Low Level Output
Voltage
V
CC
V
IH
Min, I
OL
Min, V
Max
Max
0.4
V
IL
@
Input Current Max
Input Voltage
e
e
e
I
I
V
Max, V
5.5V
I
CC
I
I
1
mA
mA
e
2.4V
High Level Input
Current
V
V
Max
Data
40
80
IH
CC
e
I
Clear
Clear
Data
e
b
I
I
I
Low Level Input Current
V
CC
Max, V
0.4V
3.2
1.6
IL
mA
b
e
(Note 2)
b
b
b
Short Circuit
Output Current
V
CC
Max
DM54
DM74
10
10
40
40
OS
mA
mA
b
e
Supply Current
V
CC
Max (Notes 3 and 4)
46
66
CC
e
e
25 C.
Note 1: All typicals are at V
5V, T
§
Note 2: Not more than one output should be shorted at a time.
CC
A
e
e
Note 3: Quiescent I is measured (after clearing) with 2.4V applied to all clear and A inputs, B inputs grounded, all outputs open,C
CC
0.02 mF, and R
EXT
EXT
25 KX.
e
e
25 kX.
Note 4: I is measured in the triggered state with 2.4V applied to all clear and B inputs, A inputs grounded, all outputs open, C
CC
0.02 mF, and R
EXT
EXT
e
e
5V.
Note 5: T
25 C and V
§
A
CC
2
e
e
25 C
Switching Characteristics at V
5V and T
§
CC
A
DM54123
DM74123
From (Input)
To (Output)
e
e
e
e
15 pF, R 400X
L
C
15 pF, R
0 pF, R
400X
C
L
L
L
Symbol
Parameter
Units
e
e
e
C
EXT
e
1000 pF, R 10 KX
EXT
C
5 kX
EXT
Min
EXT
Max
Min
Max
t
t
t
t
t
t
t
Propagation Delay Time
Low to High Level Output
PLH
PLH
PHL
PHL
PLH
PHL
W(out)
A to Q
B to Q
33
33
ns
ns
ns
ns
ns
Propagation Delay Time
Low to High Level Output
28
40
36
40
28
40
36
40
Propagation Delay Time
High to Low Level Output
A to Q
Propagation Delay Time
High to Low Level Output
B to Q
Propagation Delay Time
Low to High Level Output
Clear to Q
Propagation Delay Time
High to Low Level Output
Clear to Q
A or B to Q
27
27
ns
Output Pulse Width*
3.08
3.76
3.08
3.76
ms
e
e
10 kX
*C
1000 pF, R
ECT
EXT
Operating Rules
1. An external resistor (R ) and external capacitor (C ) are
k
curves with R as a parameter:
4. For C
1000 pF see Figure 2 for T vs C family
W X
X
X
X
X
required for proper operation. The value of C may vary
X
from 0 to any necessary value. For small time constants
high-grade mica, glass, polypropylene, polycarbonate, or
polystyrene material capacitors may be used. For large
time constants use tantalum or special aluminum capaci-
tors. If the timing capacitors have leakages approaching
100 nA or if stray capacitance from either terminal to
ground is greater than 50 pF the timing equations may
not represent the pulse width the device generates.
Pulse Width vs R and C
X
X
2. When an electrolytic capacitor is used for C a switching
X
diode is often required for standard TTL one-shots to pre-
vent high inverse leakage current (Figure 1). However, its
use in general is not recommended with retriggerable op-
eration.
l
3. The output pulse width (T ) for C
W
1000 pF is defined
X
as follows:
e
a
0.7/R )
T
K R
C
X
(1
W
X
X
[
]
R is in Kilo-ohm
X
where
TL/F/6539–4
[
[
[
]
is in pico Farad
C
X
FIGURE 2
]
is in nano second
T
W
5. To obtain variable pulse width by remote trimming, the
following circuit is recommended:
&
]
0.28
K
TL/F/6539–3
FIGURE 1
TL/F/6539–5
Note: ‘‘R
’’ should be as close to the one-shot as possible.
remote
FIGURE 3
3
Operating Rules (Continued)
6. The retriggerable pulse width is calculated as shown be-
low:
7. Under any operating condition C and R must be kept
X X
as close to the one-shot device pins as possible to mini-
mize stray capacitance, to reduce noise pick-up, and to
e
a
e
c
c
a
C t
X PLH
T
T
W
t
K
R
X
PLH
c
reduce I
R and Ldi/dt voltage developed along their
The retriggered pulse width is equal to the pulse width
plus a delay time period (Figure 4).
connecting paths. If the lead length from C to pins (6)
X
and (7) or pins (14) and (15) is greater than 3 cm, for
example, the output pulse width might be quite different
from values predicted from the appropriate equations. A
non-inductive and low capacitive path is necessary to en-
sure complete discharge of C in each cycle of its opera-
X
tion so that the output pulse width will be accurate.
8. V
and ground wiring should conform to good high-fre-
CC
quency standards and practices so that switching tran-
sients on the V and ground return leads do not cause
TL/F/6539–6
FIGURE 4
CC
interaction between one-shots. A 0.01 mF to 0.10 mF by-
pass capacitor (disk ceramic or monolithic type) from V
CC
to ground is necessary on each device. Furthermore, the
bypass capacitor should be located as close to the V
pin as space permits.
CC
*For further detailed device characteristics and output performance
please refer to the NSC one-shot application note, AN-366.
4
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number DM54123J-MIL
NS Package Number J16A
Molded Dual-In-Line Package (N)
Order Number DM74123N
NS Package Number N16A
5
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flat Package (W)
Order Number DM54123W-MIL
NS Package Number W16A
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