DM54LS374J [NSC]
TRI-STATEE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops; TRI - STATEE八路D类透明锁存器和边沿触发触发器
| 型号： | DM54LS374J |
| 厂家： | 
National Semiconductor |
| 描述： | TRI-STATEE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops |
| 文件： | 总8页 (文件大小：163K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 1992
DM54LS373/DM74LS373,
DM54LS374/DM74LS374
TRI-STATE Octal D-Type Transparent
Latches and Edge-Triggered Flip-Flops
É
General Description
Features
Y
Choice of 8 latches or 8 D-type flip-flops in a single
package
These 8-bit registers feature totem-pole TRI-STATE outputs
designed specifically for driving highly-capacitive or relative-
ly low-impedance loads. The high-impedance state and in-
creased high-logic level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components. They are particularly attractive
for implementing buffer registers, I/O ports, bidirectional
Y
Y
Y
Y
TRI-STATE bus-driving outputs
Full parallel-access for loading
Buffered control inputs
P-N-P inputs reduce D-C loading on data lines
bus drivers, and working registers.
(Continued)
Connection Diagrams
Dual-In-Line Packages
’LS373
Order Number
DM54LS373J,
DM54LS373W,
DM74LS373N or
DM74LS373WM
See NS Package Number
J20A, M20B, N20A or
W20A
TL/F/6431–1
’LS374
Order Number
DM54LS374J,
DM54LS374W,
DM74LS374WM or
DM74LS374N
See NS Package Number
J20A, M20B, N20A or
W20A
TL/F/6431–2
TRI-STATEÉ is a registered trademark of National Semiconductor Corp.
C
1995 National Semiconductor Corporation
TL/F/6431
RRD-B30M105/Printed in U. S. A.
General Description (Continued)
The eight latches of the DM54/74LS373 are transparent D-
type latches meaning that while the enable (G) is high the Q
outputs will follow the data (D) inputs. When the enable is
taken low the output will be latched at the level of the data
that was set up.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (high or low logic
levels) or a high-impedance state. In the high-impedance
state the outputs neither load nor drive the bus lines signifi-
cantly.
The eight flip-flops of the DM54/74LS374 are edge-trig-
gered D-type flip flops. On the positive transition of the
clock, the Q outputs will be set to the logic states that were
set up at the D inputs.
The output control does not affect the internal operation of
the latches or flip-flops. That is, the old data can be retained
or new data can be entered even while the outputs are off.
Function Tables
DM54/74LS373
DM54/74LS374
Output
Output
Control
Enable
G
D
Output
Clock
D
Output
Control
L
L
H
H
L
H
L
H
L
L
L
H
L
H
L
u
u
L
L
X
X
Q
L
X
X
Q
0
0
H
X
Z
H
X
Z
e
e
Transition from low-to-high level, Z
e
Low Level (Steady State), X Don’t Care
H
High Level (Steady State), L
e
e
The level of the output before steady-state input conditions were established.
High Impedance State
u
e
Q
0
Logic Diagrams
DM54/74LS373
DM54/74LS374
Positive-Edge-Triggered Flip-Flops
Transparent Latches
TL/F/6431–3
TL/F/6431–4
2
Absolute Maximum Ratings (See Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Supply Voltage
7V
7V
Input Voltage
b
b
a
65 C to 150 C
Storage Temperature Range
§
§
Operating Free Air Temperature Range
DM54LS
DM74LS
a
55 C to 125 C
§
0 C to 70 C
§
§
a
§
Recommended Operating Conditions
DM54LS373
DM74LS373
Symbol
Parameter
Units
Min
4.5
2
Nom
Max
Min
4.75
2
Nom
Max
V
V
V
Supply Voltage
5
5.5
5
5.25
V
V
CC
High Level Input Votage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
IH
0.7
0.8
V
IL
b
b
2.6
24
I
I
1
mA
mA
OH
OL
12
t
W
Pulse Width
(Note 2)
Enable High
Enable Low
15
15
15
15
ns
t
t
Data Setup Time (Notes 1 & 2)
Data Hold Time (Notes 1 & 2)
Free Air Operating Temperature
5
5
ns
ns
v
v
SU
20
20
v
55
v
H
b
T
125
0
70
C
§
A
Note 1: The symbol ( ) indicates the falling edge of the clock pulse is used for reference.
v
25 C and V
e
e
5V.
Note 2: T
§
A
CC
’LS373 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
(Note 1)
Symbol
Parameter
Conditions
Min
Max
Units
e
e
e b
Min, I
I
b
1.5
V
V
Input Clamp Voltage
V
V
18 mA
V
I
CC
High Level Output Voltage
Min
Max
Max
Min
DM54
DM74
DM54
DM74
DM74
OH
CC
OH
2.4
2.4
3.4
3.1
e
I
V
e
e
V
V
IL
IH
e
CC
V
OL
Low Level Output Voltage
V
Min
Max
Max
Min
0.25
0.35
0.4
e
e
e
I
OL
V
V
IL
0.5
0.4
V
IH
e
12 mA
e
Min
I
OL
V
CC
@
Input Current Max
Input Voltage
e
e
I
V
Max, V
7V
I
CC
I
0.1
20
mA
e
e
e
e
e
I
I
I
High Level Input Current
Low Level Input Current
V
V
Max, V
Max, V
Max, V
2.7V
0.4V
mA
IH
CC
I
b
0.4
mA
IL
CC
I
e
2.7V
Off-State Output Current
with High Level Output
Voltage Applied
V
CC
V
IH
OZH
O
e
e
Min, V
IL
Max
20
mA
e
Min, V
e
0.4V
Max
I
Off-State Output Current
with Low Level Output
Voltage Applied
V
CC
V
IH
Max, V
O
OZL
e
e
IL
b
20
mA
e
(Note 2)
b
b
b
I
I
Short Circuit
Output Current
V
CC
Max
DM54
DM74
20
50
100
225
OS
CC
mA
b
e
e
GND
Supply Current
V
Max, OC
e
4.5V,
CC
D , Enable
24
40
mA
n
3
e
e
5V and T
A
‘LS373 Switching Characteristics at V
(See Section 1 for Test Waveforms and Output Load)
25 C
§
CC
e
667X
From
R
L
(Input)
e
e
L
Symbol
Parameter
C
45 pF
Max
C
150 pF
Max
Units
L
To
Min
Min
(Output)
t
t
t
t
t
t
t
t
Propagation Delay
Time Low to High
Level Output
Data
to
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
18
18
30
30
28
36
20
25
26
27
38
36
36
50
ns
ns
ns
ns
ns
ns
ns
ns
Q
Propagation Delay
Time High to Low
Level Output
Data
to
Q
Propagation Delay
Time Low to High
Level Output
Enable
to
Q
Propagation Delay
Time High to Low
Level Output
Enable
to
Q
Output Enable
Time to High
Level Output
Output
Control
to Any Q
Output Enable
Time to Low
Level Output
Output
Control
to Any Q
Output Disable
Output
Control
to Any Q
Time from High
Level Output (Note 3)
Output Disable
Output
Control
to Any Q
Time from Low
Level Output (Note 3)
e
e
25 C.
Note 1: All typicals are at V
5V, T
§
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
CC
A
e
Note 3: C
5 pF.
L
Recommended Operating Conditions
DM54LS374
DM74LS374
Symbol
Parameter
Units
Min
4.5
2
Nom
Max
Min
4.75
2
Nom
Max
V
V
V
Supply Voltage
5
5.5
5
5.25
V
V
CC
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
IH
0.7
0.8
V
IL
b
b
I
I
1
2.6
mA
mA
OH
OL
12
24
t
W
Pulse Width
(Note 4)
Clock High
Clock Low
15
15
15
15
ns
t
t
Data Setup Time (Notes 1 & 4)
Data Hold Time (Notes 1 & 4)
20
20
ns
ns
u
u
SU
1
1
u
u
H
b
T
Free Air Operating Temperature
55
125
0
70
C
§
A
Note 1: The symbol ( ) indicates the rising edge of the clock pulse is used for reference.
u
25 C and V
e
e
5V.
Note 4: T
§
A
CC
4
’LS374 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
(Note 1)
Symbol
Parameter
Conditions
e b
Min, I
I
Min
Max
Units
e
e
e
e
e
b
1.5
V
V
Input Clamp Voltage
V
V
18 mA
V
I
CC
High Level Output Voltage
Min
Max
Max
Min
DM54
DM74
2.4
2.4
3.4
3.1
OH
CC
OH
I
V
V
V
IL
IH
e
CC
V
OL
Low Level Output Voltage
V
I
Min
Max
Max
Min
DM54
DM74
0.25
0.35
0.4
e
OL
0.5
e
e
V
V
IL
V
IH
e
I
V
12 mA
Min
DM74
OL
0.25
0.4
e
CC
@
Input Current Max
Input Voltage
e
e
I
V
Max, V
7V
I
CC
I
0.1
20
mA
e
e
e
e
e
I
I
I
High Level Input Current
Low Level Input Current
V
V
Max, V
Max, V
Max, V
2.7V
0.4V
mA
IH
CC
I
b
0.4
mA
IL
CC
I
e
2.7V
Off-State Output
Current with High
Level Output
V
V
OZH
CC
IH
O
e
e
Min, V
IL
Max
20
mA
mA
Voltage Applied
e
e
0.4V
I
Off-State Output
Current with Low
Level Output
V
V
Max, V
O
OZL
CC
IH
e
e
Min, V
Max
IL
b
20
Voltage Applied
e
(Note 2)
b
b
b
I
I
Short Circuit
Output Current
V
Max
DM54
DM74
50
50
225
225
OS
CC
mA
mA
b
e
e
n
e
GND, OC 4.5V
Supply Current
V
CC
Max, D
27
45
CC
e
e
25 C
’LS374 Switching Characteristics at V
(See Section 1 for Test Waveforms and Output Load)
5V and T
§
CC
A
e
R
L
667X
e
e
L
Symbol
Parameter
C
45 pF
Max
C
150 pF
Max
Units
L
Min
35
Min
f
t
Maximum Clock Frequency
20
MHz
ns
MAX
Propagation Delay Time
Low to High Level Output
PLH
28
28
28
28
20
25
32
38
44
44
t
t
t
t
t
Propagation Delay Time
High to Low Level Output
PHL
PZH
PZL
PHZ
PLZ
ns
ns
ns
ns
ns
Output Enable Time
to High Level Output
Output Enable Time
to Low Level Output
Output Disable Time
from High Level Output (Note 3)
Output Disable Time
from Low Level Output (Note 3)
e
e
25 C.
Note 1: All typicals are at V
5V, T
§
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
CC
A
e
Note 3: C
5 pF.
L
5
Physical Dimensions inches (millimeters)
20-Lead Ceramic Dual-In-Line Package (J)
Order Number DM54LS373J or DM54LS374J
NS Package Number J20A
6
Physical Dimensions inches (millimeters) (Continued)
20-Lead Wide Small Outline Molded Package (M)
Order Number DM74LS373WM or DM74LS374WM
NS Package Number M20B
20-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS373N and DM74LS374N
NS Package Number N20A
7
Physical Dimensions inches (millimeters) (Continued)
20-Lead Ceramic Flat Package (W)
Order Number DM54LS373W or DM54LS374W
NS Package Number W20A
LIFE SUPPORT POLICY
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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