DM54LS74AW [NSC]
Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs; 双上升沿触发D触发器与预置，清除和互补输出
| 型号： | DM54LS74AW |
| 厂家： | 
National Semiconductor |
| 描述： | Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs |
| 文件： | 总6页 (文件大小：139K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
June 1989
54LS74/DM54LS74A/DM74LS74A
Dual Positive-Edge-Triggered D Flip-Flops
with Preset, Clear and Complementary Outputs
General Description
This device contains two independent positive-edge-trig-
gered D flip-flops with complementary outputs. The informa-
tion on the D input is accepted by the flip-flops on the posi-
tive going edge of the clock pulse. The triggering occurs at a
voltage level and is not directly related to the transition time
of the rising edge of the clock. The data on the D input may
be changed while the clock is low or high without affecting
the outputs as long as the data setup and hold times are not
violated. A low logic level on the preset or clear inputs will
set or reset the outputs regardless of the logic levels of the
other inputs.
Features
Y
Alternate military/aerospace device (54LS74) is avail-
able. Contact a National Semiconductor Sales Office/
Distributor for specifications.
Connection Diagram
Dual-In-Line Package
TL/F/6373–1
Order Number 54LS74DMQB, 54LS74FMQB, 54LS74LMQB,
DM54LS74AJ, DM54LS74AW, DM74LS74AM or DM74LS74AN
See NS Package Number E20A, J14A, M14A, N14A or W14B
Function Table
Inputs
CLR
Outputs
PR
CLK
D
Q
Q
L
H
L
H
L
X
X
X
X
X
H
L
H
L
L
H
L
X
H*
H
H*
L
H
H
H
H
H
H
u
u
L
L
H
X
Q
0
Q
0
e
e
e
H
X
L
High Logic Level
Either Low or High Logic Level
Low Logic Level
e
Positive-going Transition
u
*
e
This configuration is nonstable; that is, it will not persist when either the preset
and/or clear inputs return to their inactive (high) level.
e
Q
The output logic level of Q before the indicated input conditions were established.
0
C
1995 National Semiconductor Corporation
TL/F/6373
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Supply Voltage
Input Voltage
7V
7V
Operating Free Air Temperature Range
DM54LS and 54LS
DM74LS
b
b
a
a
55 C to 125 C
§
§
0 C to 70 C
§
§
a
65 C to 150 C
Storage Temperature Range
§
§
Recommended Operating Conditions
DM54LS74A
DM74LS74A
Symbol
Parameter
Units
Min
4.5
2
Nom
Max
Min
4.75
2
Nom
Max
V
V
V
Supply Voltage
5
5.5
5
5.25
V
V
CC
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
Clock Frequency (Note 2)
Clock Frequency (Note 3)
IH
0.7
0.8
V
IL
b
b
0.4
I
I
0.4
mA
mA
MHz
MHz
OH
OL
4
8
f
f
t
0
25
20
0
25
20
CLK
CLK
W
0
0
Pulse Width
(Note 2)
Clock High
18
15
15
25
20
20
18
15
15
25
20
20
Preset Low
Clear Low
Clock High
Preset Low
Clear Low
ns
ns
t
W
Pulse Width
(Note 3)
t
t
t
Setup Time (Notes 1 and 2)
Setup Time (Notes 1 and 3)
Hold Time (Note 1 and 4)
20
20
ns
ns
ns
u
u
u
u
SU
SU
H
25
0
25
0
u
u
b
T
Free Air Operating Temperature
55
125
0
70
C
§
A
Note 1: The symbol ( ) indicates the rising edge of the clock pulse is used for reference.
u
L
e
e
e
e
e
e
e
e
e
Note 2: C
Note 3: C
Note 4: T
15 pF, R
2 kX, T
2 kX, T
25 C, and V
§
25 C, and V
§
5V.
5V.
L
A
A
CC
CC
50 pF, R
L
L
e
CC
25 C and V
§
5V.
A
2
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol
Parameter
Conditions
Min
Max
Units
(Note 1)
e
e
e b
e
b
1.5
V
V
Input Clamp Voltage
V
Min, I
Min, I
18 mA
V
V
I
CC
I
High Level Output
Voltage
V
V
Max
Min
DM54
DM74
DM54
DM74
DM74
Data
2.5
2.7
3.4
3.4
OH
CC
OH
e
e
Max, V
IL
IH
e
e
e
V
OL
Low Level Output
Voltage
V
V
Min, I
Max
Min
0.25
0.35
0.25
0.4
CC
OL
e
Max, V
IH
IL
0.5
0.4
0.1
0.1
0.2
0.2
20
V
e
e
Min
I
4 mA, V
CC
OL
@
Input Current Max
e
CC
I
I
I
V
Max
I
e
Input Voltage
V
I
7V
Clock
Preset
Clear
Data
mA
e
High Level Input
Current
V
V
Max
Max
Max
IH
CC
e
2.7V
I
Clock
Clear
Preset
Data
20
mA
40
40
e
b
Low Level Input
Current
V
V
0.4
0.4
0.8
0.8
100
100
8
IL
CC
e
0.4V
I
b
b
b
Clock
Preset
Clear
DM54
DM74
mA
e
b
b
b
b
I
I
Short Circuit
V
CC
20
20
OS
CC
mA
mA
Output Current
(Note 2)
e
Supply Current
V
CC
Max (Note 3)
4
e
e
25 C.
Note 1: All typicals are at V
5V, T
§
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. For devices, with feedback from the outputs, where
CC
A
e
shorting the outputs to ground may cause the outputs to change logic state an equivalent test may be performed where V
2.25V and 2.125V for DM54 and
O
DM74 series, respectively, with the minimum and maximum limits reduced by one half from their stated values. This is very useful when using automatic test
equipment.
Note 3: With all outputs open, I
CC
is measured with CLOCK grounded after setting the Q and Q outputs high in turn.
e
e
25 C (See Section 1 for Test Waveforms and Output Load)
Switching Characteristics at V
5V and T
A
§
CC
e
R
2 kX
L
From (Input)
To (Output)
e
e
L
Symbol
Parameter
C
Min
25
15 pF
C
50 pF
Max
Units
L
Max
Min
f
t
Maximum Clock Frequency
20
MHz
ns
MAX
Propagation Delay Time
Low to High Level Output
Clock to
Q or Q
PLH
25
30
25
30
25
30
35
35
35
35
35
35
t
t
t
t
t
Propagation Delay Time
High to Low Level Output
Clock to
Q or Q
PHL
PLH
PHL
PLH
PHL
ns
ns
ns
ns
ns
Propagation Delay Time
Low to High Level Output
Preset
to Q
Propagation Delay Time
High to Low Level Output
Preset
to Q
Propagation Delay Time
Low to High Level Output
Clear
to Q
Propagation Delay Time
High to Low Level Output
Clear
to Q
3
Physical Dimensions inches (millimeters)
Ceramic Leadless Chip Carrier Package (E)
Order Number 54LS74LMQB
NS Package Number E20A
14-Lead Ceramic Dual-In-Line Package (J)
Order Number 54LS74DMQB or DM54LS74AJ
NS Package Number J14A
4
Physical Dimensions inches (millimeters) (Continued)
14-Lead Small Outline Molded Package (M)
Order Number DM74LS74AM
NS Package Number M14A
14-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS74AN
NS Package Number N14A
5
Physical Dimensions inches (millimeters) (Continued)
14-Lead Ceramic Flat Package (W)
Order Number 54LS74FMQB or DM54LS74AW
NS Package Number W14B
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NSC
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