DM74LS259WM [NSC]
8-Bit Addressable Latches; 8位可寻址锁存器
| 型号： | DM74LS259WM |
| 厂家： | 
National Semiconductor |
| 描述： | 8-Bit Addressable Latches |
| 文件： | 总6页 (文件大小：156K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 1992
DM54LS259/DM74LS259 8-Bit Addressable Latches
General Description
Features
Y
8-Bit parallel-out storage register performs serial-to-par-
allel conversion with storage
Asynchronous parallel clear
Active high decoder
These 8-bit addressable latches are designed for general
purpose storage applications in digital systems. Specific
uses include working registers, serial-holding registers, and
active-high decoders or demultiplexers. They are multifunc-
tional devices capable of storing single-line data in eight
addressable latches, and being a 1-of-8 decoder or demulti-
plexer with active-high outputs.
Y
Y
Y
Y
Y
Y
Y
Enable/disable input simplifies expansion
Direct replacement for Fairchild 9334
Expandable for N-bit applications
Four distinct functional modes
Typical propagation delay times:
Enable-to-output 18 ns
Four distinct modes of operation are selectable by control-
ling the clear and enable inputs as enumerated in the func-
tion table. In the addressable-latch mode, data at the data-
in terminal is written into the addressed latch. The ad-
dressed latch will follow the data input with all unaddressed
latches remaining in their previous states. In the memory
mode, all latches remain in their previous states and are
unaffected by the data or address inputs. To eliminate the
possibility of entering erroneous data in the latches, the en-
able should be held high (inactive) while the address lines
are changing. In the 1-of-8 decoding or demultiplexing
mode, the addressed output will follow the level of the D
input with all other outputs low. In the clear mode, all out-
puts are low and unaffected by the address and data inputs.
Data-to-output 16 ns
Address-to-output 21 ns
Clear-to-output 17 ns
Y
Fan-out
I
(sink current)
OL
54LS259 4 mA
74LS259 8 mA
(source current) 0.4 mA
b
I
OH
Y
Typical I
22 mA
CC
Connection Diagram
Function Table
Inputs
Output of Each
Addressed Other
Dual-In-Line Package
Function
Latch
Output
Clear
E
H
H
L
L
H
L
D
Q
Q
L
Addressable Latch
Memory
8-Line Demultiplexer
Clear
i0
Q
i0
i0
D
L
L
H
L
Latch Selection Table
Select Inputs
B
Latch
Addressed
C
A
L
L
L
L
L
H
H
L
L
H
L
H
L
0
1
2
3
4
5
6
7
L
H
H
H
H
L
H
H
H
L
H
TL/F/6418–1
Order Number DM54LS259E, DM54LS259J,
DM54LS259W, DM74LS259M,
DM74LS259WM or DM74LS259N
See NS Package Number E20A, J16A,
M16A, M16B, N16E or W16A
e
e
e
Low Level
H
D
Q
High Level, L
the Level of the Data Input
e
e
0, 1, . . . 7, as Appropriate) before the Indicated
the Level of Q (i
i
i0
Steady-State Input Conditions Were Established.
C
1995 National Semiconductor Corporation
TL/F/6418
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Supply Voltage
Input Voltage
7V
7V
Operating Free Air Temperature Range
DM54
DM74LS
b
b
a
55 C to 125 C
§
0 C to 70 C
§
a
§
§
a
65 C to 150 C
Storage Temperature Range
§
§
Recommended Operating Conditions
DM54LS259
DM74LS259
Symbol
Parameter
Units
Min
4.5
2
Nom
Max
Min
4.75
2
Nom
Max
V
V
V
Supply Voltage
5
5.5
5
5.25
V
V
CC
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
IH
0.7
0.8
V
IL
b
b
0.4
I
I
0.4
mA
mA
OH
OL
4
8
t
t
t
Pulse Width
(Note 7)
Enable
17
17
15
15
W
SU
H
ns
ns
ns
Clear
Data
Setup Time
(Notes 1, 2, 3 & 7)
20
15
u
v
u
Select
Data
15
5
15
v
Hold Time
(Notes 1, 2 & 7)
2.5
u
u
u
u
Select
0
2.5
b
T
Free Air Operating Temperature
55
125
0
70
C
§
A
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Typ
(Note 4)
Symbol
Parameter
Conditions
Min
Max
Units
e
e
e b
e
b
1.5
V
V
Input Clamp Voltage
V
Min, I
Min, I
18 mA
V
V
I
CC
I
High Level Output
Voltage
V
V
Max
Min
DM54
DM74
DM54
DM74
DM74
DM74
DM54
2.5
2.7
OH
CC
OH
e
e
Max, V
IL
IH
3.4
e
e
e
V
OL
Low Level Output
Voltage
V
V
Min, I
Max
Min
0.4
CC
OL
e
Max, V
IH
IL
0.35
0.25
0.5
0.4
V
e
e
I
4 mA, V
CC
Min
OL
@
Input Current Max
Input Voltage
e
e
e
I
I
V
CC
Max, V
V
7V
10V
I
I
0.1
20
mA
e
e
e
e
e
I
I
High Level Input
Current
V
V
Max, V
Max, V
2.7V
IH
CC
I
I
I
mA
Low Level Input
Current
0.4V
0.4V
IL
CC
b
0.4
mA
e
e
b
Enable
V
V
Max, V
Max
0.8
100
100
CC
b
b
b
b
I
I
Short Circuit
Output Current
DM54
DM74
20
20
OS
CC
mA
mA
(Note 5)
e
Supply Current
V
CC
Max (Note 6)
22
36
CC
Note 1: The symbols (
,
v u
Note 2: Setup and hold times are with reference to the enable input.
) indicate the edge of the clock pulse used for reference:
for rising edge,
for falling edge.
u
v
Note 3: The select-to-enable setup time is the time before the High-to-Low enable transition that the select must be stable so that the correct latch is selected and
the others not affected.
e
e
25 C.
Note 4: All typicals are at V
CC
5V, T
§
A
Note 5: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 6: I is measured with all inputs at 4.5V, and all outputs open.
CC
e
e
5V.
Note 7: T
25 C and V
§
A
CC
2
e
e
25 C
Switching Characteristics at V
5V and T
§
CC
A
DM54LS
DM74LS
e
e
From (Input)
To (Output)
C
50 pF
L
e
Symbol
Parameter
C
15 pF
Max
Units
L
R
2 kX
L
Min
Min
Max
t
t
t
t
t
t
t
Propagation Delay Time
Low to High Level Output
Enable to
Output
PLH
PHL
PLH
PHL
PLH
PHL
PHL
27
24
30
20
30
29
18
38
32
35
30
41
38
36
ns
ns
ns
ns
ns
ns
ns
Propagation Delay Time
High to Low Level Output
Enable to
Output
Propagation Delay Time
Low to High Level Output
Data to
Output
Propagation Delay Time
High to Low Level Output
Data to
Output
Propagation Delay Time
Low to High Level Output
Select to
Output
Propagation Delay Time
High to Low Level Output
Select to
Output
Propagation Delay Time
High to Low Level Output
Clear to
Output
Physical Dimensions inches (millimeters)
Ceramic Leadless Chip Carrier (E)
Order Number DM54LS259E
NS Package Number E20A
3
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number DM54LS259J
NS Package Number J16A
16-Lead Molded Package Small Outline (SO)
Order Number DM74LS259M
NS Package Number M16A
4
Physical Dimensions inches (millimeters) (Continued)
16-Lead Wide Small Outline Molded Package (M)
Order Number DM74LS259WM
NS Package Number M16B
16-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS259N
NS Package Number N16E
5
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flat Package (W)
Order Number DM54LS259W
NS Package Number W16A
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with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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