DM74LS461 [NSC]
Octal Counter; 八进制计数器
| 型号： | DM74LS461 |
| 厂家： | 
National Semiconductor |
| 描述： | Octal Counter |
| 文件： | 总4页 (文件大小：123K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
July 1989
DM54LS461/DM74LS461 Octal Counter
General Description
The LS461 is an 8-bit synchronous counter with parallel
Two or more LS461 octal counters may be cascaded to
provide larger counters. The operation codes were chosen
load, clear, and hold capability. Two function select inputs
(I , I ) provide one of four operations which occur synchro-
such that when I is HIGH, I may be used to select be-
1 0
tween LOAD and INCREMENT as in a program counter
(JUMP/INCREMENT).
0
1
nously on the rising edge of the clock (CK).
The LOAD operation loads the inputs (D –D ) into the out-
7
0
put register (Q –Q ). The CLEAR operation resets the out-
7
0
Features/Benefits
Y
put register to all LOWs. The HOLD operation holds the
previous value regardless of clock transitions. The INCRE-
MENT operation adds one to the output register when the
Octal counter for microprogram-counter, DMA controller
and general purpose counting applications
e
carry-in input is TRUE (CI
is a HOLD. The carry-out (CO) is TRUE (CO
the output register (Q –Q ) is all HIGHs, otherwise FALSE
LOW), otherwise the operation
Y
8 bits match byte boundaries
e
LOW) when
Y
Bus-structured pinout
7
0
Y
24-pin Skinny Dip saves space
e
(CO
HIGH).
Y
TRI-STATE outputs drive bus lines
É
Low current PNP inputs reduce loading
The output register (Q –Q ) is enabled when OE is LOW,
0
7
Y
and disabled (HI-Z) when OE is HIGH. The output drivers
will sink the 24 mA required for many bus interface stand-
ards.
Y
Expandable in 8-bit increments
Connection Diagram
Standard Test Load
Top View
TL/L/8334–2
TL/L/8334–1
Order Number DM54LS461J,
DM74LS461J or DM74LS461N
See NS Package Number J24F or N24C
Function Table
OE CK I1 I0 CI D7–D0 Q7–Q0
Operation
H
L
L
L
L
L
X
X
L
X
L
X
X
X
X
H
L
X
X
X
D
X
X
Z
L
HI-Z
CLEAR
HOLD
LOAD
HOLD
u
u
u
u
u
L
H
L
Q
D
Q
H
H
H
H
H
Q plus 1 INCREMENT
TRI-STATEÉ is a registered trademark of National Semiconductor Corp.
C
1995 National Semiconductor Corporation
TL/L/8334
RRD-B30M115/Printed in U. S. A.
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Off-State Output Voltage
Storage Temperature
5.5V
b
a
65 C to 150 C
§
§
Supply Voltage V
Input Voltage
7V
CC
5.5V
Operating Conditions
Military
Commercial
Symbol
Parameter
Units
Min
Typ
Max
5.5
Min
4.75
0
Typ
Max
5.25
75
V
T
Supply Voltage
4.5
5
5
V
CC
b
Operating Free-Air Temperature
55
125*
C
§
A
Low
40
35
25
50
0
t
Width of Clock
ns
W
High
30
60
0
t
t
Set Up Time
Hold Time
SU
ns
b
b
15
15
h
*Case Temperature
Electrical Characteristics Over Operating Conditions
²
Symbol
Parameter
Test Conditions
Min
Typ
Max
0.8
Units
V
V
V
V
Low-Level Input Voltage
High-Level Input Voltage
Input Clamp Voltage
IL
2
V
IH
IC
e
eb
I
I
b
1.5
V
MIN
MAX
MAX
MAX
18 mA
V
CC
e
e
e
e
b
0.25
25
I
I
I
Low-Level Input Current
High-Level Input Current
Maximum Input Current
V
CC
V
CC
V
CC
V
I
V
I
V
I
0.4V
2.4V
5.5V
mA
mA
mA
IL
e
e
IH
I
1
e
V
MIN
CC
e
e
MIL
I
I
I
I
12 mA
24 mA
V
Low-Level Output Voltage
OL
OL
OH
OH
0.5
V
OL
e
V
0.8V
IL
e
V
2V
IH
COM
MIL
e
V
CC
MIN
eb
eb
2 mA
V
High-Level Output Voltage
2.4
V
OH
e
V
0.8V
IL
e
V
2V
IH
COM
3.2 mA
e
V
MAX
CC
e
b
V
0.4V
100
mA
O
O
e
V
IL
I
I
I
I
Off-State Output Current
0.8V
OZL
OZH
OS
e
V
2V
IH
e
V
2.4V
100
mA
mA
mA
e
e
e
V
CC
b
b
Output Short-Circuit Current*
V
5.0V
0V
30
130
CC
Supply Current
V
CC
MAX
120
180
CC
*No more than one output should be shorted at a time and duration of the short-circuit should not exceed one second
e
e
25 C.
²
All typical values are at V
5V, T
§
CC
A
Switching Characteristics Over Operating Conditions
Test Conditions
Military
Typ
Commercial
Typ
Symbol
Parameter
Units
(See Test Load)
Min
Max
Min
Max
f
t
t
t
t
t
Maximum Clock Frequency
CBI to CBO Delay
Clock to Q
10.5
12.5
MHz
ns
MAX
35
20
55
35
35
60
35
95
55
55
35
20
55
35
35
50
30
80
45
45
PD
e
C
50 pF
200 X
390 X
L
ns
PD
e
e
R
R
1
2
Clock to CO
ns
PD
Output Enable Delay
Output Disable Delay
ns
PZX
PXZ
ns
2
Logic Diagram
LS461
TL/L/8334–3
3
Physical Dimensions inches (millimeters)
24-Pin Narrow Ceramic Dual-In-Line Package (J)
Order Number DM54LS461J or DM74LS461J
NS Package J24F
24-Pin Narrow Plastic Dual-In-Line Package (N)
Order Number DM74LS461N
NS Package N24C
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