DS26F31MQML [NSC]

Quad High Speed Differential Line Drivers; 四路高速差分线路驱动器
DS26F31MQML
型号: DS26F31MQML
厂家: National Semiconductor    National Semiconductor
描述:

Quad High Speed Differential Line Drivers
四路高速差分线路驱动器

驱动器
文件: 总11页 (文件大小:646K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
March 2006  
DS26F31MQML  
Quad High Speed Differential Line Drivers  
The DS26F31M offers optimum performance when used  
with the DS26F32 Quad Differential Line Receiver.  
General Description  
The DS26F31M is a quad differential line driver designed for  
digital data transmission over balanced lines. The  
DS26F31M meets all the requirements of EIA Standard RS-  
422 and Federal Standard 1020. It is designed to provide  
unipolar differential drive to twisted-pair or parallel-wire  
transmission lines.  
Features  
n Operation from single +5.0V supply  
n Outputs won’t load line when VCC = 0V  
n Output short circuit protection  
n Meets the requirements of EIA standard RS-422  
n High output drive capability for 100terminated  
transmission lines  
The DS26F31M offers improved performance due to the use  
of state-of-the-art L-FAST bipolar technology. The L-FAST  
technology allows for higher speeds and lower currents by  
utilizing extremely short gate delay times. Thus, the  
DS26F31M features lower power, extended temperature  
range, and improved specifications.  
The circuit provides an enable and disable function common  
to all four drivers. The DS26F31M features TRI-STATE®  
outputs and logical OR-ed complementary enable inputs.  
The inputs are all LS compatible and are all one unit load.  
Ordering Information  
NS Part Number  
DS26F31ME/883  
DS26F31MJ/883  
DS26F31MW/883  
DS26F31MWG/883  
DS26F31MJ-QMLV  
DS26F31MJFQMLV  
SMD Part Number  
5962–7802302M2A  
5962–7802302MEA  
5962–7802302MFA  
5962–7802302MZA  
5962–7802302VEA  
5962F7802302VEA  
300k rd(Si)  
NS Package Number  
Package Description  
20LD Leadless Chip Carrier  
16LD Ceramic DIP  
E20A  
J16A  
W16A  
WG16A  
J16A  
16LD Ceramic FlatPack  
16LD Ceramic SOIC  
16LD Ceramic DIP  
J16A  
16LD Ceramic DIP  
DS26F31MW-QMLV  
DS26F31MWFQMLV  
5962–7802302VFA  
5962F7802302VFA  
300k rd(Si)  
W16A  
W16A  
16LD Ceramic FlatPack  
16LD Ceramic FlatPack  
DS26F31MWGFQMLV  
5962F7802302VZA  
300k rd(Si)  
WG16A  
16LD Ceramic SOIC  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 2006 National Semiconductor Corporation  
DS201632  
www.national.com  
Connection and Logic Diagrams  
20-Lead Ceramic Leadless Chip Carrier (E)  
16-Lead Ceramic DIP Pictured  
20163207  
See NS Package Number E20A  
20163201  
Top View  
See NS Package Numbers J16A, W16A, or WG16A  
20163202  
FIGURE 1. Logic Symbol  
www.national.com  
2
Absolute Maximum Ratings (Note 1)  
Storage Temperature Range  
Lead Temperature (Soldering, 60 sec.)  
Supply Voltage  
−65˚C TA +175˚C  
300˚C  
7.0V  
Input Voltage  
7.0V  
Output Voltage  
5.5V  
Maximum Power Dissipation at 25˚C (Note 3)  
Thermal Resistance  
450mW  
θJA  
@
Ceramic DIP, derate above +25˚C 11.4mW/˚C  
88˚C/mW  
151˚C/mW  
81˚C/mW  
@
Ceramic Flatpack, derate above +25˚C 6.6 mW/˚C  
@
Leadless Chip Carrier, derate above +25˚C 12.3 mW/˚C  
θJC  
Ceramic DIP  
14˚C/mW  
13˚C/mW  
15˚C/mW  
Ceramic Flatpack  
Leadless Chip Carrier  
Recommended Operating Range  
Temperature  
−55˚C TA +125˚C  
Supply Voltage  
4.5V to 5.5V  
Radiation Features  
DS26F31MJFQMLV  
DS26F31MWFQMLV  
DS26F31MWGFQMLV  
300 krads (Si)  
300 krads (Si)  
300 krads (Si)  
Quality Conformance Inspection  
Mil-Std-883, Method 5005 - Group A  
Subgroup  
Description  
Static tests at  
Temp ˚C  
25  
1
2
Static tests at  
125  
-55  
25  
3
Static tests at  
4
Dynamic tests at  
Dynamic tests at  
Dynamic tests at  
Functional tests at  
Functional tests at  
Functional tests at  
Switching tests at  
Switching tests at  
Switching tests at  
Settling time at  
Settling time at  
Settling time at  
5
125  
-55  
25  
6
7
8A  
8B  
9
125  
-55  
25  
10  
11  
12  
13  
14  
125  
-55  
25  
125  
-55  
3
www.national.com  
DS26F31M Electrical Characteristics  
DC Parameters (Note 8)  
Sub-  
groups  
1, 2, 3  
1, 2, 3  
1, 2, 3  
Symbol  
Parameter  
Conditions  
Notes  
Min Max  
Units  
VIH  
Logical "1" Input Voltage  
Logical "0" Input Voltage  
Logical "1" Output Voltage  
VCC = 4.5V  
(Note 4)  
(Note 4)  
2.0  
0.8  
2.5  
V
V
V
VIL  
VCC = 5.5V  
VOH  
VCC = 4.5V, IOH = -20mA,  
VIL = 0.8V, VIH = 2V  
VCC = 4.5V, IOL = 20mA,  
VIL = 0.8V, VIH = 2V  
VCC = 5.5V, VI = 2.7V  
VCC = 5.5V, VI = 0.4V  
VCC = 5.5V, VI = 7V  
VCC = 5.5V, VO = 0.5V  
VCC = 5.5V, VO = 2.5V  
VCC = 4.5V, II = -18mA  
VCC = 5.5V, VO = 0V  
VCC = 5.5V, VO = 0V  
VCC = 5.5V, VI = 0.8V or 2V,  
VEn = 0.8V, VEn = 2V  
VCC = 5.5V, VEn = 2V,  
VEn = 0.8V  
VOL  
Logical "0" Output Voltage  
0.5  
V
1, 2, 3  
IIH  
IIL  
II  
Logical "1" Input Current  
Logical "0" Input Current  
Input Reverse Current  
(Note 7)  
(Note 7)  
(Note 7)  
-2.0  
20  
µA  
µA  
mA  
µA  
µA  
V
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
100 -200  
-0.01 0.1  
IOZ  
TRI-STATE Output Current  
-20  
20  
VI  
Input Clamp Voltage  
-1.5  
ISC Min  
ISC Max  
ICC Dis  
Output Short Circuit Current  
Output Short Circuit Current  
Power Supply Current  
-30  
mA  
mA  
mA  
-150  
50  
ICC En  
Power Supply Current  
40  
mA  
1, 2, 3  
AC Parameters - Propagation Delay Time  
The following conditions apply, unless otherwise specified.  
AC:  
VCC = 5V, CL = 50pF or equivalent impedance provided by diode load  
Parameter Conditions  
Input to Output  
Sub-  
groups  
9
Symbol  
Notes  
Min Max  
Units  
tPLH  
(Note 5)  
(Note 5)  
(Note 6)  
(Note 6)  
(Note 5)  
(Note 5)  
(Note 6)  
(Note 6)  
(Note 5)  
(Note 5)  
(Note 6)  
(Note 6)  
(Note 5)  
(Note 5)  
(Note 6)  
(Note 6)  
(Note 5)  
(Note 5)  
(Note 6)  
(Note 6)  
16  
24  
15  
23  
17  
25  
15  
23  
38  
56  
35  
53  
23  
30  
20  
27  
28  
40  
25  
37  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
10, 11  
9
CL = 30pF  
10, 11  
9
tPHL  
Input to Output  
Disable Time  
Disable Time  
Enable Time  
10, 11  
9
CL = 30pF  
10, 11  
9
tLZ  
10, 11  
9
CL = 10 pF  
CL = 10 pF  
CL = 30pF  
10, 11  
9
tHZ  
10, 11  
9
10, 11  
9
tZL  
10, 11  
9
10, 11  
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4
DS26F31M Electrical Characteristics (Continued)  
AC Parameters - Propagation Delay Time (Continued)  
The following conditions apply, unless otherwise specified.  
AC:  
VCC = 5V, CL = 50pF or equivalent impedance provided by diode load  
Parameter Conditions  
Enable Time  
Sub-  
groups  
9
Symbol  
Notes  
Min Max  
Units  
tZH  
(Note 5)  
(Note 5)  
(Note 6)  
(Note 6)  
(Note 5)  
(Note 5)  
(Note 6)  
(Note 6)  
32  
52  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
nS  
10, 11  
9
CL = 30 pF  
30  
50  
10, 11  
9
Skew  
Output to Output  
6.0  
9.0  
4.5  
7.0  
10, 11  
9
CL = 30pF  
10, 11  
DC Drift Parameters  
This section applies to -QMLV devices only and shall be read & recorded at TA = +25˚C before and after each burn-in & Sub-  
group B5, and shall not change by more than the limits indicated. The delta rejects shall be included in the PDA calculations.  
Sub-  
groups  
Symbol  
VOH  
Parameter  
Conditions  
Notes  
Min Max  
Units  
Logical "1" Output Voltage  
VCC = 4.5V, IOH = -20mA,  
VIL = 0.8V, VIH = 2V.  
-250 250  
mV  
1
VOL  
Logical "0" Output Voltage  
Power Supply Current  
Power Supply Current  
VCC = 4.5V, IOL = 20mA,  
VIL = 0.8V, VIH = 2V.  
-50  
-8.0  
-8.0  
50  
8.0  
8.0  
mV  
mA  
mA  
1
1
1
ICC En  
ICC Dis  
VCC = 5.5V, VI = 0.8V or 2V,  
VEn = 2V, VEn = 0.8V.  
VCC = 5.5V, VI = 0.8V or 2V,  
VEn = 0.8V, VEn = 2V.  
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is  
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed  
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test  
conditions.  
Note 2: All currents into the device pins are positive; all currents out of the device pins are negative. All voltages are referenced to ground unless otherwise  
specified.  
Note 3: Power dissipation must be externally controlled at elevated temperatures.  
Note 4: Parameter tested go-no-go only.  
Note 5: Tested at 50pF, system capacitance exceed 10 and 30pF.  
Note 6: Testing at 50pF guarantees limits at 10 and 30pF.  
Note 7: The minimum limits apply to device Class Q & V. The limits specified for the INPUT LOW CURRENT represents the numerical range in which this parameter  
will pass.  
Note 8: Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics, except as listed in the Post Radiation Limits Table —  
if applicable. Radiation end point limits for the noted parameters are guaranteed only for the conditions, as specified.  
5
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Test Circuit and Timing Waveforms  
20163203  
FIGURE 2. AC Load Test Circuit for TRI-STATE Outputs  
20163204  
FIGURE 3. Propagation Delay (Notes 1, 2)  
20163205  
FIGURE 4. Enable and Disable Times (Note 2)  
Note 9: Diagram shown for Enable Low. Switches S1 and S2 open.  
Note 10: S1 and S2 of Load Circuit are closed except where shown.  
Note 11: Pulse Generator for all Pulses: Rate 1.0 MHz, Z = 50, t 6.0 ns, t 6.0 ns.  
O
r
f
Note 12: C includes probe and jig capacitance.  
L
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6
Typical Application  
20163206  
FIGURE 5. Typical Application  
7
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Revision History  
Released  
Revision  
Section  
Originator  
Changes  
03/01/06  
A
New Release, Corporate format  
L. Lytle  
1 MDS data sheet converted into one Corp.  
data sheet format. MNDS26F31M-X-RH Rev  
0B0 will be archived.  
www.national.com  
8
Physical Dimensions inches (millimeters) unless otherwise noted  
20-Lead Ceramic Leadless Chip Carrier (E)  
NS Package Number E20A  
16-Lead Ceramic Dual-In-Line Package (J)  
NS Package Number J16A  
9
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
16-Lead Ceramic Flatpak (W)  
NS Package Number W16A  
16-Lead Ceramic SOIC (WG)  
NS Package Number WG16A  
www.national.com  
10  
Notes  
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves  
the right at any time without notice to change said circuitry and specifications.  
For the most current product information visit us at www.national.com.  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS  
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR  
CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the body, or  
(b) support or sustain life, and whose failure to perform when  
properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to result  
in a significant injury to the user.  
2. A critical component is any component of a life support  
device or system whose failure to perform can be reasonably  
expected to cause the failure of the life support device or  
system, or to affect its safety or effectiveness.  
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National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products  
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