JL148BCA [NSC]
Quad 741 Op Amps; 四路741运算放大器
| 型号： | JL148BCA |
| 厂家： | 
National Semiconductor |
| 描述： | Quad 741 Op Amps |
| 文件： | 总18页 (文件大小：804K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 2005
LM148JAN
Quad 741 Op Amps
General Description
Features
n 741 op amp operating characteristics
The LM148 is a true quad LM741. It consists of four inde-
pendent, high gain, internally compensated, low power op-
erational amplifiers which have been designed to provide
functional characteristics identical to those of the familiar
LM741 operational amplifier. In addition the total supply
current for all four amplifiers is comparable to the supply
current of a single LM741 type op amp. Other features
include input offset currents and input bias current which are
much less than those of a standard LM741. Also, excellent
isolation between amplifiers has been achieved by indepen-
dently biasing each amplifier and using layout techniques
which minimize thermal coupling.
n Class AB output stage—no crossover distortion
n Pin compatible with the LM124
n Overload protection for inputs and outputs
n Low supply current drain:
n Low input offset voltage:
n Low input offset current:
n Low input bias current
n High degree of isolation between amplifiers:
n Gain bandwidth product (unity gain):
0.6 mA/Amplifier
1 mV
4 nA
30 nA
120 dB
1.0 MHz
The LM148 can be used anywhere multiple LM741 or
LM1558 type amplifiers are being used and in applications
where amplifier matching or high packing density is required.
Ordering Information
NS PART NUMBER
JL148BCA
SMD PART NUMBER
JM38510/11001BCA
JM38510/11001BDA
JM38510/11001BZA
JM38510/11001SCA
JM38510/11001SDA
NS PACKAGE NUMBER
PACKAGE DESCRIPTION
J14A
14LD CERDIP
JL148BDA
W14B
WG14A
J14A
14LD CERPACK
14LD Ceramic SOIC
14LD CERDIP
JL148BZA
JL148SCA
JL148SDA
W14B
14LD CERPACK
Connection Diagram
20122702
Top View
See NS Package Number J14A, W14B, WG14A
© 2005 National Semiconductor Corporation
DS201227
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Schematic Diagram
20122701
* 1 pF in the LM149
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2
Absolute Maximum Ratings (Note 1)
Supply Voltage
22V
20V
Input Voltage Range
Input Current Range
Differential Input Voltage (Note 2)
Output Short Circuit Duration (Note 3)
Power Dissipation (Pd at 25˚C) (Note 4)
CERDIP
−0.1mA to 10mA
30V
Continuous
400mW
350mW
CERPACK
Thermal Resistance
θJA
CERDIP (Still Air)
103˚C/W
52˚C/W
CERDIP (500LF/ Min Air flow)
CERPACK (Still Air)
CERPACK (500LF/ Min Air flow)
Ceramic SOIC (Still Air)
Ceramic SOIC (500LF/ Min Air flow)
θJC
140˚C/W
100˚C/W
176˚C/W
116˚C/W
CERDIP
19˚C/W
25˚C/W
25˚C/W
CERPACK
Ceramic SOIC
Package Weight (typical)
CERDIP
TBD
465mg
CERPACK
Ceramic SOIC
415mg
Maximum Junction Temperature (TJMAX
)
175˚C
Operating Temperature Range
−55˚C ≤ TA ≤ +125˚C
−65˚C ≤ TA ≤ +150˚C
300˚C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.) Ceramic
ESD tolerance (Note 5)
500V
Quality Conformance Inspection
MIL-STD-883, Method 5005 — Group A
Subgroup
Description
Temp ( ˚C)
+25
1
2
Static tests at
Static tests at
+125
-55
3
Static tests at
4
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
+25
5
+125
-55
6
7
+25
8A
8B
9
+125
-55
+25
10
11
+125
-55
3
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Electrical Characteristics
DC PARAMETERS (The following conditions apply to all parameters, unless otherwise specified.) VCC
measure each amplifier.
=
20V, VCM = 0V,
Sub-
groups
Symbol
Parameter
Conditions
Notes
Min Max
Units
VIO
Input Offset Voltage
+VCC = 35V, −VCC = −5V,
VCM = −15V
−5.0 +5.0
−6.0 +6.0
−5.0 +5.0
−6.0 +6.0
−5.0 +5.0
−6.0 +6.0
−5.0 +5.0
−6.0 +6.0
−25 25
−25 25
−25 +25
−75 +75
−25 +25
−75 +75
−25 +25
−75 +75
−25 +25
−75 +75
-200 200
–400 400
−0.1 100
−0.1 325
−0.1 100
−0.1 325
−0.1 100
−0.1 325
−0.1 100
−0.1 325
−100 100
−100 100
76
mV
mV
mV
mV
mV
mV
mV
mV
µV/˚C
µV/˚C
nA
1
2, 3
1
+VCC = 5V, −VCC = −35V,
VCM = +15V
2, 3
1
2, 3
1
+VCC = 5V, −VCC = −5V,
2, 3
2
Delta VIO
/
Input Offset Voltage
Temperature Stability
25˚C ≤ TA ≤ 125˚C
−55˚C ≤ TA ≤ 25˚C
+VCC = 35V, −VCC = −5V,
VCM = −15V
(Note 6)
(Note 6)
Delta
3
T
IIO
Input Offset Current
1, 2
3
nA
+VCC = 5V, −VCC = −35V,
VCM = +15V
nA
1, 2
3
nA
nA
1, 2
3
nA
+VCC = 5V, −VCC = −5V,
nA
1, 2
3
nA
Delta IIO
/
Input Offset Current
Temperature Stability
25˚C ≤ TA ≤ 125˚C
−55˚C ≤ TA ≤ 25˚C
+VCC = 35V, −VCC = −5V,
VCM = −15V
(Note 6)
(Note 6)
pA/˚C
pA/˚C
nA
2
Delta
3
T
IIB
Input Bias Current
1, 2
3
nA
+VCC = 5V, −VCC = −35V,
VCM = +15V
nA
1, 2
3
nA
nA
1, 2
3
nA
+VCC = 5V, −VCC = −5V,
nA
1, 2
3
nA
PSRR+ Power Supply Rejection Ratio −VCC = −20V, +VCC = 20V to 10V (Note 7)
PSRR− Power Supply Rejection Ratio +VCC = 20V, −VCC = −20V to −10V (Note 7)
µV/V
µV/V
dB
1, 2, 3
1, 2, 3
1, 2, 3
CMRR
Common Mode Rejection Ratio VCM
=
15 V, 5V ≤ VCC
≤
35V
Electrical Characteristics
AC / DC PARAMETERS (The following conditions apply to all parameters, unless otherwise specified.)
VCC
=
20V, VCM = 0V, measure each amplifier.
Sub-
groups
1, 2
3
Symbol
Parameter
Conditions
Notes
Min Max
Units
+ IOS
Short Circuit Current
Short Circuit Current
Power Supply Current
Open Loop Voltage Gain
+VCC = 15V, −VCC = −15V,
VCM = −10V
−55
−75
55
mA
mA
− IOS
ICC
+VCC = 15V, −VCC = −15V,
VCM = +10V
mA
1, 2
3
75
mA
+VCC = 15V, −VCC = −15V
VOUT = −15V, RL = 10KΩ
VOUT = −15V, RL = 2KΩ
3.6
4.5
50
mA
1
mA
2, 3
4
−AVS
V/mV
V/mV
V/mV
V/mV
25
5, 6
4
50
25
5, 6
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4
Electrical Characteristics (Continued)
AC / DC PARAMETERS (The following conditions apply to all parameters, unless otherwise specified.)
VCC
=
20V, VCM = 0V, measure each amplifier.
Sub-
groups
4
Symbol
Parameter
Conditions
Notes
Min Max
Units
+AVS
Open Loop Voltage Gain
Open Loop Voltage Gain
VOUT = +15V, RL = 10KΩ
VOUT = +15V, RL = 2KΩ
50
25
50
25
10
V/mV
V/mV
V/mV
V/mV
V/mV
5, 6
4
5, 6
AVS
VCC
10KΩ
VCC
=
5V, VOUT
=
=
2V, RL
=
4, 5, 6
=
5V, VOUT
2V, RL = 2KΩ
10
+16
+15
-16
-15
1
V/mV
V
4, 5, 6
4, 5, 6
+VOP
-VOP
Output Voltage Swing
Output Voltage Swing
RL = 10KΩ
RL = 2KΩ
RL = 10KΩ
RL = 2KΩ
V
4, 5, 6
V
4, 5, 6
V
4, 5, 6
TRTR
TROS
SR
Transient Response Time
Transient Response Time
Slew Rate
VIN = 50mV, AV = 1
VIN = 50mV, AV = 1
µS
%
7, 8A, 8B
7, 8A, 8B
7, 8A, 8B
7, 8A, 8B
25
VIN = −5V to +5V, AV = 1
VIN = +5V to −5V, AV = 1
0.2
0.2
V/µS
V/µS
Electrical Characteristics
AC PARAMETERS (The following conditions apply to all parameters, unless otherwise specified.) VCC
measure each amplifier.
=
20V, VCM = 0V,
Sub-
groups
Symbol
Parameter
Conditions
Notes
Min Max
Units
NIBB
NIPC
CS
Noise (Broadband)
Noise (Popcorn)
BW = 10Hz to 5KHz
15
40
µVRMS
µVPK
dB
7
7
7
7
7
7
7
7
7
7
7
7
7
7
RS = 20KΩ
Channel Separation
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
VIN
=
10V, A to B, RL = 2KΩ
10V, A to C, RL = 2KΩ
10V, A to D, RL = 2KΩ
10V, B to A, RL = 2KΩ
10V, B to C, RL = 2KΩ
10V, B to D, RL = 2KΩ
10V, C to A, RL = 2KΩ
10V, C to B, RL = 2KΩ
10V, C to D, RL = 2KΩ
10V, D to A, RL = 2KΩ
10V, D to B, RL = 2KΩ
10V, D to C, RL = 2KΩ
80
=
=
=
=
=
=
=
=
=
=
=
80
dB
80
dB
80
dB
80
dB
80
dB
80
dB
80
dB
80
dB
80
dB
80
dB
80
dB
Electrical Characteristics
DC DRIFT PARAMETERS (The following conditions apply to all parameters, unless otherwise specified.) VCC
=
20V, VCM
Sub-
=
0V, measure each amplifier. Delta calculations performed on JAN S and QMLV devices at group B, subgroup 5 only.
Symbol
Parameter
Conditions
Notes
Min Max
Units
groups
VIO
IIB
Input Offset Voltage
Input Bias Current
−1
1
mV
nA
1
1
−15 15
5
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Electrical Characteristics (Continued)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: The differential input voltage range shall not exceed the supply voltage range.
Note 3: Any of the amplifier outputs can be shorted to ground indefinitely; however, more than one should not be simultaneously shorted as the maximum junction
temperature will be exceeded.
Note 4: The maximum power dissipation for these devices must be derated at elevated temperatures and is dicated by T
, θ , and the ambient temperature,
JMAX JA
T . The maximum available power dissipation at any temperature is P = (T
− T )/θ or the number given in the Absolute Maximum Ratings, whichever is less.
A JA
A
d
JMAX
Note 5: Human body model, 1.5 kΩ in series with 100 pF.
Note 6: Calculated parameter.
Note 7: Datalogs as µV
Cross Talk Test Circuit VS
=
15V
20122706
20122707
20122743
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6
Typical Performance Characteristics
Supply Current
Input Bias Current
20122723
20122724
Voltage Swing
Positive Current Limit
20122725
20122726
Negative Current Limit
Output Impedance
20122728
20122727
7
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Typical Performance Characteristics (Continued)
Common-Mode Rejection Ratio
Open Loop Frequency Response
20122729
20122730
Bode Plot LM148
Large Signal Pulse Response (LM148)
20122733
20122731
Small Signal Pulse Response (LM148)
Undistorted Output Voltage Swing
20122735
20122737
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8
Typical Performance Characteristics (Continued)
Gain Bandwidth
Slew Rate
20122738
20122739
Inverting Large Signal Pulse Response (LM148)
Input Noise Voltage and Noise Current
20122741
20122742
Positive Common-Mode Input Voltage Limit
Negative Common-Mode Input Voltage Limit
20122705
20122743
9
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connection) and the capacitance to reduce the phase shift
resulting from the capacitive loading.
Application Hints
The LM148 series are quad low power LM741 op amps. In
the proliferation of quad op amps, these are the first to offer
the convenience of familiar, easy to use operating charac-
teristics of the LM741 op amp. In those applications where
LM741 op amps have been employed, the LM148 series op
amps can be employed directly with no change in circuit
performance.
The output current of each amplifier in the package is limited.
Short circuits from an output to either ground or the power
supplies will not destroy the unit. However, if multiple output
shorts occur simultaneously, the time duration should be
short to prevent the unit from being destroyed as a result of
excessive power dissipation in the IC chip.
As with most amplifiers, care should be taken lead dress,
component placement and supply decoupling in order to
ensure stability. For example, resistors from the output to an
input should be placed with the body close to the input to
minimize “pickup” and maximize the frequency of the feed-
back pole which capacitance from the input to ground cre-
ates.
The package pin-outs are such that the inverting input of
each amplifier is adjacent to its output. In addition, the
amplifier outputs are located in the corners of the package
which simplifies PC board layout and minimizes package
related capacitive coupling between amplifiers.
The input characteristics of these amplifiers allow differential
input voltages which can exceed the supply voltages. In
addition, if either of the input voltages is within the operating
common-mode range, the phase of the output remains cor-
rect. If the negative limit of the operating common-mode
range is exceeded at both inputs, the output voltage will be
positive. For input voltages which greatly exceed the maxi-
mum supply voltages, either differentially or common-mode,
resistors should be placed in series with the inputs to limit
the current.
A feedback pole is created when the feedback around any
amplifier is resistive. The parallel resistance and capacitance
from the input of the device (usually the inverting input) to AC
ground set the frequency of the pole. In many instances the
frequency of this pole is much greater than the expected 3
dB frequency of the closed loop gain and consequently there
is negligible effect on stability margin. However, if the feed-
back pole is less than approximately six times the expected
3 dB frequency a lead capacitor should be placed from the
output to the input of the op amp. The value of the added
capacitor should be such that the RC time constant of this
capacitor and the resistance it parallels is greater than or
equal to the original feedback pole time constant.
Like the LM741, these amplifiers can easily drive a 100 pF
capacitive load throughout the entire dynamic output voltage
and current range. However, if very large capacitive loads
must be driven by a non-inverting unity gain amplifier, a
resistor should be placed between the output (and feedback
Typical Applications—LM148
One Decade Low Distortion Sinewave Generator
20122708
f
= 5 kHz, THD ≤ 0.03%
MAX
R1 = 100k pot. C1 = 0.0047 µF, C2 = 0.01 µF, C3 = 0.1 µF, R2 = R6 = R7 = 1M,
R3 = 5.1k, R4 = 12Ω, R5 = 240Ω, Q = NS5102, D1 = 1N914, D2 = 3.6V avalanche
diode (ex. LM103), V
=
15V
S
A simpler version with some distortion degradation at high frequencies can be made by using A1 as a simple inverting amplifier, and by putting back to back
zeners in the feedback loop of A3.
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10
Typical Applications—LM148 (Continued)
Low Cost Instrumentation Amplifier
20122709
V
S
=
15V
R = R2, trim R2 to boost CMRR
Low Drift Peak Detector with Bias Current Compensation
20122710
Adjust R for minimum drift
D3 low leakage diode
D1 added to improve speed
V
S
=
15V
11
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Typical Applications—LM148 (Continued)
Universal State-Variable Filter
20122711
Tune Q through R0,
4
For predictable results: f Q ≤ 4 x 10
O
Use Band Pass output to tune for Q
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12
Typical Applications—LM148 (Continued)
A 1 kHz 4 Pole Butterworth
20122712
Use general equations, and tune each section separately
= 0.541, Q = 1.306
Q
1stSECTION
2ndSECTION
The response should have 0 dB peaking
A 3 Amplifier Bi-Quad Notch Filter
20122713
Ex: f
= 3 kHz, Q = 5, R1 = 270k, R2 = R3 = 20k, R4 = 27k, R5 = 20k, R6 = R8 = 10k, R7 = 100k, C1 = C2 = 0.001 µF
NOTCH
Better noise performance than the state-space approach.
13
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Typical Applications—LM148 (Continued)
A 4th Order 1 kHz Elliptic Filter (4 Poles, 4 Zeros)
20122714
R1C1 = R2C2 = t
R'1C'1 = R'2C'2 = t'
f
C
= 1 kHz, f = 2 kHz, f = 0.543, f = 2.14, Q = 0.841, f' = 0.987, f' = 4.92, Q' = 4.403, normalized to ripple BW
S p Z P Z
Use the BP outputs to tune Q, Q', tune the 2 sections separately
R1 = R2 = 92.6k, R3 = R4 = R5 = 100k, R6 = 10k, R0 = 107.8k, R = 100k, R = 155.1k,
L
H
R'1 = R'2 = 50.9k, R'4 = R'5 = 100k, R'6 = 10k, R'0 = 5.78k, R' = 100k, R' = 248.12k, R'f = 100k. All capacitors are 0.001 µF.
L
H
Lowpass Response
20122715
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14
Typical Simulation
LM148, LM741 Macromodel for Computer Simulation
20122721
For more details, see IEEE Journal of Solid-State Circuits, Vol. SC-9, No. 6, December 1974
−16
Note 8:
Note 9:
= 112I = 8 x 10
S
o1
= 144*C2 = 6 pF for LM149
o2
20122722
15
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Revision History Section
Date
Released
Revision
Section
Originator
Changes
02/15/05
A
New Release, Corporate format
L. Lytle
1 MDS data sheet converted into one
Corp. data sheet format. MJLM148-X,
Rev. 0C1. MDS data sheet will be
archived.
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16
Physical Dimensions inches (millimeters)
unless otherwise noted
Ceramic Dual-In-Line Package (J)
NS Package Number J14A
Ceramic Flatpack (W)
NS Package Number W14B
17
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Ceramic SOIC (WG)
NS Package Number WG14A
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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