LM1876T [NSC]

Overture⑩ Audio Power Amplifier Series Dual 20W Audio Power Amplifier with Mute and Standby Modes; Overture⑩音频功率放大器系列双20W音频功率放大器静音和待机模式
LM1876T
型号: LM1876T
厂家: National Semiconductor    National Semiconductor
描述:

Overture⑩ Audio Power Amplifier Series Dual 20W Audio Power Amplifier with Mute and Standby Modes
Overture⑩音频功率放大器系列双20W音频功率放大器静音和待机模式

放大器 功率放大器
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中文:  中文翻译
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February 1998  
LM1876 Overture Audio Power Amplifier Series  
Dual 20W Audio Power Amplifier with Mute and Standby  
Modes  
General Description  
Key Specifications  
The LM1876 is a stereo audio amplifier capable of delivering  
typically 20W per channel of continuous average output  
power into a 4or 8load with less than 0.1% (THD + N).  
j
j
j
THD+N at 1 kHz at 2 x 15W continuous average  
output power into 4or 8:  
THD+N at 1 kHz at continuous average  
output power of 2 x 20W into 8:  
Standby current:  
0.1% (max)  
Each amplifier has an independent smooth transition fade-in/  
out mute and a power conserving standby mode which can  
be controlled by external logic.  
0.009% (typ)  
4.2 mA (typ)  
The performance of the LM1876, utilizing its Self Peak In-  
stantaneous Temperature (˚Ke) (SPiKe ) Protection Cir-  
Features  
cuitry, places it in a class above discrete and hybrid amplifi-  
ers by providing an inherently, dynamically protected Safe  
Operating Area (SOA). SPiKe Protection means that these  
parts are safeguarded at the output against overvoltage, un-  
dervoltage, overloads, including thermal runaway and in-  
stantaneous temperature peaks.  
n SPiKe Protection  
n Minimal amount of external components necessary  
n Quiet fade-in/out mute mode  
n Standby-mode  
n Isolated 15-lead TO-220 package  
n Non-Isolated 15-lead TO-220 package  
Applications  
n High-end stereo TVs  
n Component stereo  
n Compact stereo  
Typical Application  
Connection Diagram  
Plastic Package  
DS012072-2  
Top View  
Isolated Package  
Order Number LM1876TF  
See NS Package Number TF15B  
Non-Isolated Package  
Order Number LM1876T  
See NS Package Number TA15A  
DS012072-1  
FIGURE 1. Typical Audio Amplifier Application Circuit  
Note: Numbers in parentheses represent pinout for amplifier B.  
*
Optional component dependent upon specific design requirements.  
SPiKe Protection and Overture are trademarks of National Semiconductor Corporation.  
© 1999 National Semiconductor Corporation  
DS012072  
www.national.com  
Absolute Maximum Ratings (Notes 4, 5)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
Thermal Resistance  
Isolated TF-Package  
θJC  
2˚C/W  
1˚C/W  
Non-Isolated T-Package  
θJC  
Supply Voltage |VCC| + |VEE  
(No Input)  
|
Soldering Information  
TF Package (10 sec.)  
Storage Temperature  
64V  
260˚C  
Supply Voltage |VCC| + |VEE  
(with Input)  
|
−40˚C to +150˚C  
64V  
(VCC or VEE) and  
|VCC| + |VEE| 54V  
54V  
Common Mode Input Voltage  
Operating Ratings (Notes 4, 5)  
Differential Input Voltage  
Output Current  
Temperature Range  
Internally Limited  
62.5W  
TMIN TA TMAX  
−20˚C TA +85˚C  
Power Dissipation (Note 6)  
ESD Susceptability (Note 7)  
Junction Temperature (Note 8)  
Supply Voltage |VCC| + |VEE| (Note 1)  
20V to 64V  
2000V  
150˚C  
Electrical Characteristics (Notes 4, 5)  
=
=
=
=
The following specifications apply for VCC +22V, VEE −22V with RL 8unless otherwise specified. Limits apply for TA  
25˚C.  
Symbol  
Parameter  
Conditions  
LM1876  
Units  
(Limits)  
Typical  
Limit  
(Note 10)  
20  
(Note 9)  
|VCC| +  
Power Supply Voltage  
(Note 11)  
GND − VEE 9V  
V (min)  
V (max)  
|VEE  
|
64  
=
THD + N 0.1% (max),  
PO  
Output Power  
=
1 kHz  
(Note 3)  
THD + N  
Xtalk  
(Continuous Average)  
f
=
=
=
=
=
|VCC  
|VCC  
|
|VEE  
|VEE  
|
|
22V, RL 8Ω  
20  
22  
15  
15  
W/ch (min)  
=
|
20V, RL 4(Note 13)  
W/ch (min)  
=
Total Harmonic Distortion  
Plus Noise  
15 W/ch, RL 8Ω  
0.08  
0.1  
%
%
=
=
=
| 20V  
15 W/ch, RL 4, |VCC  
|
|VEE  
=
20 Hz f 20 kHz, AV 26 dB  
=
=
Channel Separation  
Slew Rate  
f
1 kHz, VO 10.9 Vrms  
80  
18  
dB  
=
=
SR  
VIN 1.414 Vrms, trise 2 ns  
12  
V/µs (min)  
(Note 3)  
=
Both Amplifiers VCM 0V,  
Itotal  
Total Quiescent Power  
Supply Current  
=
=
(Note 2)  
VO 0V, IO 0 mA  
Standby: Off  
50  
4.2  
2.0  
80  
6
mA (max)  
mA (max)  
mV (max)  
Standby: On  
=
=
VOS  
Input Offset Voltage  
VCM 0V, IO 0 mA  
15  
(Note 2)  
=
=
IB  
Input Bias Current  
Input Offset Current  
Output Current Limit  
VCM 0V, IO 0 mA  
0.2  
0.002  
3.5  
0.5  
0.2  
2.9  
µA (max)  
µA (max)  
Apk (min)  
= =  
VCM 0V, IO 0 mA  
IOS  
IO  
=
= =  
10V, tON 10 ms,  
|VCC  
|
|VEE  
VO 0V  
|VCC–VO|, VCC 20V, IO +100 mA  
|
=
=
=
VOD  
Output Dropout Voltage  
(Note 12)  
1.8  
2.5  
115  
2.3  
3.2  
85  
V (max)  
V (max)  
dB (min)  
= =  
|VO–VEE|, VEE −20V, IO −100 mA  
(Note 2)  
PSRR  
(Note 2)  
= =  
VCC 25V to 10V, VEE −25V,  
Power Supply Rejection Ratio  
=
=
VCM 0V, IO 0 mA  
=
=
VCC 25V, VEE −25V to −10V  
110  
110  
85  
80  
dB (min)  
dB (min)  
=
=
VCM 0V, IO 0 mA  
= =  
Common Mode Rejection Ratio VCC 35V to 10V, VEE −10V to −35V,  
CMRR  
= =  
VCM 10V to −10V, IO 0 mA  
(Note 2)  
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2
Electrical Characteristics (Notes 4, 5) (Continued)  
=
=
=
=
The following specifications apply for VCC +22V, VEE −22V with RL 8unless otherwise specified. Limits apply for TA  
25˚C.  
Symbol  
Parameter  
Conditions  
LM1876  
Units  
(Limits)  
Typical  
Limit  
(Note 10)  
90  
(Note 9)  
110  
=
=
AVOL  
Open Loop Voltage Gain  
RL 2 k, VO 20 V  
dB (min)  
(Note 2)  
=
=
GBWP  
eIN  
Gain Bandwidth Product  
Input Noise  
fO 100 kHz, VIN 50 mVrms  
7.5  
2.0  
5
8
MHz (min)  
µV (max)  
IHF — A Weighting Filter  
=
RIN 600(Input Referred)  
(Note 3)  
SNR  
=
Signal-to-Noise Ratio  
PO 1W, A — Weighted,  
98  
dB  
dB  
=
Measured at 1 kHz, RS 25Ω  
=
PO 15W, A — Weighted  
108  
115  
=
Measured at 1 kHz, RS 25Ω  
AM  
Mute Attenuation  
Pin 6,11 at 2.5V  
80  
dB (min)  
Standby  
Pin  
VIL  
VIH  
Standby Low Input Voltage  
Standby High Input Voltage  
Not in Standby Mode  
In Standby Mode  
0.8  
2.5  
V (max)  
V (min)  
2.0  
2.0  
Mute pin  
VIL  
Mute Low Input Voltage  
Mute High Input Voltage  
Outputs Not Muted  
Outputs Muted  
0.8  
2.5  
V (max)  
V (min)  
VIH  
Note 1: Operation is guaranteed up to 64V, however, distortion may be introduced from SPiKe Protection Circuitry if proper thermal considerations are not taken into  
account. Refer to the Application Information section for a complete explanation.  
Note 2: DC Electrical Test; Refer to Test Circuit #1.  
Note 3: AC Electrical Test; Refer to Test Circuit #2.  
Note 4: All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified.  
Note 5: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-  
tional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guar-  
antee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is  
given, however, the typical value is a good indication of device performance.  
Note 6: For operating at case temperatures above 25˚C, the device must be derated based on a 150˚C maximum junction temperature and a thermal resistance of  
=
=
1˚C/W for the T package. Refer to the section Determining the Correct Heat Sink in the Application In-  
θ
2˚C/W (junction to case) for the TF package and θ  
JC  
formation section.  
JC  
Note 7: Human body model, 100 pF discharged through a 1.5 kresistor.  
Note 8: The operating junction temperature maximum is 150˚C, however, the instantaneous Safe Operating Area temperature is 250˚C.  
Note 9: Typicals are measured at 25˚C and represent the parametric norm.  
Note 10: Limits are guarantees that all parts are tested in production to meet the stated values.  
Note 11:  
V
must have at least −9V at its pin with reference to ground in order for the under-voltage protection circuitry to be disabled. In addition, the voltage dif-  
EE  
ferential between V  
and V must be greater than 14V.  
EE  
CC  
Note 12: The output dropout voltage, V , is the supply voltage minus the clipping voltage. Refer to the Clipping Voltage vs. Supply Voltage graph in the Typical Per-  
OD  
formance Characteristics section.  
±
Note 13: For a 4load, and with 20V supplies, the LM1876 can deliver typically 22W of continuous average output power with less than 0.1% (THD + N). With  
±
supplies above 20V, the LM1876 cannot deliver more than 22W into a 4due to current limiting of the output transistors. Thus, increasing the power supply above  
±
20V will only increase the internal power dissipation, not the possible output power. Increased power dissipation will require a larger heat sink as explained in the  
Application Information section.  
3
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#
Test Circuit 1 (Note 2) (DC Electrical Test Circuit)  
DS012072-3  
#
Test Circuit 2 (Note 3) (AC Electrical Test Circuit)  
DS012072-4  
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4
Bridged Amplifier Application Circuit  
DS012072-5  
FIGURE 2. Bridged Amplifier Application Circuit  
Single Supply Application Circuit  
DS012072-6  
FIGURE 3. Single Supply Amplifier Application Circuit  
*
Note: Optional components dependent upon specific design requirements.  
5
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Auxiliary Amplifier Application Circuit  
DS012072-7  
FIGURE 4. Special Audio Amplifier Application Circuit  
Equivalent Schematic (excluding active protection circuitry)  
LM1876 (per Amp)  
DS012072-8  
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6
External Components Description  
Components  
Functional Description  
1
RB  
Prevents currents from entering the amplifier’s non-inverting input which may be passed through to the  
load upon power down of the system due to the low input impedance of the circuitry when the  
undervoltage circuitry is off. This phenomenon occurs when the supply voltages are below 1.5V.  
2
3
4
Ri  
Rf  
Inverting input resistance to provide AC gain in conjunction with Rf.  
Feedback resistance to provide AC gain in conjunction with Ri.  
=
Ci  
Feedback capacitor which ensures unity gain at DC. Also creates a highpass filter with Ri at fC  
(Note 14)  
1/(2πRiCi).  
5
6
CS  
Provides power supply filtering and bypassing. Refer to the Supply Bypassing application section for  
proper placement and selection of bypass capacitors.  
RV  
Acts as a volume control by setting the input voltage level.  
(Note 14)  
7
RIN  
Sets the amplifier’s input terminals DC bias point when CIN is present in the circuit. Also works with CIN to  
=
(Note 14)  
create a highpass filter at fC 1/(2πRINCIN). Refer to Figure 4.  
8
CIN  
(Note 14)  
Input capacitor which blocks the input signal’s DC offsets from being passed onto the amplifier’s inputs.  
Works with CSN to stabilize the output stage by creating a pole that reduces high frequency instabilities.  
Works with RSN to stabilize the output stage by creating a pole that reduces high frequency instabilities.  
9
RSN  
(Note 14)  
10  
CSN  
=
(Note 14)  
The pole is set at fC 1/(2πRSNCSN). Refer to Figure 4.  
11  
12  
L (Note 14)  
Provides high impedance at high frequencies so that R may decouple a highly capacitive load and reduce  
the Q of the series resonant circuit. Also provides a low impedance at low frequencies to short out R and  
pass audio signals to the load. Refer to Figure 4.  
R (Note 14)  
13  
14  
15  
RA  
CA  
Provides DC voltage biasing for the transistor Q1 in single supply operation.  
Provides bias filtering for single supply operation.  
RINP  
Limits the voltage difference between the amplifier’s inputs for single supply operation. Refer to the Clicks  
(Note 14)  
and Pops application section for a more detailed explanation of the function of RINP  
Provides input bias current for single supply operation. Refer to the Clicks and Pops application section  
for a more detailed explanation of the function of RBI  
.
16  
17  
RBI  
.
RE  
Establishes a fixed DC current for the transistor Q1 in single supply operation. This resistor stabilizes the  
half-supply point along with CA.  
Note 14: Optional components dependent upon specific design requirements.  
Typical Performance Characteristics  
THD + N vs Frequency  
THD + N vs Frequency  
THD + N vs Frequency  
DS012072-13  
DS012072-14  
DS012072-15  
7
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Typical Performance Characteristics (Continued)  
THD + N vs  
THD + N vs  
THD + N vs  
Output Power  
Output Power  
Output Power  
DS012072-16  
DS012072-17  
DS012072-18  
THD + N vs  
THD + N vs  
THD + N vs  
Output Power  
Output Power  
Output Power  
DS012072-19  
DS012072-20  
DS012072-21  
Clipping Voltage vs  
Supply Voltage  
Clipping Voltage vs  
Supply Voltage  
Clipping Voltage vs  
Supply Voltage  
DS012072-22  
DS012072-23  
DS012072-24  
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8
Typical Performance Characteristics (Continued)  
Output Power vs  
Load Resistance  
Power Dissipation vs  
Output Power  
Power Dissipation vs  
Output Power  
DS012072-26  
DS012072-25  
DS012072-27  
Output Power vs  
Supply Voltage  
Output Mute vs  
Mute Pin Voltage  
Output Mute vs  
Mute Pin Voltage  
DS012072-28  
DS012072-29  
DS012072-30  
Channel Separation vs  
Frequency  
Large Signal Response  
Pulse Response  
DS012072-32  
DS012072-33  
DS012072-31  
9
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Typical Performance Characteristics (Continued)  
Power Supply  
Rejection Ratio  
Common-Mode  
Rejection Ratio  
Open Loop  
Frequency Response  
DS012072-34  
DS012072-35  
DS012072-36  
DS012072-39  
DS012072-42  
Safe Area  
SPiKe Protection  
Response  
Supply Current vs  
Supply Voltage  
DS012072-37  
DS012072-38  
Pulse Thermal  
Resistance  
Pulse Thermal  
Resistance  
Supply Current vs  
Output Voltage  
DS012072-40  
DS012072-41  
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10  
Typical Performance Characteristics (Continued)  
Pulse Power Limit  
Pulse Power Limit  
Supply Current vs  
Case Temperature  
DS012072-43  
DS012072-44  
DS012072-45  
Supply Current (ICC) vs  
Standby Pin Voltage  
Supply Current (IEE) vs  
Standby Pin Voltage  
Input Bias Current vs  
Case Temperature  
DS012072-47  
DS012072-46  
DS012072-48  
11  
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Application Information  
MUTE MODE  
tween the thermal shutdown temperature limits of 165˚C and  
155˚C. This greatly reduces the stress imposed on the IC by  
thermal cycling, which in turn improves its reliability under  
sustained fault conditions.  
By placing a logic-high voltage on the mute pins, the signal  
going into the amplifiers will be muted. If the mute pins are  
left floating or connected to a logic-low voltage, the amplifi-  
ers will be in a non-muted state. There are two mute pins,  
one for each amplifier, so that one channel can be muted  
without muting the other if the application requires such a  
configuration. Refer to the Typical Performance Character-  
istics section for curves concerning Mute Attenuation vs  
Mute Pin Voltage.  
Since the die temperature is directly dependent upon the  
heat sink used, the heat sink should be chosen such that  
thermal shutdown will not be reached during normal opera-  
tion. Using the best heat sink possible within the cost and  
space constraints of the system will improve the long-term  
reliability of any power semiconductor device, as discussed  
in the Determining the Correct Heat Sink Section.  
STANDBY MODE  
DETERMlNlNG MAXIMUM POWER DISSIPATION  
The standby mode of the LM1876 allows the user to drasti-  
cally reduce power consumption when the amplifiers are  
idle. By placing a logic-high voltage on the standby pins, the  
amplifiers will go into Standby Mode. In this mode, the cur-  
rent drawn from the VCC supply is typically less than 10 µA  
total for both amplifiers. The current drawn from the VEE sup-  
ply is typically 4.2 mA. Clearly, there is a significant reduction  
in idle power consumption when using the standby mode.  
There are two Standby pins, so that one channel can be put  
in standby mode without putting the other amplifier in  
standby if the application requires such flexibility. Refer to  
the Typical Performance Characteristics section for  
curves showing Supply Current vs. Standby Pin Voltage for  
both supplies.  
Power dissipation within the integrated circuit package is a  
very important parameter requiring a thorough understand-  
ing if optimum power output is to be obtained. An incorrect  
maximum power dissipation calculation may result in inad-  
equate heat sinking causing thermal shutdown and thus lim-  
iting the output power.  
Equation (1) exemplifies the theoretical maximum power dis-  
sipation point of each amplifier where VCC is the total supply  
voltage.  
PDMAX VCC2/2π2RL  
(1)  
=
Thus by knowing the total supply voltage and rated output  
load, the maximum power dissipation point can be calcu-  
lated. The package dissipation is twice the number which re-  
sults from equation (1) since there are two amplifiers in each  
LM1876. Refer to the graphs of Power Dissipation versus  
Output Power in the Typical Performance Characteristics  
section which show the actual full range of power dissipation  
not just the maximum theoretical point that results from  
equation (1).  
UNDER-VOLTAGE PROTECTION  
Upon system power-up, the under-voltage protection cir-  
cuitry allows the power supplies and their corresponding ca-  
pacitors to come up close to their full values before turning  
on the LM1876 such that no DC output spikes occur. Upon  
turn-off, the output of the LM1876 is brought to ground be-  
fore the power supplies such that no transients occur at  
power-down.  
DETERMINING THE CORRECT HEAT SINK  
The choice of a heat sink for a high-power audio amplifier is  
made entirely to keep the die temperature at a level such  
that the thermal protection circuitry does not operate under  
normal circumstances.  
OVER-VOLTAGE PROTECTION  
The LM1876 contains over-voltage protection circuitry that  
limits the output current to approximately 3.5 Apk while also  
providing voltage clamping, though not through internal  
clamping diodes. The clamping effect is quite the same,  
however, the output transistors are designed to work alter-  
nately by sinking large current spikes.  
The thermal resistance from the die (junction) to the outside  
air (ambient) is a combination of three thermal resistances,  
θJC, θCS, and θSA. In addition, the thermal resistance, θJC  
(junction to case), of the LM1876TF is 2˚C/W and the  
LM1876T is 1˚C/W. Using Thermalloy Thermacote thermal  
compound, the thermal resistance, θCS (case to sink), is  
about 0.2˚C/W. Since convection heat flow (power dissipa-  
tion) is analogous to current flow, thermal resistance is  
analogous to electrical resistance, and temperature drops  
are analogous to voltage drops, the power dissipation out of  
the LM1876 is equal to the following:  
SPiKe PROTECTION  
The  
LM1876  
is  
protected  
from  
instantaneous  
peak-temperature stressing of the power transistor array.  
The Safe Operating graph in the Typical Performance  
Characteristics section shows the area of device operation  
where SPiKe Protection Circuitry is not enabled. The wave-  
form to the right of the SOA graph exemplifies how the dy-  
namic protection will cause waveform distortion when en-  
abled.  
=
PDMAX (TJMAX−TAMB)/θJA  
(2)  
=
where TJMAX 150˚C, TAMB is the system ambient tempera-  
=
ture and θJA θJC + θCS + θSA  
.
Once the maximum package power dissipation has been  
calculated using equation (1), the maximum thermal resis-  
tance, θSA, (heat sink to ambient) in ˚C/W for a heat sink can  
be calculated. This calculation is made using equation (3)  
which is derived by solving for θSA in equation (2).  
THERMAL PROTECTION  
The LM1876 has a sophisticated thermal protection scheme  
to prevent long-term thermal stress of the device. When the  
temperature on the die reaches 165˚C, the LM1876 shuts  
down. It starts operating again when the die temperature  
drops to about 155˚C, but if the temperature again begins to  
rise, shutdown will occur again at 165˚C. Therefore, the de-  
vice is allowed to heat up to a relatively high temperature if  
the fault condition is temporary, but a sustained fault will  
cause the device to cycle in a Schmitt Trigger fashion be-  
=
θSA [(TJMAX−TAMB)−PDMAX(θJC +θCS)]/PDMAX (3)  
Again it must be noted that the value of θSA is dependent  
upon the system designer’s amplifier requirements. If the  
ambient temperature that the audio amplifier is to be working  
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12  
SINGLE-SUPPLY AMPLIFIER APPLICATION  
Application Information (Continued)  
The typical application of the LM1876 is a split supply ampli-  
fier. But as shown in Figure 3, the LM1876 can also be used  
in a single power supply configuration. This involves using  
under is higher than 25˚C, then the thermal resistance for the  
heat sink, given all other things are equal, will need to be  
smaller.  
some external components to create  
a half-supply bias  
which is used as the reference for the inputs and outputs.  
Thus, the signal will swing around half-supply much like it  
swings around ground in a split-supply application. Along  
with proper circuit biasing, a few other considerations must  
be accounted for to take advantage of all of the LM1876  
functions.  
SUPPLY BYPASSING  
The LM1876 has excellent power supply rejection and does  
not require a regulated supply. However, to improve system  
performance as well as eliminate possible oscillations, the  
LM1876 should have its supply leads bypassed with  
low-inductance capacitors having short leads that are lo-  
cated close to the package terminals. Inadequate power  
supply bypassing will manifest itself by a low frequency oscil-  
lation known as “motorboating” or by high frequency insta-  
bilities. These instabilities can be eliminated through multiple  
bypassing utilizing a large tantalum or electrolytic capacitor  
(10 µF or larger) which is used to absorb low frequency  
variations and a small ceramic capacitor (0.1 µF) to prevent  
any high frequency feedback through the power supply lines.  
The LM1876 possesses a mute and standby function with in-  
ternal logic gates that are half-supply referenced. Thus, to  
enable either the Mute or Standby function, the voltage at  
these pins must be a minimum of 2.5V above half-supply. In  
single-supply systems, devices such as microprocessors  
and simple logic circuits used to control the mute and  
standby functions, are usually referenced to ground, not  
half-supply. Thus, to use these devices to control the logic  
circuitry of the LM1876, a “level shifter,” like the one shown in  
Figure 5, must be employed. A level shifter is not needed in  
a split-supply configuration since ground is also half-supply.  
If adequate bypassing is not provided, the current in the sup-  
ply leads which is a rectified component of the load current  
may be fed back into internal circuitry. This signal causes  
distortion at high frequencies requiring that the supplies be  
bypassed at the package terminals with an electrolytic ca-  
pacitor of 470 µF or more.  
BRIDGED AMPLIFIER APPLICATION  
The LM1876 has two operational amplifiers internally, allow-  
ing for a few different amplifier configurations. One of these  
configurations is referred to as “bridged mode” and involves  
driving the load differentially through the LM1876’s outputs.  
This configuration is shown in Figure 2. Bridged mode op-  
eration is different from the classical single-ended amplifier  
configuration where one side of its load is connected to  
ground.  
DS012072-12  
FIGURE 5. Level Shift Circuit  
When the voltage at the Logic Input node is 0V, the 2N3904  
is “off” and thus resistor Rc pulls up mute or standby input to  
the supply. This enables the mute or standby function. When  
the Logic Input is 5V, the 2N3904 is “on” and consequently,  
the voltage at the collector is essentially 0V. This will disable  
the mute or standby function, and thus the amplifier will be in  
its normal mode of operation. Rshift, along with Cshift, creates  
an RC time constant that reduces transients when the mute  
or standby functions are enabled or disabled. Additionally,  
A bridge amplifier design has a distinct advantage over the  
single-ended configuration, as it provides differential drive to  
the load, thus doubling output swing for a specified supply  
voltage. Consequently, theoretically four times the output  
power is possible as compared to a single-ended amplifier  
under the same conditions. This increase in attainable output  
power assumes that the amplifier is not current limited or  
clipped.  
A direct consequence of the increased power delivered to  
the load by a bridge amplifier is an increase in internal power  
dissipation. For each operational amplifier in a bridge con-  
figuration, the internal power dissipation will increase by a  
factor of two over the single ended dissipation. Thus, for an  
audio power amplifier such as the LM1876, which has two  
operational amplifiers in one package, the package dissipa-  
R
shift limits the current supplied by the internal logic gates of  
the LM1876 which insures device reliability. Refer to the  
Mute Mode and Standby Mode sections in the Application  
Information section for a more detailed description of these  
functions.  
CLICKS AND POPS  
tion will increase by  
a factor of four. To calculate the  
In the typical application of the LM1876 as a split-supply au-  
dio power amplifier, the IC exhibits excellent “click” and “pop”  
performance when utilizing the mute and standby modes. In  
addition, the device employs Under-Voltage Protection,  
which eliminates unwanted power-up and power-down tran-  
sients. The basis for these functions are a stable and con-  
LM1876’s maximum power dissipation point for a bridged  
load, multiply equation (1) by a factor of four.  
This value of PDMAX can be used to calculate the correct size  
heat sink for a bridged amplifier application. Since the inter-  
nal dissipation for a given power supply and load is in-  
creased by using bridged-mode, the heatsink’s θSA will have  
to decrease accordingly as shown by equation (3). Refer to  
the section, Determining the Correct Heat Sink, for a more  
detailed discussion of proper heat sinking for a given appli-  
cation.  
stant half-supply potential. In  
ground is the stable half-supply potential. But in  
a split-supply application,  
a
single-supply application, the half-supply needs to charge up  
just like the supply rail, VCC. This makes the task of attaining  
a clickless and popless turn-on more challenging. Any un-  
even charging of the amplifier inputs will result in output  
clicks and pops due to the differential input topology of the  
LM1876.  
13  
www.national.com  
loaded voltage which is usually about 15% higher. The sup-  
ply voltage will also rise 10% during high line conditions.  
Therefore the maximum supply voltage is obtained from the  
following equation.  
Application Information (Continued)  
To achieve a transient free power-up and power-down, the  
voltage seen at the input terminals should be ideally the  
same. Such a signal will be common-mode in nature, and  
will be rejected by the LM1876. In Figure 3, the resistor RINP  
serves to keep the inputs at the same potential by limiting the  
voltage difference possible between the two nodes. This  
should significantly reduce any type of turn-on pop, due to an  
uneven charging of the amplifier inputs. This charging is  
based on a specific application loading and thus, the system  
designer may need to adjust these values for optimal perfor-  
mance.  
±
Max supplies (VOPEAK + VOD) (1 + regulation) (1.1)  
For 15W of output power into an 8load, the required  
VOPEAK is 15.49V. A minimum supply rail of 20.5V results  
from adding VOPEAK and VOD. With regulation, the maximum  
±
supplies are 26V and the required IOPEAK is 1.94A from  
equation (5). It should be noted that for a dual 15W amplifier  
into an 8load the IOPEAK drawn from the supplies is twice  
1.94 Apk or 3.88 Apk. At this point it is a good idea to check  
the Power Output vs Supply Voltage to ensure that the re-  
quired output power is obtainable from the device while  
maintaining low THD+N. In addition, the designer should  
verify that with the required power supply voltage and load  
impedance, that the required heatsink value θSA is feasible  
given system cost and size constraints. Once the heatsink  
issues have been addressed, the required gain can be deter-  
mined from Equation (6).  
As shown in Figure 3, the resistors labeled RBI help bias up  
the LM1876 off the half-supply node at the emitter of the  
2N3904. But due to the input and output coupling capacitors  
in the circuit, along with the negative feedback, there are two  
different values of RBI, namely 10 kand 200 k. These re-  
sistors bring up the inputs at the same rate resulting in a pop-  
less turn-on. Adjusting these resistors values slightly may re-  
duce pops resulting from power supplies that ramp  
extremely quick or exhibit overshoot during system turn-on.  
(6)  
AUDIO POWER AMPLlFIER DESIGN  
Design a 15W/8Audio Amplifier  
Given:  
From equation 6, the minimum AV is: AV 11.  
=
By selecting a gain of 21, and with a feedback resistor, Rf  
20 k, the value of Ri follows from equation (7).  
=
Ri Rf (AV − 1)  
(7)  
Power Output  
Load Impedance  
Input Level  
15 Wrms  
8Ω  
=
Thus with Ri 1 ka non-inverting gain of 21 will result.  
Since the desired input impedance was 47 k, a value of 47  
kwas selected for RIN. The final design step is to address  
the bandwidth requirements which must be stated as a pair  
of −3 dB frequency points. Five times away from a −3 dB  
point is 0.17 dB down from passband response which is bet-  
1 Vrms(max)  
47 kΩ  
Input Impedance  
Bandwidth  
20 Hz−20 kHz  
±
0.25 dB  
±
ter than the required 0.25 dB specified. This fact results in  
A designer must first determine the power supply require-  
ments in terms of both voltage and current needed to obtain  
the specified output power. VOPEAK can be determined from  
equation (4) and IOPEAK from equation (5).  
a low and high frequency pole of 4 Hz and 100 kHz respec-  
tively. As stated in the External Components section, Ri in  
conjunction with Ci create a high-pass filter.  
=
*
*
Ci 1/(2π 1 k4 Hz) 39.8 µF;  
use 39 µF.  
The high frequency pole is determined by the product of the  
desired high frequency pole, fH, and the gain, AV. With a  
(4)  
(5)  
=
=
AV 21 and fH 100 kHz, the resulting GBWP is 2.1 MHz,  
which is less than the guaranteed minimum GBWP of the  
LM1876 of 5 MHz. This will ensure that the high frequency  
response of the amplifier will be no worse than 0.17 dB down  
at 20 kHz which is well within the bandwidth requirements of  
the design.  
To determine the maximum supply voltage the following con-  
ditions must be considered. Add the dropout voltage to the  
peak output swing VOPEAK, to get the supply rail at a current  
of IOPEAK. The regulation of the supply determines the un-  
www.national.com  
14  
Physical Dimensions inches (millimeters) unless otherwise noted  
Isolated TO-220 15-Lead Package  
Order Number LM1876TF  
NS Package Number TF15B  
15  
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
Non-Isolated TO-220 15-Lead Package  
Order Number LM1876T  
NS Package Number TA15A  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL  
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and  
whose failure to perform when properly used in  
accordance with instructions for use provided in the  
labeling, can be reasonably expected to result in a  
significant injury to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform  
can be reasonably expected to cause the failure of  
the life support device or system, or to affect its  
safety or effectiveness.  
National Semiconductor  
Corporation  
Americas  
Tel: 1-800-272-9959  
Fax: 1-800-737-7018  
Email: support@nsc.com  
National Semiconductor  
Europe  
National Semiconductor  
Asia Pacific Customer  
Response Group  
Tel: 65-2544466  
Fax: 65-2504466  
National Semiconductor  
Japan Ltd.  
Tel: 81-3-5639-7560  
Fax: 81-3-5639-7507  
Fax: +49 (0) 1 80-530 85 86  
Email: europe.support@nsc.com  
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.  

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