LM1893 [NSC]
LM1893/LM2893 Carrier-Current Transceiver; LM1893 / LM2893载波电流收发器
| 型号： | LM1893 |
| 厂家： | 
National Semiconductor |
| 描述： | LM1893/LM2893 Carrier-Current Transceiver |
| 文件： | 总24页 (文件大小：576K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
April 1995
²
LM1893/LM2893 Carrier-Current Transceiver
General Description
Y
Output power easily boosted 10-fold
50 to 300 kHz carrier frequency choice
TTL and MOS compatible digital levels
Regulated voltage to power logic
Carrier-current systems use the power mains to transfer in-
formation between remote locations. This bipolar carrier-
current chip performs as a power line interface for half-du-
plex (bi-directional) communication of serial bit streams of
virtually any coding. In transmission, a sinusoidal carrier is
FSK modulated and impressed on most any power line via a
rugged on-chip driver. In reception, a PLL-based demodula-
tor and impulse noise filter combine to give maximum range.
A complete system may consist of the LM1893, a COPSTM
controller, and discrete components.
Y
Y
Y
Y
Drives all conventional power lines
Applications
Y
Energy management systems
Y
Home convenience control
Y
Inter-office communication
Y
Appliance control
Features
Y
Y
Fire alarm systems
Noise resistant FSK modulation
Y
Security systems
Y
User-selected impulse noise filtering
Y
Telemetry
Y
Up to 4.8 kBaud data transmission rate
Y
Computer terminal interface
Y
Strings of 0’s or 1’s in data allowed
Y
Sinusoidal line drive for low RFI
Typical Application
TL/H/6750–1
FIGURE 1. Block diagram of carrierÐcurrent chip with a complement of discrete components making a complete
e
360 Baud transceiver. Use caution with this circuitÐdangerous line voltage is present.
e
F
O
125 kHz, f
DATA
BI-LINETM and COPSTM are trademarks of National Semiconductor Corp.
²
Carrier-Current Transceivers are also called Power Line Carrier (PLC) transceivers.
C
1995 National Semiconductor Corporation
TL/H/6750
RRD-B30M115/Printed in U. S. A.
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
e
25 C,
Maximum continuous dissipation, T
plastic DIP N (Note 2): transmit mode
§
A
1.66 W
1.33 W
receive mode
b
Operating ambient temp. range
Storage temperature range
Lead temp., soldering, 7 seconds
40 to 85 C
§
Supply voltage
Voltage on pin 12
30 V
55 V
41 V
40 V
100 mA
b
65 to 150 C
260 C
§
§
Voltage on pin 10 (Note 1)
Voltage on pins 5 and 17
5.6 V DC zener current
Junction temperature: transmit mode
receive mode
Note: Absolute maximum ratings indicate limits beyond
which damage to the device may occur. Electrical specifica-
tions are not ensured when operating the device above
guaranteed limits but below absolute maximum limits, but
there will be no device degradation.
150 C
125 C
§
§
Electro-Static Discharge (120 pF, 1500X)
1KV
General Electrical Characteristics
O
(Note 3). The test conditions are: Va 18V and F
e
e
125 kHz, unless otherwise noted.
Test
Limit
(Note 4)
Design
Limit
(Note 5)
Limit
Units
Ý
Parameter
5.6 V Zener voltage, V
Conditions
Typical
e
Pin 11, I
Z
1
2 mA
5.6
5.2
5.9
V min.
V max.
Z
@
(V 10 mA
@
e
b
b
1 mA)/(10 mA 1 mA)
2
3
5.6 V Zener resistance, R
Pin 11, R
V
5
X
Z
Z
Z
Z
Carrier I/O peak survivable
transient voltage, V
Pin 10, discharge 1 mF cap. charged to V
OT
80
60
V max.
k
thru 1X
OT
Carrier I/O clamp voltage, V
e
4
Pin 10, I 10 mA, RX mode
OC
2N2222 diode pin 8 to 9
44
41
50
V min.
V max.
OC
e
5
6
7
8
Carrier I/O clamp resistance, R
10
Pin 10, I
Pin 5
10 mA
20
1.8
2.2
X
OC
TX/RX low input voltage, V
IL
0.8
2.8
V max.
V min.
TX/RX high input voltage, V
Pin 5 (Note 9)
Pin 5 at 0.8 V
IH
b
b
20
1
TX/RX low input current, I
IL
2
mA min.
mA max.
b
1
10
9
TX/RX high input current, I
IH
Pin 5 at 40 V
0
mA min.
mA max.
10b
10
2
4
b
RX TX switch-over time, T
10
11
Time to develop 63% of full current drive thru pin 10
ms
RT
b
TX RX switch-over time, T
e
1/(2F
DATA
1 bit time, T
). Time T is user
TR
bit
TR
B
controlled with C , see Apps. Info.
M
e
F )/2
2
e
6.65 kX, C
O
12
ICO initial accuracy of F
TX mode, R
e
560 pF
125
113
137
kHz min.
kHz max.
O
O
a
F
(F
0
1
b
b
T )
JMIN
b
100
13
14
ICO temperature coefficient of F
TX or RX mode, (F
F
)/(T
PPM/ C
§
% max.
O
OMAX
OMIN
JMAX
s
s
T
JMAX
b
TX or RX mode, 40
g
g
5.0
Temperature drift of F
T
J
2.0
O
Transmitter Electrical Characteristics (Note 3). The test conditions are: Va 18 V and F 125 kHz
e
e
O
unless otherwise noted. The transmit center frequency is F , FSK low is F , and FSK high is F .
O
1
2
Test
Limit
(Note 4)
Design
Limit
(Note 5)
Limit
Units
Ý
Parameter
Conditions
Typical
15
Supply voltage, Va, range
13
40
14
24
15
23
V min.
V max.
e
Meets test 17 spec. at T 25 C and:
J
§
k
b
b
[
[
]
]
[
[
]
]
[
[
]
]
(F 14V
F
18V )/F 18V
0.01
0.01
l
l
1
(F 24V
1
1
1
18V )/F 18V
l
k
F
1
1
l
16
Total supply current, I
QT
Pin 15. Pin 12 high. I is I through
52
79
mA max.
QT
Q
pin 15 and the average current I
Carrier I/O through pin 10
of the
ODC
17
18
Carrier I/O output current, I
100X load on pin 10
70
45
mApp min.
O
Carrier I/O lower swing limit, V
ALC
Pin 10. Set internally be ALC.
2N2222 diode pin 8 to 9
4.7
4.0
5.7
V min.
V max.
19
20
THD of I (Note 6)
O
Q of 10 tank driving 10X line
100X load, no tank
0.6
5.5
5.0
9
% max.
% max.
b
b
(F F )/( F
a
F
1
[
]
/2)
FSK deviation, F
F
4.4
3.7
5.2
% min.
% max.
2
1
2
1
2
21
22
23
Data In. low input voltage, V
IL
Pin 17
1.7
2.1
0.8
2.8
V max.
V min.
Data In. high input voltage, V
IH
Pin 17 (Note 9)
Pin 17 at 0.8 V
b
b
10
1
Data In. low input current, I
IL
1
mA min.
mA max.
b
1
10
24
Data In. high input current, I
IH
Pin 17 at 40 V
0
mA min.
mA max.
10b
4
2
Receiver Electrical Characteristics (Note 3). The test conditions are: Va 18 V, F 125 kHz, 2.2%
e
e
g
O
e
e
100 mVpp, in the receive mode, unless otherwise noted.
deviation FSK, F
2.4 kHz, V
IN
DATA
Test
Limit
(Note 4)
Design
Limit
(Note 5)
Limit
Units
Ý
Parameter
Conditions
Typical
25
26
27
28
Supply voltage, Va, range
Functional receiver (Note 7)
12
37
13
30
13.5
28
V min.
V max.
Supply current, I
QT
I
is pin 15 (Va) plus pin 10
11
19.5
10
5
14
mA min.
mA max.
QT
(Carrier I/O) current. 2.4 kX Pin 13 to GND.
Carrier I/O input resistance, R
Pin 10
14
30
kX min.
kX max.
10
e
Max. data rate, F
MD
Functional receiver (Note 7), C
e
2.4 kHz 4.8 kBaud
100 pF,
4.8
2.4
kBaud
F
R
0X, no tank,
F
e
e
e
e
e
g
g
g
g
g
10
29
30
31
PLL capture range, F
C
C
100 pF, R
0 X
0 X
40
45
15
15
% min.
% min.
C
F
F
F
F
PLL lock range, F
100 pF, R
L
Receiver input sensitivity, S
IN
For a functional receiver (Note 8)
Referred to chip side (pin 10)
1.8
2.0
1.4
0.26
0.29
0.20
10
12
mV
RMS
mV
RMS
e
e
of the line-coupling XFMR: F
F
50 kHz
300 kHz
O
mV
RMS
mV
RMS
mV
RMS
mV
RMS
O
Referred to line side of XFMR:
e
e
(assuming a 7.07:1 XFMR) F
F
50 kHz
300 kHz
O
O
32
Tolerable input dc voltage offset
range, V
Pin 10 lower than pin 15 by V
2
0.1
V max.
INDC
INDC
Data Out. breakdown voltage
Data Out. low output, V
s
33
34
35
Pin 12, leakage I 20 mA
70
55
V min.
V max.
e
Pin 12, sat. voltage at I
OL
2 mA
0.15
0.4
OL
Impulse noise filter current, I
g
g
g
Pin 13 charge and discharge current
55
45
85
mA min.
mA max.
I
36
37
38
39
40
41
42
43
Offset hold cap. bias voltage, V
CM
Pin 6
2.0
1.3
3.5
V min.
V max.
b
Pin 6. V(pin 3) V(pin 4)
e
g
g
g
g
Offset hold capacitor max. drive
current, I
250 mV
55
25
80
mA min.
mA max.
MCM
Offset hold bias current, I
b
b
b
40
40
Pin 6, TX mode. Bias pin 6 as it self-
biased during test 31.
0.5
20
nA min.
nA max.
OHB
Phase comparator current, I
PC
Bias pins 3 and 4 at 8.5 V
a
100
10
50
200
mA min.
mA max.
e
I
I(pin 3)
I(pin 4), TX mode
PC
Phase detector output resistance,
Pins 3 and 4.
@
6
18
kX min.
kX max.
@
e
b
V
R
R
PD
(V 100mA
50mA)/(50mA)
PD
Phase detector demodulated output
voltage, V
Pin 3 to 4, measured after filtering
out the 2F component
100
0.95
80
60
180
mVpp min.
mVpp max.
PD
Fast offset cancel voltage ‘‘window’’
-to-V ratio, V /V
O
b
e
a
DC offset
WINDOW
g
V
PIN3
V
PIN4
V
0.70
1.20
V/V min.
V/V max.
g
Drive for 1 mA pin 6 current
PD
W
PD
e
e
CMRR. 120 Hz
Power supply rejection, PSRR
C
L
0.1 mF. PSRR
dB min.
Note 1: More accurately, the maximum voltage allowed on pin 10 is V , and V
OC
ranges from 41 to 50V. Also, transients may reach above 60V; see the transient
OC
peak voltage characteristic curve.
Note 2: The maximum power dissipation rating should be derated for device operation above 25 C to insure that the junction temperature remains below the
§
maximum rating. Use a i of 75 C/W for the N package using a socket in still air (which is the worst case). Consult the Application Information section for more
§
JA
detail.
e
e
25 C. Pin
Note 3: The boldface values apply over the full junction temperature range for the specified supply voltage range. All other numbers apply at T
T
§
A
J
numbers refer to LM1893. LM2893 tested by shorting Carrier In to Carrier Out and testing it as an LM1893.
Note 4: Guaranteed and 100% production tested.
Note 5: Guaranteed (but not 100% production tested) over the temperature and supply voltage ranges. These limits are not used to calculate outgoing quality
levels.
e
[
]
O
[
(all components at or above 2F ) / I
]
(fundamental) .
Note 6: Total harmonic distortion is measured using THD
I
RMS
RMS
Note 7: Receiver function is defined as the error-free passage of 1 cycle of 50% duty-cycle 2.4 kHz square-wave data (2 sequential 208 mS bits), with the first bit
g
g
being a ‘‘1.’’ All of the data transitions (edges) must fall within 10% ( 20.8 ms) of their noise-free positions. RX time delay is minimized by using no impulse noise
filter cap. C for this test.
I
e
Note 8: During the sensitivity check, note 7 requirements are followed with these exceptions: (1) data rate F
g
approximately 6200 pF).
1.2 kHz, (2) all of the data transitions must fall
DATA
g
within 20% ( 41.6 ms) of their noise-free positions, and (3), a time-domain filter capacitor (C ) is used. The time delay of C is (/2 bit, or 208 ms. (C is
I
I
I
Note 9: For TTL compatibility use a pull-up resistor to increase min. V
to above 2.8 V.
OH
3
Typical Performance Characteristics (Va 18V, F
e
e
125 kHz, circuit ofFigure 1, pin numbers for
O
LM1893)
Total Current Consumption,
, vs Supply Voltage
Total Current Consumption,
, vs Junction Temperature
Chip Bias Current,
i , vs Supply Voltage
Q
I
I
QT
QT
n
TL/H/6750–38
4
Typical Performance Characteristics (Continued)
Maximum Data Rate vs
Junction Temperature
Receiver Sensitivity vs
Junction Temperature
PLL Lock Range vs
Junction Temperature and F
O
Filter
TL/H/6750–39
5
Dual-In-Line Package
Application Information*
THE DATA PATH
The BI-LINETM chip serves as a power line interface in the
carrier-current transceiver (CCT) system of Figure 3. Figure
4 shows the interface circuit now discussed. The controller
may select either the transmit (TX) or receive (RX) mode.
Serial data from the controller is used to generate a FSK-
modulated 50 to 300 kHz carrier on the line in the TX mode.
In the RX mode line signal passes through the coupling
transformer into the PLL-based receiver. The recreated seri-
al bit stream drives the controller.
With the IC in the TX mode (pin 5 a logic high), baseband
data to 5 kHz drive the modulator’s Data In pin to generate
a switched 0.978I/1.022I control current to drive the low TC,
TL/H/6750–2
Top View
g
triangle-wave, current-controlled oscillator to 2.2% devia-
tion. The tri-wave passes through a differential attenuator
and sine shaper which deliver a current sinusoid through an
automatic level control (ALC) circuit to the gain of 200 cur-
rent output amplifier. Drive current from the Carrier I/O de-
Order Number LM1893N
See NS Package Number N18A
Small Outline & Dual-In-Line Package
velops a voltage swing on T ’s (Figure 4) resonant tank
1
proportional to line impedance, then passes through the
step-down transformer and coupling capacitor C onto the
C
line. Progressively smaller line impedances cause reduced
signal swing, but never clipping-thus avoiding potential radio
frequency interference. When large line impedances threat-
en to allow excessive output swing on pin 10, the ALC
shunts current away from the output amplifier, holding the
voltage swing constant and within the amp’s compliance
limit. The amplifier is stable with a load of any magnitude or
phase angle.
In the RX mode (pin 5 a logic low), the TX sections on the
chip are disabled. Carrier signal, broad-band noise, transient
spikes, and power line component impinge of the receiver’s
TL/H/6750–41
input highpass filter, made up of C and T , and the tank
1
C
Top View
bandpass filter. In-band carrier signal, band-limited noise,
heavily attenuated line frequency component, and attenuat-
ed transient energy pass through to produce voltage swing
on the tank, swinging about the positive supply to drive the
Carrier I/O receiver input. The balanced Norton-input limiter
amplifier removes DC offsets, attenuates line frequency,
performs as a bandpass filter, and limits the signal to drive
the PLL phase detector differentially. The differential de-
modulated output signal from the phase detector, contain-
ing AC and DC data signal, noise, system DC offsets, and a
large twice-the-carrier-frequency component, passes
through a 3-stage RC lowpass filter to drive the offset can-
cel circuit differentially. The offset cancelling circuit works
Order Number LM2893M or LM2893N
See NS Package Number M20B or N20A
FIGURE 2. Connection Diagrams
g
by insuring that the (fixed) 50 mV signal delivered to the
data squaring (‘‘slicing’’) comparator is centered around the
0 mV comparator switch point. Whenever the comparator
signal plus DC offset and noise moves outside the carefully
g
matched 50 mV voltage ‘‘window’’ of the offset cancel
circuit, it adjusts its DC correction voltage in series with the
differential signal to force the signal back into the window.
g
While the signal is within the 50 mV window, the DC offset
is stored on capacitor C . By grace of the highly non-linear
M
offset hold capacitor charging during offset cancelling, the
DC cancellation is done much more quickly than with an AC
coupling capacitor normally used in place of the offset can-
cel circuit. Since impulse noise spikes normally ring the sig-
nal symmetrically around 0 V, the fully bilateral offset cancel
topology affords excellent noise rejection. The switched cur-
rent output of the comparator drives the impulse noise filter
integrator capacitor that rejects all data pulses of less than
the integrator charge time. Noise appears as duty-cycle jitter
at the open collector serial data output.
TL/H/6750–3
FIGURE 3. The block diagram of a carrier-current
system using the Bi-Line chip to interface digital
controllers via the power line
*Unless otherwise noted, all pin references refer to LM1893, but hold true
for equivalent LM2893 pin.
6
Application Information (Continued)
7
Application Information (Continued)
Recommended
Value
Effect of making the component value:
Smaller Larger
Ý
Purpose
Notes
g
2 k pot and 5.6 k fixed R.
k
7.6 k not recommended. Poor F TC with 5.6 k R .
O O
C
R
560 pF
6.2 kX
Together, C and R Increases F
O
Decreases F
5% NPO ceramic. Use low TC
O
O
O
O
O
set ICO F
.
O
Increases F
O
k
5.6 k not recommended.
Decreases F
O
l
C
R
0.047 mF
3.3 kX
PLL loop filter pole
PLL loop filter zero
Less noise immune, higher More noise immune, lower Depending on R value and
F
F
f
PLL less stable, allows
, more PLL stability.
DATA
f , less PLL stability.
DATA
PLL more stable, allows
F , PLL unstable with large
O
C . See Apps. Info. C
F F
F
less C . Less ringing.
F
more C . More ringing.
F
and R values not critical.
F
t
250 V non-polar. Use 2C
C
on hot and neutral for max.
line isolation, safety.
C
C
0.22 mF
Couples F to line,
C
Low TX line amplitude.
and T low-pass Less 60 Hz T current.
Drives lower line Z.
O
More 60 Hz T current.
1
More stored charge.
C
1
attenuates 60 Hz.
1
Less stored charge.
g
Tank F down or decrease 100 V nonpolar, low TC, 10%
O
C
0.033 mF
Tank matches line Z, Tank F up or increase
O
L of T for constant F
Q
1
bandpass filters,
isolates from line,
recommended and attenuates
.
L of T for constant F .
O
Larger L: lower F or
O
High large-signal Q needed.
Optimize for low F line
1
O
Smaller L: higher F or
1
T
Use
O
O
increase C ; decreased F decrease C ; increased F pull with control of F TC
C O C O O
XFMR
transients.
line pull.
Noise spikes turn ALC off. Slower ALC response.
Less stable ALC. More stable ALC.
line pull.
and Q.
C
A
R
A
0.1 mF
10 kX
ALC pole
ALC zero
R
A
optional. ALC stable
t
for C 100 pF.
A
C
L
0.047 mF
Limiter 50 kHz pole, Higher pole F, more 60 Hz Lower pole F, less 60 Hz
reject, more noise BW.
Any reasonably low TC cap.
300 pF guarantees stability.
60 Hz rejection.
reject. F attenuation?
O
g
C
M
0.47 mF
Holds RX path V
Less noise immune, shorter More noise immune, longer Low leakage 20% cap.
OS
V
OS
sition, shorter preamble. sition, longer preamble.
hold, faster V aqui- hold, slower V aqui- Scale with f
V
.
OS OS DATA
OS
C
0.047 mF
Rejects short pulses Less impulse reject, less More impulse reject, more C charge time (/2 bit nom.
I
Must be 1 bit worst-case.
I
k
like impulse noise.
Open-col. pull-up
5.6 V Zener bias
delay, more pulse jitter.
delay, less pulse jitter.
t
R 1.5 kX on 5.6 V
C
R
R
10 kX
12 kX
Less available sink I.
Less available source I.
C
k
k
30 mA recommended.
(Chip power-up needs 5.6 V)
Larger shunt current,
more chip dissipation.
Smaller shunt current,
less Va current draw.
1
I
Z
Z
t
k
Z
44 V BV
60 V peak
Transient clamp
Z
failure, higher series
Z costly, lower series
T
Recommend Zener rated
t
for 500 W for 1 ms.
T
T
R-excess peak V, Zener
and chip damage,
less ruggedness.
R gives enhanced
transient clamp,
more ruggedness.
Excessive TX attenuation. Carbon comp. recommended.
Costly IRF 11DQ05 or 1N5819
R
D
4.7 X
t
Transient I limit
Over-drive Clamp
Damage Z , pull up Va
.
T
T
T
Failure on Transient
44V BV
b
Inadequate turn-off speed. Boost optional. Q F( 3 dB)
B
R
Q
180 X
Power NPN
1.1 X
Base bleed
Boost gain device
Current setting R
Faster, lower THD I
.
B
O
l
l
Excessive T and V
.
More rugged, but costly.
.
of 200 MHz. R
B
24 Ohm.
B
J
SAT
More I , need higher h
e
a
R
G
[
]
)/R mApp.
G
R
G
.
Less I , lower min. h
O
I
70 (10
O
fe
fe
O
t
C
47 mF
Supply bypass
Transients destroy chip.
Less supply spike.
Va never over abs. max.
B
A
Z
5.1V
Stop ALC charge
in RX mode
Excess ALC
current flow
ALC RX charging
not inhibited over T
Z optional - 5.1V
A
20% low leakage type
g
J
FIGURE 5. A quick explanation of the external component function using the circuit ofFigure 4. Values given are for Va
e
e
e
360 Baud (180 Hz), using a 115 V 60 Hz power line
18 V, F
125 kHz, f
DATA
O
Component Selection
Assuming the circuit of Figure 4 is used with something oth-
er than the nominal 125 kHz carrier frequency, 180 Hz data
rate, 18V supply voltage, etcetera, the component values
listed in Figure 5 will need changing. This section will help
direct the CCT designer in finding the required component
values with emphasis placed on look-up tables and charts. It
is assumed that the designer has selected values for carrier
ance considerations only, are: 1) the higher the F the bet-
O
ter, 2) the lower the maximum data rate the better, and 3)
the more time and frequency filtering the better.
Use Figure 5 as a quick reference to the external compo-
nent function.
THE TRANSMITTER
center frequency, F ; data rate, f
; supply voltage, Va
;
power line voltage, V ; and power line frequency, F . If one
O
DATA
C
O
L
L
Central to chip operation is the low TC of F emitter-cou-
O
or more of those parameters is not defined, one may read
the data sheet and make an educated guess.
pled oscillator. With proper C , the F of the 2V
BE
ampli-
O
O
tude triangle-wave oscillator output may vary from near DC
to above 300 kHz. While C may have any value, C should
Maxims to keep in mind, based on CCT electrical perform-
O
O
8
Component Selection (Continued)
be made above 10 pF so that parasitic capacitance is not
dominant. Excessive or unbalanced common-mode-to-
ground capacitance should be avoided. A low temperature
T
1
At this point, the CCT system designer may choose to use
one of the recommended transformers or to design custom
T . Consult ‘‘The Coupling Transformer’’ section to help
k
coefficient (TC) of capacitance ( 100 PPM/ C), such as a
monolithic NPO ceramic multilayer type, preserves low TC
§
1
with the design of T if a new or boost-capable transformer
1
is needed. The recommended 125 kHz transformer func-
of F . Figure 6 finds a C value given F .
O
O
O
tions with an I of up to 600 mApp.
O
R
O
It is recommended that CCT systems use the recommended
Resistor R is used by the IC to generate a V /R related
BE
O
transformers, described in Figure 7, for T . The 3 transform-
1
ers are optimized for use in the ranges of 50–100 kHz, 100–
current that is multiplied by 2 to produce the 200 mA ICO
control current that sets F . The control current TC ‘‘bucks’’
O
the V related tri-wave amplitude across C to effect a low
200 kHz, and 200–400 kHz with unloaded Q’s (Q ) of about
U
BE
O
35, and loaded Q’s (Q ) of about 12. Three secondary taps
L
TC of F . Vary R to trim F , within limits. Raising F more
O
O
O
O
are supplied with nominal 7.07, 10, and 14.1 turns ratios (N)
to drive industrial and residential power line impedances of
3.5, 7, and 14X respectively. All are inexpensive, all have
the same pin-outs for easy exchange in a PC board, and all
are small - on the order of 10 mm diameter at the base.
than 20% above its untrimmed value by means of decreas-
ing R more than 20% is not recommended. Low R , and
so high control current, risks ICO saturation and poor TC
O
O
under worst-case conditions. Raising R reduces the de-
O
modulated signal amplitude from the phase detector; raising
R
by more than a factor of 2 (1 octave) is not recommended.
O
C
Q
Since lower TC pots are relatively costly, it is recommended
k
Tank resonant frequency F must be correct to allow pas-
Q
sage of transmitter signal to the line. Use Figure 8 to find
that R be made up of a 5.6 k fixed ( 100 PPM/ C) resistor
§
O
k
with a 2 kX ( 250 PPM/ C) series pot.
§
C
ming slug. The inductance of T has a TC of 150 PPM/ C
’s value. Trimming F to equal F is done with T ’s trim-
Q Q O 1
a
which may be cancelled by using a 150 PPM/ C cap such
§
C
and R
A
1
A
b
as polystyrene. Since circulating current in the tank is (/4
§
Components C and R control the dynamic characteristics
A
A
of the transmitter output envelope. Their values are not crit-
ical. Use the values given in Figure 5. C and R are func-
A
, C should have a low series resistance (a 1 X series
RMS
Q
A
A
resistance is too much). Polypropelene caps are excellent,
‘‘orange drop’’ mylars are adequate, while many other my-
lars are inadequate. A 100V rating is needed for transient
protection.
tions of loaded T tank Q, R , f
, and line impulse
DATA
noise. Any changes made in C and R should be made
1
O
A
A
based on empirical measurements of a CCT on the line.
Roughly, C acts as an ALC pole and R an ALC zero.
A
A
TL/H/6750–10
TL/H/6750–5
FIGURE 8. Find C ’s value given F
O
FIGURE 6. Find C ’s value knowing F
O
O
O
Bottom View
TL/H/6750–7
TL/H/6750–8
TL/H/6750–9
TL/H/6750–6
125 kHz
Toko 707VX-A042YUK
50 kHz
Toko 707VX-A043YUK
300 kHz
Toko 161XN-A207YUK
FIGURE 7. The recommended T transformers, available through:
1
Toko America, 1250 Feehanville Drive, Mount Prospect, IL, 60056, (312) 297-0070
9
Component Selection (Continued)
neous power of greater than 1 kW has been measured us-
ing the recommended transformers). For self protection, the
Carrier I/O has an internal 44V voltage clamp with a 20X
series resistance. A parallel low impedance 44V external
transient suppression diode will then conduct the lion’s
share of any current when transients force the Carrier I/O to
a high voltage.
C
C
Capacitor C ’s primary function is to block the power line
C
voltage from T ’s line-side winding. Also, C and T ’s line-
1
C
1
side winding comprise a LC highpass filter. The self-induc-
tance of T is far too low to support a direct line connection.
1
C
C
must have a low enough impedance at F to allow T to
O 1
drive transmitted energy onto the line. To drive a 14X power
line, the impedance of C should be below 14X.
C
Use Figure 9 to find the reactive impedance of C to check
C
that it is less than the line impedance. Then checkFigure 10
to see that the power line current is small enough to keep
T
1
well out of saturation; the recommended transformers
can withstand a 10 Amp-turn magnetizing force (1 Amp
through the worst-case 10 turn line-side winding).
Caution is required when choosing C to avoid series reso-
C
nance of the series combination of C , the transformer in-
C
ductance, and the reflected tank impedance. The low resist-
ance of the network under series resonance will load the
line, possibly decreasing range. For your particular line cou-
pling circuit, measure for series resonance using some ex-
pected line impedance load.
TL/H/6750–12
FIGURE 10. The AC line-induced current passed by C
C
R
B
This base-bleed resistor turns Q off quickly - important
B
since the amplifier output swing is about 200V/ms. An R
B
below about 24X will conduct excessive current and over-
load the chip amplifier and is not recommended.
TL/H/6750–13
FIGURE 11. Output amplifier current and required min.
versus gain-setting resistor R
Q
B
h
fe
G
TL/H/6750–11
FIGURE 9. C ’s impedance should be,
C
as a rule-of-thumb, smaller than the lowest
expected line impedance
R
G
This resistor, in parallel with the internal 10X resistor, fixes
the current gain of the output amplifier, and so the output
current amplitude. Figure 11 gives output current and mini-
TL/H/6750–14
FIGURE 12. Boost transistor power dissipation versus
amplifier output current
mum AC current gain h for Q when R is used to boost
fe
B
G
output current.
Z
must be used unless some precaution is taken to protect
the Carrier I/O pin from line transients or transients caused
T
Q
B
The boost gain transistor Q must be fast. Double-diffused
B
devices with 50 MHz F ’s work, slower transistors (epi-base
when stored line energy in C is discharged by the random
C
phase of power line connection and disconnection. Worst
T
types) do not preserve a sinusoidal waveform when F is
case, C may discharge a full peak-to-peak line voltage into
C
the tuned circuit. Another way to reduce the need for Z is
T
O
high or will cause the output amp. to oscillate. Q must have
B
a certain minimum h for given boost levels, as shown in
fe
Figure 11. Figure 12 shows the power Q must dissipate
by placing another magnetic circuit in the signal path that
relies on a high, but easily saturated, permeability to couple
a primary and secondary winding - a toroidal transformer for
B
e
(R
R ) must be 60V or greater and Q must have adequate
continuously operating with a shorted output. BV
CER
example. Toroids cost more than Z .
T
B
B
SOA for transient survival.
Use an avalanche diode designed specifically for transient
suppression Ð they have orders of magnitude higher pulse
Z
T
Unfortunately, potentially damaging transient energy passes
through transformer T onto the Carrier I/O pin (instanta-
1
10
Component Selection (Continued)
power capability than standard avalanche diodes rated for
equal DC dissipation. Metal oxide varistors have not proven
useful because of their inferior clamping coefficient and are
not recommended. Specifications for an example minimum
diode are given in Figure 13.
differential inputs of the Norton amp. equally, while the sin-
gle-ended input signal swings only the positive input. Overall
PSRR consists of the input CMRR (set by the input stage
component matching) and the ripple-frequency attenuation
of the input amplifier bandpass response that passes carrier
frequency but stops low frequencies. A typical 1% resistor
and 1 mV n-p-n mirror offsets give 26 dB of attenuation, the
bandpass gives 54 dB 120 Hz attenuation, for an overall 80
dB PSRR to allow tens of volts of ripple before impacting
ultimate sensitivity.
@
44–49V 1 mA
Breakdown Voltage
@
Maximum Leakage
1mA 40V
@
300 pF BV
Capacitance
@
64.5V 7.8A
Maximum Clamp Voltage
Peak Non-Repetitive Pulse Power
(REA Standard Exponential Pulse)
Surge Current
10 kW for 1 ms
C
C
A value was chosen earlier. Knowing T ’s secondary induc-
1
tance allows a check of LC line attenuation using Figure 14.
70A for 1/120s
FIGURE 13. Key specifications for a recommended
transient suppressor Z available from General
T
Semiconductor, 2001 West Tenth Place, Tempe, AZ
85281, 602–968-3101, part no. SA40A
C
L
The Norton input limiter amplifier has a bandpass filter for
enhanced receiver selectivity, noise immunity, and line fre-
e
quency rejection. The nominal response curve for F
50
kHz is shown inFigure 15. The 300 kHz pole is fixed. The 50
kHz pole is set by C ’s value. After C is found, the resulting
O
R
T
L
L
R
acts as a voltage divider with Z , absorbing transient
T
energy that attempts to pull the Carrier Input pin above 44V.
Make the resistor a carbon composition 1/4W. When exper-
T
line frequency attenuation is found for the bandpass filter.
Use Figure 15 to find a C value given for F . The approxi-
O
L
iments discharging C charged to the peak-to-peak 620V
C
AC thru a 1X power line were carried out, film resistors blew
open-circuit.
mate line frequency attenuation of the bandpass filter may
then be found in Figure 16. Figure 15 returns a value for C
33% larger than nominal, giving a low frequency pole 33%
low to allow for component tolerances.
L
D
T
This Schottky diode is placed in parallel with the CCT chip’s
substrate diode to pass the majority of the current drawn
from ground when the Carrier Input or Carrier Output is
pulled below ground by a larger-than-twice-the supply-swing
on the tank. Note that Z is in parallel with the substrate
T
diode, but is ineffective due to its high forward voltage drop
and high diffusion capacitance caused by its low forward
speed. Tests proved that a 1N5818 kept a receive-path
functional with a 20X boost transmitter with a 7:1 transform-
g
er attempted to swing the receiver’s Carrier I/O to 100V
TL/H/6750–15
(300 mA peak ground current in the receiver). Without D ,
T
the receiver momentarily stops functioning at a 100 times
lower ground current.
FIGURE 14. The 60 Hz line rejection of the highpass
filter made up of C and T ’s line-side winding
C
1
(neglecting capacitive coupling)
This diode is not needed if the Carrier I/O never swings
below ground. If your CCT systems all run on the same
regulated voltage with all matched transformers and turns
ratios, it is not needed. Otherwise, it is.
THE RECEIVER
The receiver and transmitter share components C , T , C ,
Q
C
1
R , Z , C , R , and peripheral supply and bias components
T
T
O
O
that are not in need of change for RX mode operation. Val-
ues for the balance of the components are now found.
TL/H/6750–16
Line-Frequency Rejection
To use the ultimate sensitivity of the device, fully 110 dB of
115 V, 60 Hz attenuation is required between the line and
the limiter amplifier output. Using the circuit topology of Fig-
ure 4, the combined attenuation of the C /T highpass, the
1
C
tuned transformer, and the bandpass filter attenuation of
the limiter amplifier give far more line rejection than the
above-stated minimum. However, if some other CCT line
coupling circuit is used, line rejection will become important
to the system designer.
Receiver input power supply rejection (PSRR) and common-
mode rejection (CMRR) are one-in-the-same using the sup-
ply-referenced signal input of Figure 4. Ripple swings both
TL/H/6750–17
FIGURE 15. Given F , C is found. Also shown is the
L
input amplifier’s small signal amplitude response
O
11
Component Selection (Continued)
obvious way out is to then reduce the unfiltered loop band-
width. That bandwidth is approximately proportional to the
value of C . For a fixed F , unfiltered loop bandwidth reduc-
C
and R
F
F
These phase-locked loop (PLL) loop filter components re-
move some of the noise and most of the 2F components
O
present in the demodulated differential output voltage signal
from the phase detector. They affect the PLL capture range,
loop bandwidth, damping, and capture time. Because the
PLL has an inherent loop pole due to the integrator action of
O
O
tion requires a larger C and larger control current. With this
O
chip, changing the control current is not allowed. So one is
forced to choose a C /R combination with some minimum
F
F
g
capture range, say 20%, that is within some guardband
from the point of loop instability. Happily, impulse noise
tends to last only fractions of a millisecond so that the lack
of low bandwidth loop response with low data rates is not a
heavy penalty. As long as there is adequate capture range,
the impulse noise filter performs admirably. Note that reduc-
the ICO (via C ), the loop pole set by C and the zero set by
R
O
F
gives the loop filter a classical 2nd-order response.
F
ing F will reduce the no-filter loop bandwidth, and indeed
O
the maximum data rate falls below the limit set by the RC
lowpass filter as F falls below 100 kHz (Figure 19).
O
The tuned transformer characteristics will affect the demod-
ulated data waveform more than C and R at low data
F
F
rates. Tank Q and off-tuning will affect overshoot during the
FSK frequency steps. This is a property of tuned circuits.
The maximum data rate of Figure 19 is measured from the
receiver input to the Data Out and does not include the data
TL/H/6750–18
FIGURE 16. The Norton-input limiter amplifier bandpass
filter line-frequency signal attenuation given C
L
bandwidth reducing effects of T .
I
C
M
Capacitor C stores a voltage corresponding to a correction
M
factor required to cancel the phase detector differential out-
put DC offsets. The stored voltage is ±/6 of the DC offset
plus some bias level of about 2.2 V. A large C value in-
M
creases the time required to bias-up the receive path at the
beginning of transmission. A large C does filter well and
M
store its bias voltage long. Because of the initial random
charge of C , the receiver must be given a data transition to
M
charge to the proper bias voltage. Therefore, reducing C ’s
M
TL/H/6750–19
FIGURE 17. Find C given F .Figure 19
F
O
gives the maximum data rate
value to one that may be charged in less than 2 bit-times will
not save biasing time and is not recommended.
No C and R give the most stable PLL with the fastest
F
F
response. Large C ’s with a too-small R cause PLL loop
F
F
instability leading to poor capture range and poor step re-
sponse or oscillation.
Calculation of C and R is quite difficult, involving not only
F
F
the 2nd-order loop step response, but also the PLL non-
dominant poles, the tuned transformer stepped-frequency
response, and the RC lowpass step response (for data rates
approaching 1 kHz). C and R values are best found em-
F
F
pirically. Tolerance is not critical. Component values are se-
lected to give the best possible impulse noise rejection
TL/H/6750–20
FIGURE 18. Find R given F with F
DATA
a parameter
F
O
g
while preserving a 20% capture range and wide stability
margin.Figures 17 and18 give C and R values versus F
F
,
O
F
kk
where ‘‘f
MAX DATA RATE’’ means that f
DATA
DATA
should be less than the maximum data rate, in kHz, from
Figure 19 divided by 10.
Note that C and R are a function of data rate only for high
F
F
data rates and are not plotted against data rate - as one
might expect. The reason for this is important to understand
if the CCT system designer wishes to find C and R empiri-
F
F
cally. Data signal is, loosely speaking, passed through the
PLL loop and is therefore potentially attenuated if the loop
bandwidth is on the order of the 3rd harmonic of the data
rate, or less. Overall loop bandwidth is held as low as possi-
ble for maximum noise rejection while passing the data.
Loop bandwidth is roughly proportional to the geometric
mean of the unfiltered loop bandwidth and the filter pole set
TL/H/6750–21
FIGURE 19. The maximum data rate versus F using
O
loop filter components optimized for max. noise
g
performance while retaining a min. 20% capture
range (large signal)
Use Figure 20 to find C ’s value knowing f
M
, assuming
DATA
by C . Therefore, C is related to data rate. Unfortunately,
F
F
the loop capture range falls to critically low values when
the standard 2 bit receive charge time is desired. The cap.
value and TC are not critical, but the capacitor should have
low leakage.
large enough values of C are used to reduce loop band-
F
width down to the 100’s of Hz range, for low data rates. The
12
Component Selection (Continued)
Z
A
The 5.1V silicon zener diode Z is required when a short
A
RX-to-TX switch-over time is needed at the same time that
the chip is operating in the RX mode with a pin 10 input
signal swing approaching or exceeding twice the supply
voltage. Predominant causes of these large swings imping-
ing on the RX input are: 1) a transmitter’s supply voltage
higher than the receiver’s supply voltage, 2) a TX and RX
pair that are electrically close, or, 3) a higher RX T step-up
1
turns ratio than the TX T step-down ratio.
1
TL/H/6750–22
Normally, when in the RX mode with small incoming signal
on pin 10, the ALC remains off with pin 7 at a 6V
FIGURE 20. Size C assuming a 2 bit-time
M
receive bias time
b
mode may then be selected with 6V on C allowing 100%
(V
2V ) bias voltage. C is then charged to 6V. TX
BE A
Z
A
C
I
TX power to pump T ’s tuned circuit, and so the AC line,
1
quickly for fast RX-to-TX switch time. As TX output swing
The impulse noise filter integrator capacitor C is used to
I
disallow the passage of any pulse shorter than the integra-
increases so that pin 10 swings below V
ALC
(4.7V typically),
tor charge time. That charge time, set to a nominal (/2 bit
g
that ALC activates to charge C to about 6.6V to reduce TX
A
output drive. However, if in the RX mode pin 10 ever swings
time, is the time required for a 50 mA charge current to
swing C over a 2 V range. Charge time under worst case
I
BE
conditions must never be greater than a bit time since no
below V
, C will charge to above 6.6V. Now, when the
A
ALC
TX mode is selected with C at 6.6V, somewhere from 0 to
A
g
signal could then pass. Using a 10% capacitor, full junc-
tion temperature range, and full specified current range, a
100% TX output drive is available to pump T ’s tuned circuit
1
resulting in a slower rising line signal - effectively reducing
the RX-to-TX switch time.
maximum nominal charge time of (/2 bit is recommended.
Figure 21 gives C versus data rate under those conditions.
I
Use a 5.1V Z driven by a 0 to 0.8V logic low signal to
A
R
C
guarantee over-temp. operation. R must be in series with
A
Z
R
to limit current flow and should never fall below 1 kX. If
is less than 1 kX, then put a 2 kX resistor in series with
Z . Logic high voltages above 10V will cause current flow
The collector pull-up resistor is sized to supply adequate
pull-up current drive and speed while preserving adequate
output low current drive.
A
A
A
into pin 7 that must be limited to 1 mA (with R or a
A
series R).
Breadboarding Tips
During CCT system evaluation, some techniques listed be-
low will simplify certain measurements.
Ð Use caution when working on this circuit - dangerous
line voltages may be present.
Ð When evaluating PLL operation, offset cancel circuit op-
eration, and loop filter values, use the filter of Figure 22
to view the demodulated signal minus the 2F and noise
O
TL/H/6750–24
components. This filter models the RC lowpass filter on
chip.
FIGURE 21. Impulse noise filter cap. C versus F
I
where the charge time is (/2 bit time
DATA
TL/H/6750–25
FIGURE 22. Circuit to view the differential demodulated data signal, minus the noise and 2F components,
O
conveniently with a single-ended gain-of-one output
13
Breadboarding Tips (Continued)
Ð When evaluating CCT system noise performance on a
real power line, it is desirable to vary the signal ampli-
tude to the receiver. This is not easy. An in-line line-
proof L-pad is fine except that the line impedance is un-
known and variable and so the L-pad will rarely match.
Instead, the power output of a chip transmitter may be
controlled using the circuit of Figure 23. This circuit con-
trols the ALC.
representing an average line impedance may be connected
to the line side of T . The circuit of Figure 23 should then be
1
used to defeat the leveling effect of the ALC.
Ð It is sometimes desirable to place impulse noise on the
line. A simple light dimmer with a 100 W light bulb load
produces representative impulse noise.
Ð Do not allow peak currents of over 1 A through the 5.6 V
Zener. In other words, don’t short charged capacitors
into this low-impedance device. Take care not to mo-
mentarily short pins 10 and 11 - chip damage may result.
TL/H/6750–26
FIGURE 23. A means of transmitter output amplitude
control is shown
Ð Figure 24 shows some typical signals beginning with se-
rial data transmitted to received signal.
Thermal Considerations
It is desirable to place the largest possible signal on the
power line for maximum range, limited only by the chip pow-
er dissipation and maximum junction temperature T . The
Tuning Procedure
This procedure applies to circuits similar toFigure 4 LM1893
or LM2893 circuit.
J
falling output power at elevated T allows a more optimal
J
power output - high power at low T and lower power at high
J
for chip self-protection. However, it is still possible to
T
exceed the maximum T within the specified ambient tem-
First, trim F by putting the chip in the TX mode, setting a
O
logical high data input, and measuring the TX high frequen-
J
J
e
perature limit (T
85 C) under worst case conditions of
cy, 1.022 F , on the Carrier I/O using these steps:
O
§
A
100% TX duty cyle, high supply, shorted load, poor PC
board layout (with small copper foil area), and an above
nominal current part. Under those conditions, a part may
e
dissipate 2140 mW, reaching a T
mittedly a rare occurrence). Proper system design includes
1. Take pin 17 to a logic low.
2. Take pin 5 to a logic high.
3. Place a counter on pin 10.
170 C worst-case (ad-
§
J
e
4. Adjust R on pin 18 for F
O
1.022F .
O
the measurement or calculation of T max. to guarantee
J
Second, the line transformer is tuned. The chip is placed in
the TX mode, a resistive line load is connected to disable
the ALC by reducing tank voltage swing below its limit. FSK
data is then passed through the tank so that the tank enve-
lope may be adjusted for equal amplitude for high and low
data frequency.
function under worst-case operation. Like all devices with
failure modes modeled by the Arrhenius model, the high
chip reliability is further enhanced by keeping the die tem-
perature mercifully below the absolute maximum rating.
A direct method of measuring operating junction tempera-
voltage on pin 18, which is al-
ture is to measure the V
BE
ways available under all operating modes. The graph of Fig-
ure 25 may be used to find T , knowing V at the operating
1. Take pin 5 to a logic high.
2. Place a logic-level square wave at or below the receiver’s
maximum data rate on pin 17.
J
BE
e
e
by powering up a chip (in RX mode) that has been dissipat-
point in question and V at T
BE
T
J
25 C. V is found
BE
§
A
3. Temporarily place a 330 X resistor across the tank.
4. Place a scope on pin 10.
ing zero power at some T for some time and measuring
V
A
in less than 1 s (for better than 5 C accuracy).
§
5. Adjust the transformer slug for the least envelope modu-
lation.
BE
Alternately, T may be calculated using:
J
e
a
i
In lieu of the 330 X resistive load, T may be coupled to the
T
J
T
A
P
JA D
(1)
1
power line to better simulate actual load and tank pull condi-
tions during tank tuning. Alternatively, a passive network
where i is 75 C/W for the plastic (N) package using a
socket. That i value is for a high confidence level; nomi-
JA
§
JA
TL/H/6750–23
FIGURE 24. Oscillogram revealing signals at several important nodes under weak signal (0.5 mV
) conditions with
RMS
SCR spikes on an otherwise quiet 115 V, 60 Hz power line. The signals are: 1) transmitted data, 2) RX carrier on the
tuned transformer, 3) demodulated signal from the PLL after passing thru circuit ofFigure 22, 4) signal after RC
lowpass, 5) data at impulse noise filter integrator, and 6) received data. Horizontal scale is 10 ms per div.
14
g
mended C and R (47 nF and 6.2 kX) with a 4.4% DF
(a
F
F
O
Thermal Considerations (Continued)
g
to take less than 50 cycles of F . That is a 0.40 ms delay
100 mV DC offset on C and R ), lock was measured
F F
nal i for an N package is 60 C/W, lower with good PC
§
board layout. Since P is a relatively strong function of T ,
JA
O
D
J
(proportional to 1/F ).
O
an iterative solution process starting with an initial guess for
is used. With the estimated T , find the total supply cur-
rent found in the typical performance characteristics.
Acquisition is incomplete until the second order PLL loop
settles. For the above-mentioned C and R , the loop natu-
T
J
J
F
F
and damping factor are found to be
ral frequency
2.3 kHz and 1.0 respectively. Settling to within 25 mV of
F
N
g
the 100 mV DC offset change requires 2.7 periods of F
g
or 1.2 ms (a function of C and R ).
,
N
F
F
Third, the RC lowpass filter introduces a 0.12 ms delay.
e
ing on the polarity of F . Borderline data squaring with zero
g
Fourth, C must charge up to (±/6)100
83 mV depend-
M
O
noise immunity is possible with only (±/6) 50 mV of charg-
g
ing. C charge current is an asymptotic function approxi-
M
mated by assuming a 50 mA charge current and the full 83
mV charge voltage. C charge time is then 1.7 ms (propor-
M
TL/H/6750–27
tional to 1/f
).
DATA
FIGURE 25. T may be found by using the temperature
J
Fifth, the impulse noise filter adds a (/2 bit-time delay. Total
is 3.9 ms plus (/2 bit-time for a total of 1.9 bit-times at
360 Baud.
coefficient of pin 18 V if V is known at 25 C
BE
§
BE
T
TR
Transmit-To-Receive
Switch-Over Time
Receive-To-Transmit
Switch-Over Time
An important figure-of-merit for a half-duplex CCT link, af-
.
fecting effective data rate, is the TX-to-RX switch time T
TR
Using the recommended component values gives this part a
Assume the chip has been in the RX mode and the TX
mode is now selected. In less than 10 ms, full output current
is exponentially building tank swing. 50% of full swing is
achieved in less than 10 cycles - or under 80 ms at 125 kHz.
In the same 10 ms that the output amp went on, the phase
detector and loop filter are disconnected and the modulator
input is enabled. FSK modulation is produced in 10 ms after
switching to TX mode.
e
[
]
) over a wide
nominal 2 bit-time (1 bit time
range of operating conditions, where the receiver requires 1
data transition. T cannot be decreased significantly but
1/ 2f
DATA
TR
does increase as noise filtering, especially via C , is in-
M
creased. Impulse noise at switch, signals near the limiting
sensitivity, poor F match between receiver and transmitter
O
because of poor trim or worst-case conditions, and the sta-
tistical nature of PLL signal acquisition may all contribute to
Power Line Impedance
Irrespective of how wide the limits on power line impedance
increase T to possibly 4 bit-times.
TR
T
is lower when a pair of LM1893’s handshake rapidly.
TR
The receiver was designed to ‘‘remember’’ the RX-mode
DC operating points on C and C while in the TX mode.
Z
are placed, there are no guarantees. However, since the
CCT design requires an estimate of the lowest expected line
L
M
F
impedance Z encountered for the most efficient transmit-
LN
ter-to-line coupling, line impedance should be measured
Under noisy worst case conditions, C will discharge to the
M
point of false operation after 35 bit-times in the TX mode
and Z limits fixed to a given confidence level. Reasonable
L
values for T turns ratio, loaded Q, and tank resonant fre-
1
quency pull F may be found to enable a CCT system de-
Q
e
(1400 bit times with no noise and a nominal part, f
DATA
is about 0.8 ms (proportional to the selected
180 Hz). T
TR
F
) plus (/2 bit-time.
O
sign that functions with the overwhelming majority of power
lines.
The major components of T
TR
nominal 125 kHz F , 180 Hz f
are described below for a
, lightly-loaded tank with
O
DATA
A limited sampling of Z was made, during the LM1893 de-
L
a Q of 20, and the circuit of Figure 4. The remote CCT has
been operating in the TX mode with a 26.6 V tank swing
PP
and is now selected as a receiver. An incoming signal re-
quiring the ultimate receiver sensitivity immediately is placed
on the line.
sign, of residential and commercial 115V 60 Hz power line.
Data was also drawn from the research of Nicholson and
Malack (reference 1), among others, to produce Figures 26
and 27. All measured impedances are contained within the
shaded portions of Figure 27. A nominal 3.5, 7.0 and 14 X
First, the tank stored energy at the transmit frequency must
decay to a level below the 2.8 mV swing caused by the
PP
Z
is used throughout the application information with a
LN
nominal 45 phase angle (0 is sometimes used for simplici-
ty).
§
§
0.14 mV
incoming line signal containing the information
RMS
to be received.
Q
V
V
1
e
e
decay time
ln
qF
O
# J
O
20
26.6
e
ln
0.466 ms
(2)
c
q
125 000
0.0028
# J
That is 0.47 ms of delay (proportional to I/F and Q).
O
Second, the PLL must acquire the signal; it must lock and
settle. Acquisition time is statistical and may take any length
of time, but average acquisition time depends on the loop
TL/H/6750–28
FIGURE 26. Measured line impedance range for
residential and commercial 115V, 60 Hz lines
filter components C and R and the difference in center
F
frequencies, DF , of the TX/RX pair. Using the recom-
F
O
15
Power Line Impedance (Continued)
TL/H/6750–29
TL/H/6750–30
TL/H/6750–31
e
a
jX
FIGURE 27. Complex-plane plots of measured 115V, 60 Hz line impedance where Z
R
L
L
L
Power Line Attenuation
The wiring in most US buildings is a flat 3 conductor cable
T with a stable resonant frequency, F , that is little affect-
1 Q
called Amerflex, BX, or Romex. All referenced line imped-
ances refer to hot-to-neutral impedances with a grounded
center conductor. The cable has a 100 X characteristic im-
pedance, a 125 kHz quarter-wavelength of 600 m (250 m at
300 kHz), and a measured 7 dB attenuation for a 50 m run
with a 10 X termination. Generally, line loads may be treat-
ed as lumped impedances. Instrument line cords exhibit
about 0.7 mH and 30 pF per meter.
ed by the de-tuning effect of the line impedance Z , and of
L
2) building a tightly line-coupled transformer for transmitted
carrier with loose coupling for transients, are somewhat mu-
tually exclusive. The tradeoffs are exposed in the following
example for the CCT designer attempting a new boost-ca-
pable, or different core, transformer design.
The compromises are eased by separating the TX output
and RX input in the LM2893. An untuned TX coupling trans-
former with only core coupling (not air-coupled solenoid
windings) would employ a high permeability, high magnetic
field, low loss, square saturating, toroidal core. The reso-
nant RX path would be isolated from line-pull problems by a
unilateral amplifier that operates at line voltages with much
more than 110 dB of dynamic range, or by a capacitively
coupled pulse transformer driving a unilateral amplifier and
filter, for increased selectivity. See the LM2893-specific ap-
plications section.
Limited tests of CCT link range using this chip show exten-
sive coverage while remaining on one phase of a distribu-
tion transformer (100’s of m), with link failure often occuring
across transformer phases or through transformers unless
coupling networks are utilized. Total line attenuation allowed
from full signal to limiting sensitivity is more than 70 dB.
Typically, signal is coupled across transformer phases by
parasitic winding capacitance, typically giving 40 dB attenu-
ation between phased 115 V windings. Coupling capacitors
may be installed for improved link operation across phases.
Power factor correcting capacitor banks on industrial lines
or filter capacitors across the power lines of some electronic
gear short carrier signal and should be isolated with induc-
tors. Increasing range is sometimes accomplished by elect-
ing to install the isolating inductors (Figure 28) and coupling
capacitors, as well as by electing to use the boost option.
Frequency translating or time division multiplexed repeaters
will also increase range.
For a LM1893-style transformer application, first, choose
the turns ratio N based on an estimated lowest Z likely
L
encountered, Z . Figure 29 shows graphically how N af-
LN
fects line signal. N should be as large as possible to drive
Z
with full signal. If T has an unloaded Q, Q , of well less
1 U
LN
than 35, a guess of N somewhat high should be used and
later checked for accuracy. The recommended transformers
e
have secondary taps giving a choice of N 7.07, 10, and
14.1 (nominally) for driving Z ’s of 14, 7.0, and 3.5 X re-
LN
a e
e
e
35).
spectively (at T
25 C, V
18V, and Q
§
J
U
The resonating inductance of the tuned primary, L , is
1
sought. Note that, while standard transformer design gives a
transformer self-inductance with an impedance at operating
frequency well above load impedance, the tuned transform-
er requires a low L for adequate Q and minimum line pull.
1
U
Result: relatively poor mutual coupling.
TL/H/6750–40
FIGURE 28. An isolation network to prevent: 1) noise
from some device from polluting the AC line, and 2) to
R
e
L
(3)
1
2qF
Q
O
e
It is known that resonant frequency F
minimum bandwidth, or maximum Q, will be required to pass
signal under full load conditions.
F
O
and some
Q
stop some low impedance device (measured at F )
o
from shorting carrier signal. Component values given
e
residential power lines
as an example for F
125 kHz on
o
R
Z
O
LN Ê
Q
Q
ll l
l
L
e
L
(4)
1
2q F
Z
resistance R models all transformer losses and sets Q
is the reflected Z , Q is the loaded Q, and parallel
L
The Coupling Transformer
The design arrived at for T is the result of an unhappy
LN Ê
l
l
LN
.
O
Q
1
compromise - but a workable one. The goals of 1) building
R
Z
LN Ê
l
is found knowing that it absorbs full rated power.
Q
ll l
16
The Coupling Transformer (Continued)
Line pull DF was calculated (reference 3) for a Z magni-
Q
L
b
tude of 14X and up with any phase angle from 90 to 90 .
§
§
DF was 6.4% - well above the 3.3% estimate. Referring to
Q
(11), an 11.8% bandwidth is required, forcing L to be re-
1
duced to reduce Q. That fix was not implemented; some
signal attenuation under worst-case drift and DF is al-
Q
lowed. L is already so small that the 31 gauge winding
circulating current.
1
conducts a (/4 A
RMS
Line Carrier Detection
While the addition of a carrier detection circuit (for a mute or
squelch function) will only decrease receiver ultimate sensi-
tivity, there is sometimes good reason to employ it to free
the controller from watching for RX signal when no carrier is
incoming, or to employ it to reduce the probability of line
collisions (when multiple transmitters operate simultaneous-
ly to cause one or more transmissions to fail). Unless the
detector is heavily filtered or uses a high carrier amplitude
threshold, there will be false outputs that force the controller
to have Data Out data checking capability just as is required
when using no carrier detector. If false triggering is mini-
mized, the probability of line collisions is increased due to
the inability to sense low carrier amplitudes and because of
sense delay. The property of the LM1893 to change output
state infrequently (although the polarity is undefined) when
in the RX mode, with no incoming carrier, reduces the desire
to implement carrier detection and preserves the full ulti-
mate sensitivity. Also, many impulse-noise insensitive trans-
mission schemes, like handshaking, are easily modified to
recover from line collisions.
TL/H/6750–32
FIGURE 29. Impressed line voltage for a given Z
for each of the 3 taps available
L
on the recommended transformers
b
a
b
a
I
2(
V
V
)
(
4.7
V )I
a
a
OPP
ALC
O
e
e
V
O O
e
P
I
(5)
O
2
2
2
2
4
0
Ð
0
(
where I is in amps peak-to-peak at an elevated T
O
J
b
(18 4.7) 0.06
e
e
b
P
0.200 W
(6)
(7)
O
4
2
a
V
O
(
V
V
) 2
a 0
ALC
e
e
e
442 X
R
R
Z
LN Ê
l
Q
Q
ll l
P
I
O
O
is found using Z and the value for N found when as-
LN
e
suming Q
35.
U
2
N
2
(7.07) 13.9
e
e
Z
LN
e
Z
695 X
(8)
(9)
LN Ê
l
l
1
1
e
e
e
1210 X
R
Q
1
1
1
1
Regarding this, it should be stated that for very complicated
industrial systems with long signal runs and high line noise
levels, it is probably wise to use a protocol which is inherent-
ly collision free so that no carrier detect hardware or soft-
ware is needed. A token passing protocol is an example of
such a system.
b
e
b
R
Q
Z
Z
442 695
LN Ê
l
LN Ê
ll l
R
l
l
1210
Q
e
e
1 X
R
(10)
QS
2
2
a
a
35
1
Q
1
U
Only Q remains to be found to calculate L . Q is related to
L
L
the 3 dB (half-power) bandwidth by
1
b
Figure 30 shows a low cost carrier amplitude detection cir-
cuit.
1
e
Q
(11)
L
BW (% of F
)
O
Audio Transmission
An iterative solution is forced where line pull, DF , must be
Q
guessed to find Q and L . L is then used to check the line
The LM1893 is designed to allow analog data transmission
and reception. Base-band audio-bandwidth signals FM
modulate the carrier passing through the tuned transformer
(placing a limit on the usable percent modulation) onto the
power line to be linearly demodulated by the receiver PLL.
Because the receiver data path beyond the phase detector
will pass only digital signal, external audio filtering and am-
plification is required. Figure 31 shows a simple audio trans-
mitter and receiver circuit utilizing a carrier detection mute
circuit. A single LM339 quad. comparator may be used to
build the carrier detect and mute. Filter bandwidth is held to
a minimum to minimize noise, especially line-related corre-
lated noise.
L
1
1
pull guess; a large error requires a new guess. Try a BW of
8.7% - that is 4.4% for deviation, 1% for TC of F , and
O
e
3.3% for DF - giving Q
11.5.
Q
L
442
e
e
49.0 mH
L
1
(12)
c
c
2q 125 000 11.5
Knowing the core inductance per turn, L, and L , the num-
1
ber of turns is found.
L
49.0 mH
1
e
e
e
49 (/2 turns
T
(13)
1
L
20 nH/T
0 0
T is normally an integer, but these transformers require so
few turns that half-turns are specified, remembering that the
remaining (/2 turn is completed on the P.C. board and is
loosely coupled. The secondary turns are calculated
Communication and System
Protocols
The development of communication and system protocols
has historically been the single most time consuming ele-
ment in design of carrier current systems. The protocols are
defined as the following:
T
49.5
7.07
1
e
e
e
e
7.00 7 turns
T
(15)
2
N
giving an L of 0.98 mH. Note that the recommended 125
2
kHz transformer mirrors these specifications. The resonat-
ing capacitor is
1. Communication protocol: a software method of encoding
and decoding data that remains constant for every transmis-
1
b
9
e
33 nF
e
e
c
33.1 10
C
(16)
Q
2
) L
1
(2qF
Q
17
TL/H/6750–33
FIGURE 30. A simple carrier amplitude detector with output low when carrier is detected
TL/H/6750–34
FIGURE 31. A simple linear analog audio transmitter and receiver are shown.
The carrier and 1.6V inputs are derived from the carrier detector ofFigure 30.
The remaining 2 LM339 comparators may be used to build the carrier detector circuit.
Communication and System
Protocols (Continued)
sion in a system. Its first purpose is to put data in a base-
band digital form that is more easily recognized as a real
message at the receive end. Secondly, it incorporates en-
coding techniques to ensure that noise induced errors do
not easily occur; and when they do, they can always be
detected. Lastly, the software algorithms that are used on
the receive end to decode incoming data prevent the recep-
tion of noise induced ‘‘phantom’’ messages, and insure the
recovery of real messages from an incoming bit stream that
has been altered by noise.
ensure message retransmission to correct errors (hand-
shake). Secondly it coordinates messages for maximum uti-
lization and efficiency on the network. Lastly, it ensures that
messages do not collide on the network. Common system
protocols include master-slave, carrier detect multiple ac-
cess, and token passing. Token passing and master slave
have been found to be the most useful since they are inher-
ently collision free.
Both protocols usually reside as software in a single micro-
controller that is connected to the LM1893/2893 I/O. In any
case, some sort of intelligence is needed to process incom-
ing and outgoing messages. UARTs have no usefulness in
2. System protocol: the manner in which messages are co-
ordinated between nodes in a system. Its first purpose is to
18
transmission, using a random number of bits delay or a de-
lay based on each transmitter’s address, since each trans-
ceiver has a unique address.
Communication and System
Protocols (Continued)
carrier current applications since they do not have the intelli-
gence needed to distinguish between real messages and
noise induced phantoms.
An example of a simple transmission data packet is shown
in Figure 32. The 8 bit 50% duty-cycle preamble is long
enough to allow receiver biasing with enough bits left over
to allow the receiver controller to detect the square-wave
that signals the start of a transmission. If there had been no
transmission for some time, the receiver would simply need
to note that a data transition had occurred and begin its
watch for a square-wave. If the receive controller detected
the alternating-polarity data square-wave it would then use
the sync. bit to signal that the address and data were imme-
diately following. The address data would then be loaded,
assuming the fixed format, and tested against its own. If the
address was correct, the receiver would then load and store
the data. If the address was not correct, either the transmis-
sion was not meant for this receiver or noise has fooled the
receiver. In the former case, when the transmission was not
meant for the receiver, the controller should immediately
return to watching the incoming data for its address. If the
later case were true, then the receive controller would con-
tinue to detect edges, tieing itself up by loading false data
and being forced to handshake. The square-wave detection
and address load and check routines should be fast to mini-
mize the time spent in loops after being false-triggered by
noise. If the controller detects an error (a received data bit
that does not conform to the pre-defined encoding format) it
should immediately resume watching the LM1893’s Data
Out for transmissions, the next bit would be shifted in and
the process repeated.
The difficulty in designing special protocols arises out of the
special nature of the AC line, an environment laden with the
worst imaginable noise conditions. The relatively low data
rates possible over the AC line (typically less than 9600
baud) make it even more imperative that systems utilize the
most sophisticated means available to ensure network effi-
ciency.
With these facts in mind, the designer is referred to a publi-
cation intended to aid in the development of carrier current
Ý
systems. This is literature 570075 The Bi-Line Carrier Cur-
rent Networking System, a 200 pp. book that functions as
the ‘‘bible’’ of Bi-Line system design. It has sections on
LM1893 circuit optimization, protocol design, evaluation kit
usage, critical component selection, and the Datachecker/
DTS case study.
Basic Data Encoding (please refer to the pre-
viously mentioned publications for advanced techniques)
At the beginning of a received transmission, the first 0 to 2
bits may be lost while the chip’s receiver settles to the DC
bias point required for the given transmitter/receiver pair
carrier frequency offset. With proper data encoding,
dropped start bits can be tolerated and correct communica-
tion can take place. One simple data encoding scheme is
now discussed.
A line-synchronous CCT system passing 3 bits per half-cy-
cle may replace the long 8 bit preamble and sync pulse with
a 2 bit start-of-transmission bias preamble. The receive con-
troller might then assume that preamble always starts after
bit 1 (the first bit after zero-crossing) so that any data tran-
sition at a zero crossing must be the start of the address bits
and is tested as such. The line synchronous receiver oper-
ates with a simpler controller than an asynchronous system.
Generally, a CCT system consists of many transceivers that
normally listen to the line at all times (or during predeter-
mined time windows), waiting for a transmission that directs
one or more of the receivers to operate. If any receiver finds
its address in the transmitted data packet, further action
such as handshaking with the transmitter is initiated. The
receiver might tell the transmitter, via retransmission, that it
received this data, waiting for acknowledgement before act-
ing on the received command. Error detecting and correct-
ing codes may be employed throughout. The transmitter
must have the capability to retransmit after a time if no re-
sponse from the receiver is heard - under the assumption
that the receiver didn’t detect its address because of noise,
or that the response was missed because of noise or a line
collision. (A line collision happens when more than 1 trans-
mitter operates at one time - causing one or more of the
communications to fail). After many re-transmissions the
transmitter might choose to give up. Collision recovery is
achieved by waiting some variable amount of time before re-
Discussion has assumed that the controller has always
known when the Data Out is high or low. The controller
must sample at the proper time to check the Data Out state.
Since noise shows itself as pulse width jitter, symmetrically
placed about the no-noise switch-points, optimum Data Out
sampling is done in the center of the received data pulse.
The receive data path has a time delay that, at low data
rates, is dominated by the impulse noise filter integrator and
is nominally (/2 bit. At a 2 kHz data rate, an additional delay
of approximately (/10 bit is added because of the cumulative
delay of the remainder of the receiver. Figure 33 shows that
Data Out sampling occurs conveniently at the transmitted
TL/H/6750–35
FIGURE 32. A simple encoded data packet, generated by the transmit controller is shown.
The horizontal axis is time where 1 bit time is 1/(2f
)
DATA
19
Because the coupling transformer is used as a filter, the
LM1893 circuit is susceptible to pulling of the center fre-
quency under conditions of changing line impedances or
when several LM1893 circuits are close in proximity on the
AC line. Because the tuned transformer has a high value of
‘‘Q’’, ringing also occurs in the presence of impulsive noise.
This ringing occurs at the center frequency and increases
the error rate of transmissions, especially at relatively high
Basic Data Encoding (Continued)
l
data rates ( 2000 baud). Because it is the only tuned circuit
in the system, the selectivity characteristics leave a lot to be
desired.
The LM2893, having separate receive input and transmit
output pins, removes the limitations on coupling transformer
design, allowing the design of circuits devoid of the previous
limitations.
TL/H/6750–36
FIGURE 33. Operating waveforms of a line-
synchronized transceiver pair are shown. The diagram
shows how the transmitted data transitions may be
used as received data sampling points
The first enhancement that can be made with the LM2893
circuit is the use of a high permeability ferrite toroid for line
coupling along with a separate filter. The transformer would
be of broadband design (untuned) with two secondaries,
one for coupling to the transmit output and one for coupling
to the receive input. This allows impedance matching of
both the transmitter and receiver, with the result of quite a
bit more receive sensitivity.
data edges for the line synchronous data transmission
scheme mentioned in the previous paragraph. With the
asynchronous system suggested, the receive controller
must sample the Data Out pin often to determine, with sev-
eral bits of accuracy, where the square-wave data tran-
Because of the increased signal and separate receive signal
path, a 3 or 6 db pad can be used before the selective
stages to eliminate pulling of the center frequency due to
changes in line impedance.
sitions take place, average their positions assuming
a
known data rate, and calculate where the center of the data
bits are and will continue to be as the address and data are
read. A long preamble is helpful. Software that continuously
updates the center-of-bit time estimate, as address and
data are received, works even better. Alternatively, a coding
scheme employing an embedded clock can be used.
Another advantage of the toroidal transformer is that it can
be designed for use at very low line impedances due to its
inherent tight coupling.
SEPARATE FILTER
LM2893 Application Hints
Because of the separate receive path of the LM2893, a rela-
tively high quality bandpass filter can be used for selectivity.
Inexpensive ceramic filters are available that have band-
pass and center frequency characteristics compatible with
carrier current operation. Futhermore, the use of these fil-
ters allows multichannel operation, previously made difficult
by the single tuned network of the LM1893. These filters are
easily cascaded for even more off-frequency rejection. If the
pad is added before the filter, there will be negligible pulling
due to changes in line impedance reflected through the cou-
pling transformer.
The LM2893 is intended for advanced applications where
special circuitry is used in the transmit and receive paths.
The LM2893 makes this possible by featuring separate
transmit output and receive input pins.
Examples of enhancements that can be added to the basic
LM1893/2893 circuit include separate transmit and receive
windings on the coupling transformer, high quality ceramic
or LC filters in the receive path, and simple impulse noise
blanking circuits.
In many applications, the additional performance to be
gained outweighs the extra cost of the additional circuitry.
More than likely, high performance industrial applications
such as building energy management will fit into this catego-
ry, since they require the utmost in reliability.
Alternatively, a Butterworth/Chebyshev bandpass LC filter
or an active filter can be used in place of the ceramic filter.
IMPULSE NOISE BLANKER
Although the LM2893 has adequate impulse noise rejection
for most applications, there is reason to employ impulse
blanking to improve error rates in severe AC line environ-
ments. Typically, errors occur due to pulse jitter in the
LM1893/2893 data output that originates when the internal
time domain filter smooths out an incoming noise pulse.
Because of the specialized nature of individual LM2893 ap-
plications, it is not possible to give one circuit that will satisfy
all requirements for performance and cost effectiveness.
Therefore no specific application examples will be given.
Instead the subsequent text describes in general terms the
types of circuits that can be used to increase performance
along with their advantages and disadvantages. It is intend-
ed to be a springboard for ideas.
The solution involves removing the impulse completely and
not simply trying to filter it. Moreover, the pulse should be
removed in the receive signal path before the selective por-
tions of the circuit to eliminate ringing. This also allows the
receiver filter to smooth out the blanks that also occur in the
desired incoming carrier signal.
LM2893 COUPLING NETWORKS
The main disadvantages of the typical LM1893 coupling
network are that it functions as the bandpass filter, has
loose coupling between primary and secondary, and has a
single secondary. The LM1893 coupling network was de-
signed this way mainly because of the restraint that the car-
rier input and output are tied together.
If a carrier detect circuit is desired in conjunction with the
LM2893 it can be located after the filter and impulse blank-
er. Because impulse noise is removed, the false triggering
that plagues these circuits will be greatly reduced.
20
Simplified Schematic
21
References
4. FCC, ‘‘Notice of Proposed Rule Making,’’ Docket 20780,
adopted Apr. 14, 1976, (Proposed regulation)
1. Nicholson, J.R. and J.A. Malack; ‘‘RF Impedance of Pow-
er Lines and Line Impedance Stabilization Network in
Conducted Interference Measurements;’’ IEEE Transac-
tions on Electromagnetic Compatibility; May 1973; (line
impedance data)
5. Monticelli, Dennis M. and Michael E. Wright; ‘‘A Carrier
Current Transceiver IC for Data Transmission Over the
AC Power Lines;’’ IEEE J. Solid-State Circuits; vol. SC-17;
Dec. 1982; pp. 1158-1165; (LM1893 circuit description)
2. Southwick, R.A.; ‘‘Impedance Characteristics of Single-
Phase Power Lines;’’ Conference Rec.; 1973 IEEE Int.
Symp. on Electromagnetic Compatibility; (line impedance
data)
6. Lee, Mitchell; ‘‘A New Carrier Current Transceiver IC;’’
IEEE Trans. on Consumer Electronics; vol. CE-28; Aug.
1982; pp. 409–414; (Application of LM1893)
3. Hayt, William H. Jr. and Jack E. Kemmerly; ‘‘Engineering
Circuit Analysis;’’ McGraw-Hill Books; 1971; pp. 447–
453; (linear transformer reflected impedance)
22
Physical Dimensions inches (millimeters)
Molded Small Outline Package (M)
Order Part LM2893M
NS Package Number M20B
Molded Dual-In-Line Package (N)
Order Part LM1893N
NS Package Number N18A
23
Ý
Lit. 107664
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Part LM2893N
NS Package Number N20A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
National Semiconductor
Corporation
National Semiconductor
Europe
National Semiconductor
Hong Kong Ltd.
National Semiconductor
Japan Ltd.
a
1111 West Bardin Road
Arlington, TX 76017
Tel: 1(800) 272-9959
Fax: 1(800) 737-7018
Fax:
(
49) 0-180-530 85 86
@
13th Floor, Straight Block,
Ocean Centre, 5 Canton Rd.
Tsimshatsui, Kowloon
Hong Kong
Tel: (852) 2737-1600
Fax: (852) 2736-9960
Tel: 81-043-299-2309
Fax: 81-043-299-2408
Email: cnjwge tevm2.nsc.com
a
a
a
a
Deutsch Tel:
English Tel:
Fran3ais Tel:
Italiano Tel:
(
(
(
(
49) 0-180-530 85 85
49) 0-180-532 78 32
49) 0-180-532 93 58
49) 0-180-534 16 80
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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