LM25011 [NSC]
42V, 2A Constant On-Time Switching Regulator with Adjustable Current Limit; 42V ， 2A恒定导通时间开关稳压器具有可调电流限制
| 型号： | LM25011 |
| 厂家： | 
National Semiconductor |
| 描述： | 42V, 2A Constant On-Time Switching Regulator with Adjustable Current Limit |
| 文件： | 总16页 (文件大小：403K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
June 1, 2009
LM25011
42V, 2A Constant On-Time Switching Regulator with
Adjustable Current Limit
General Description
Features
The LM25011 Constant On-time Step-Down Switching Reg-
ulator features all the functions needed to implement a low
cost, efficient, buck bias regulator capable of supplying up to
2A of load current. This high voltage regulator contains an N-
Channel Buck switch, a startup regulator, current limit detec-
tion, and internal ripple control. The constant on-time
regulation principle requires no loop compensation, results in
fast load transient response, and simplifies circuit implemen-
tation. The operating frequency remains constant with line
and load. The adjustable valley current limit detection results
in a smooth transition from constant voltage to constant cur-
rent mode when current limit is reached, without the use of
current limit foldback. The PGD output indicates the output
voltage has increased to within 5% of the expected regulation
value. Additional features include: Low output ripple, VIN un-
der-voltage lock-out, adjustable soft-start timing, thermal
shutdown, gate drive pre-charge, gate drive under-voltage
lock-out, and maximum duty cycle limit.
Input operating voltage range: 6V to 42V
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■
■
■
■
■
■
■
Absolute maximum input rating: 45V
Integrated 2A N-Channel Buck Switch
Adjustable current limit
Adjustable output voltage from 2.51V
Minimum ripple voltage at VOUT
Power Good output
Switching frequency adjustable to 2 MHz
Switching frequency remains nearly constant with load
current and input voltage variations
■
Ultra-fast transient response
■
■
■
■
■
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No loop compensation required
Stable operation with ceramic output capacitors
Adjustable Soft-Start timing
Thermal shutdown
Precision 2% feedback reference
Package
MSOP-10EP
■
Typical Application, Basic Step-Down Regulator
30094601
© 2009 National Semiconductor Corporation
300946
www.national.com
Connection Diagram
30094602
Top View
10 Lead MSOP-EP
Ordering Information
Order Number
LM25011MY
Package Type
NSC Package Drawing
MUC10A
Supplied As
MSOP-10EP
MSOP-10EP
1000 Units on Tape and Reel
3500 Units on Tape and Reel
LM25011MYX
MUC10A
Pin Descriptions
Pin No. Name
Description
Application Information
1
2
3
VIN
Input supply voltage
On-time Control
Power Good
Operating input range is 6V to 42V. Transient capability is 45V. A low ESR
capacitor must be placed as close as possible to the VIN and SGND pins.
RT
An external resistor from VIN to this pin sets the buck switch on-time, and
the switching frequency.
PGD
Logic output indicates when the voltage at the FB pin has increased to
above 95% of the internal reference voltage. Hysteresis is provided. An
external pull-up resistor to a voltage less than 7V is required.
4
SS
Soft-Start
An internal current source charges an external capacitor to provide the soft-
start function.
5
6
SGND
FB
Signal Ground
Feedback
Ground for all internal circuitry other than the current limit sense circuit.
Internally connected to the regulation comparator. The regulation level is
2.51V.
7
8
CSG
CS
Current Sense Ground
Current sense
Ground connection for the current limit sensing circuit. Connect to ground
and to the current sense resistor.
Connect to the current sense resistor and the anode of the free-wheeling
diode.
9
SW
Switching Node
Internally connected to the buck switch source. Connect to the external
inductor, cathode of the free-wheeling diode, and bootstrap capacitor.
10
BST
Bootstrap capacitor connection of the Connect a 0.1 µF capacitor from SW to this pin. The capacitor is charged
buck switch gate driver. during the buck switch off-time via an internal diode.
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2
RT to SGND
FB to SGND
-0.3V to 1V
-0.3V to 7V
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Rating (Note 2)
Human Body Model
Lead Temperature (soldering 4 sec)
Storage Temperature Range
Junction Temperature
2kV
260°C
-65°C to +150°C
150°C
VIN to SGND (TJ = 25°C)
BST to SGND
45V
52V
SW to SGND (Steady State)
BST to SW
CS to CSG
CSG to SGND
PGD to SGND
-1.5V to 45V
-0.3V to 7V
-0.3V to 0.3V
-0.3V to 0.3V
-0.3V to 7V
-0.3V to 3V
Operating Ratings (Note 1)
VIN Voltage
6.0V to 42V
–40°C to +125°C
Junction Temperature
SS to SGND
Electrical Charateristics Specifications with standard type are for TJ = 25°C only; limits in boldface type apply
over the full Operating Junction Temperature (TJ) range. Minimum and Maximum limits are guaranteed through test, design, or
statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference
purposes only. Unless otherwise stated the following conditions apply: VIN = 12V, RT = 50 kΩ.
Symbol
Input (VIN Pin)
IIN
Parameter
Conditions
Min
Typ
Max Units
Input operating current
Non-switching, FB = 3V
VIN Increasing
1200 1600
µA
V
UVLOVIN
VIN under-voltage lock-out threshold
4.6
5.3
5.9
VIN under-voltage lock-out threshold
hysteresis
200
mV
Switch Characteristics
RDS(ON)
Buck Switch RDS(ON)
ITEST = 200 mA
BST-SW
0.3
3.4
0.6
4.4
Ω
V
UVLOGD
Gate Drive UVLO
2.4
UVLOGD Hysteresis
350
1.4
mV
V
Pre-charge switch voltage
Pre-charge switch on-time
ITEST = 10 mA into SW pin
120
ns
Soft-Start Pin
VSS
Pull-up voltage
2.51
10
V
ISS
Internal current source
Shutdown Threshold
µA
mV
VSS-SH
70
140
Current Limit
VILIM
Threshold voltage at CS
CS bias current
-146
-130
-120
-35
-115
250
mV
µA
µA
FB = 3V
FB = 3V
CSG bias current
On Timer, RT Pin
tON - 1
On-time
150
200
75
ns
ns
ns
ns
VIN = 12V, RT = 50 kΩ
VIN = 32V, RT = 50 kΩ
VIN = 12V, RT = 50 kΩ
VIN = 12V, RT = 301 kΩ
tON - 2
tON - 3
tON - 4
On-time
On-time (current limit)
On-time
100
1020
Off Timer
tOFF
Minimum Off-time
90
150
208
ns
Regulation Comparator (FB Pin)
VREF FB regulation threshold
FB bias current
SS pin = steady state
FB = 3V
2.46
2.51
100
2.56
V
nA
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Symbol
Power Good (PGD pin)
Threshold at FB, with respect to VREF
Parameter
Conditions
Min
91
Typ
Max Units
FB increasing
95
3.3
125
0.1
%
%
Threshold hysteresis
Low state voltage
Off state leakage
PGDVOL
PGDLKG
IPGD = 1mA, FB = 0V
VPGD = 7V, FB = 3V
180
mV
µA
Thermal Shutdown
TSD
Thermal shutdown
Junction temperature increasing
155
20
°C
°C
Thermal shutdown hysteresis
Thermal Resistance
Junction to Ambient, 0 LFPM Air Flow
(note 3)
48
10
°C/W
°C/W
θJA
Junction to Case, (note 3)
θJC
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin.
Note 3: JEDEC test board description can be found in JESD 51-5 and JESD 51-7.
Note 4: Current flow out of a pin is indicated as a negative number.
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Typical Performance Characteristics
Efficiency (Circuit of Figure 5)
Efficiency at 2 MHz
30094603
30094604
On-Time vs VIN and RT
Voltage at the RT Pin
30094606
30094605
Shutdown Current into VIN
Operating Current into VIN
30094607
30094608
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PGD Low Voltage vs. Sink Current
Reference Voltage vs. Temperature
30094609
30094610
Current Limit Threshold vs. Temperature
Operating Current vs. Temperature
30094611
30094612
VIN UVLO vs. Temperature
SS Pin ShutdownThreshold vs. Temperature
30094613
30094614
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On-Time vs. Temperature
Minimum Off-Time vs. Temperature
30094615
30094616
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Block Diagram
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30094618
FIGURE 1. Startup Sequence
charge, gate drive under-voltage lock-out, and maximum duty
cycle limit.
Functional Description
The LM25011 Constant On-time Step-down Switching Reg-
ulator features all the functions needed to implement a low
cost, efficient buck bias power converter capable of supplying
up to 2.0A to the load. This high voltage regulator contains an
N-Channel buck switch, is easy to implement, and is available
in a 10-pin MSOP power enhanced package. The regulator’s
operation is based on a constant on-time control principle with
the on-time inversely proportional to the input voltage. This
feature results in the operating frequency remaining relatively
constant with load and input voltage variations. The constant
on-time feedback control principle requires no loop compen-
sation resulting in very fast load transient response. The
adjustable valley current limit detection results in a smooth
transition from constant voltage to constant current when cur-
rent limit is reached. To aid in controlling excessive switch
current due to a possible saturating inductor the on-time is
reduced by ≊40% when current limit is detected. The Power
Good output (PGD pin) indicates when the output voltage is
within 5% of the expected regulation voltage.
Control Circuit Overview
The LM25011 buck regulator employs a control principle
based on a comparator and a one-shot on-timer, with the out-
put voltage feedback (FB) compared to an internal reference
(2.51V). If the FB voltage is below the reference the internal
buck switch is switched on for the one-shot timer period,
which is a function of the input voltage and the programming
resistor (RT). Following the on-time the switch remains off until
the FB voltage falls below the reference, but never less than
the minimum off-time forced by the off-time one-shot timer.
When the FB pin voltage falls below the reference and the off-
time one-shot period expires, the buck switch is then turned
on for another on-time one-shot period.
When in regulation, the LM25011 operates in continuous con-
duction mode at heavy load currents and discontinuous con-
duction mode at light load currents. In continuous conduction
mode the inductor’s current is always greater than zero, and
the operating frequency remains relatively constant with load
and line variations. The minimum load current for continuous
conduction mode is one-half the inductor’s ripple current am-
The LM25011 can be implemented to efficiently step-down
higher voltages in non-isolated applications. Additional fea-
tures include: Low output ripple, VIN under-voltage lock-out,
adjustable soft-start timing, thermal shutdown, gate drive pre-
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plitude. The approximate operating frequency is calculated as
follows:
The on-time must be chosen greater than 90 ns for proper
operation. Equations 1, 5 and 6 are valid only during normal
operation - i.e., the circuit is not in current limit. When the
LM25011 operates in current limit, the on-time is reduced by
≊40%. This feature reduces the peak inductor current which
may be excessively high if the load current and the input volt-
age are simultaneously high. This feature operates on a
cycle-by-cycle basis until the load current is reduced and the
output voltage resumes its normal regulated value. The max-
imum continuous current into the RT pin must be less than 2
mA. For high frequency applications, the maximum switching
frequency is limited at the maximum input voltage by the min-
imum on-time one-shot period (90 ns). At minimum input
voltage the maximum switching frequency is limited by the
minimum off-time one-shot period, which, if reached, pre-
vents achievement of the proper duty cycle.
(1)
The buck switch duty cycle is approximately equal to:
(2)
When the load current is less than one half the inductor’s rip-
ple current amplitude the circuit operates in discontinuous
conduction mode. The off-time is longer than in continuous
conduction mode while the inductor current is zero, causing
the switching frequency to reduce as the load current is re-
duced. Conversion efficiency is maintained at light loads
since the switching losses are reduced with the reduction in
load and frequency. The approximate discontinuous operat-
ing frequency can be calculated as follows:
Current Limit
Current limit detection occurs during the off-time by monitor-
ing the voltage across the external current sense resistor
RS. Referring to the Block Diagram, during the off-time the
recirculating current flows through the inductor, through the
load, through the sense resistor, and through D1 to the in-
ductor. If the voltage across the sense resistor exceeds the
threshold (VILIM) the current limit comparator output switches
to delay the start of the next on-time period. The next on-time
starts when the recirculating current decreases such that the
voltage across RS reduces to the threshold and the voltage at
FB is below 2.51V. The operating frequency is typically lower
due to longer-than-normal off-times. When current limit is de-
tected, the on-time is reduced by ≊40% if the voltage at the
FB pin is below its threshold when the voltage across RS re-
duces to its threshold (VOUT is low due to current limiting).
(3)
where RL = the load resistance, and L1 is the circuit’s inductor.
The output voltage is set by the two feedback resistors
(RFB1, RFB2 in the Block Diagram). The regulated output volt-
age is calculated as follows:
VOUT = 2.51V x (RFB1 + RFB2) / RFB1
(4)
Ripple voltage, which is required at the input of the regulation
comparator for proper output regulation, is generated inter-
nally by the LM25011’s ERM (Emulated Ripple Mode) control
block. The ERM circuit generates the required internal ripple
voltage from the ripple waveform at the CS pin during each
Figure 2 illustrates the inductor current waveform during nor-
mal operation and in current limit. During the first “Normal
Operation” the load current is I01, the average of the inductor
current waveform. As the load resistance is reduced, the in-
ductor current increases until the lower peak of the inductor
ripple current exceeds the threshold. During the “Current Lim-
ited” portion of Figure 2, each on-time is reduced by ≊40%,
resulting in lower ripple amplitude for the inductor’s current.
During this time the LM25011 is in a constant current mode
with an average load current equal to the current limit thresh-
old plus half the ripple amplitude (IOCL), and the output voltage
is below the normal regulated value. Normal operation re-
sumes when the load current is reduced (to IO2), allowing
VOUT and the on-time to return to their normal values. Note
that in the second period of “Normal Operation”, even though
the inductor’s peak current exceeds the current limit threshold
during part of each cycle, the circuit is not in current limit since
the inductor current falls below the current limit threshold dur-
ing each off time. The peak current allowed through the buck
switch is 3.5A, and the maximum allowed average current is
2.0A.
off-time. This feature eliminates the need for ripple at VOUT
,
allowing output ripple to be kept to a minimum. Output ripple
is therefore a function of the inductor’s ripple current and the
characteristics of the output capacitor.
On-Time Timer
The on-time for the LM25011 is determined by the RT resistor
and the input voltage (VIN), calculated from:
(5)
The inverse relationship with VIN results in a nearly constant
frequency as VIN is varied. To set a specific continuous con-
duction mode switching frequency (FS), the RT resistor is
determined from the following:
(6)
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30094624
FIGURE 2. Normal and Current Limit Operation
from the internal 5V regulator for the next on-time. The mini-
mum off-time ensures a sufficient time each cycle to recharge
the bootstrap capacitor.
Ripple Requirements
The LM25011 requires a minimum of 10 mVp-p ripple voltage
at the CS pin. That ripple voltage is generated by the de-
creasing recirculating current (the inductor’s ripple current)
through RS during the off-time. See Figure 3.
Soft-Start
The soft-start feature allows the converter to gradually reach
a steady state operating point, thereby reducing startup
stresses and current surges. Upon turn-on, when VIN reaches
its under-voltage lock-out threshold an internal 10 µA current
source charges the external capacitor at the SS pin to 2.51V
(t1 in Figure 1). The ramping voltage at SS ramps the non-
inverting input of the regulation comparator, and the output
voltage, in a controlled manner. For proper operation, the soft-
start capacitor should be no smaller than 1000 pF.
The LM25011 can be employed as a tracking regulator by
applying the controlling voltage to the SS pin. The regulator’s
output voltage tracks the applied voltage, gained up by the
ratio of the feedback resistors. The applied voltage at the SS
pin must be within the range of 0.5V to 2.6V. The absolute
maximum rating for the SS pin is 3.0V. If the tracking function
causes the voltage at the FB pin to go below the thresholds
for the PGD pin, the PGD pin will switch low (see the Power
Good Output section). An internal switch grounds the SS pin
if the input voltage at VIN is below its under-voltage lock-out
threshold or if the Thermal Shutdown activates. If the tracking
function (described above) is used, the tracking voltage ap-
plied to the SS pin must be current limited to a maximum of 1
mA.
30094625
FIGURE 3. CS Pin Waveform
The ripple voltage is equal to:
VRIPPLE = ΔI x RS
where ΔI is the inductor current ripple amplitude, and RS is
the current sense resistor at the CS pin.
N-Channel Buck Switch and Driver
The LM25011 integrates an N-Channel buck switch and as-
sociated floating high voltage gate driver. The gate driver
circuit works in conjunction with an external bootstrap capac-
itor (CBST) and an internal high voltage diode. A 0.1 µF ca-
pacitor connected between BST and SW provides the supply
voltage for the driver during the on-time. During each off-time,
the SW pin is at approximately -1V, and CBST is recharged
Shutdown Function
The SS pin can be used to shutdown the LM25011 by ground-
ing the SS pin as shown in Figure 4. Releasing the pin allows
normal operation to resume.
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RFB2/RFB1 = (VOUT/2.51V) - 1
(7)
For this example, RFB2/RFB1 = 0.992. RFB1 and RFB2 should
be chosen from standard value resistors in the range of 1.0
kΩ – 10 kΩ which satisfy the above ratio. For this example,
4.99 kΩ is chosen for both resistors, providing a 5.02V output.
30094626
RT: This resistor sets the on-time, and (by default) the switch-
ing frequency. First check that the desired frequency does not
require an on-time or off-time shorter than the minimum al-
lowed values (90 ns and 150, respectively). The minimum on-
time occurs at the maximum input voltage. For this example:
FIGURE 4. Shutdown Implemetation
Power Good Output (PGD)
The Power Good output (PGD) indicates when the voltage at
the FB pin is close to the internal 2.51V reference voltage.
The rising threshold at the FB pin for the PGD output to switch
high is 95% of the internal reference. The falling threshold for
the PGD output to switch low is approximately 3.3% below the
rising threshold.
The minimum off-time occurs at the minimum input voltage.
For this example:
The PGD pin is internally connected to the drain of an N-
channel MOSFET switch. An external pull-up resistor
(RPGD), connected to an appropriate voltage not exceeding
7V, is required at PGD to indicate the LM25011’s status to
other circuitry. When PGD is low, the pin’s voltage is deter-
mined by the current into the pin. See the graph “PGD Low
Voltage vs. Sink Current”.
Both the on-time and off-time are acceptable since they are
significantly greater than the minimum value for each. The
RT resistor is calculated from equation 6 using the minimum
input voltage:
Upon powering up the LM25011, the PGD pin is high until the
voltage at VIN reaches 2V, at which time PGD switches low.
As VIN is increased PGD stays low until the output voltage
takes the voltage at the FB pin above 95% of the internal ref-
erence voltage, at which time PGD switches high. As VIN is
decreased (during shutdown) PGD remains high until either
the voltage at the FB pin falls below ≊92% of the internal ref-
erence, or when VIN falls below its lower UVLO threshold,
whichever occurs first. PGD then switches low, and remains
low until VIN falls below 2V, at which time PGD switches high.
If the LM25011 is used as a tracking regulator (see the Soft-
start section), the PGD output is high as long as the voltage
at the FB pin is above the thresholds mentioned above.
A standard value 118 kΩ resistor is selected. The minimum
on-time calculates to 152 ns at Vin = 36V, and the maximum
on-time calculates to 672 ns at Vin = 8V
L1: The parameters controlled by the inductor are the inductor
current ripple amplitude (IOR), and the ripple voltage ampli-
tude across the current sense resistor RS. The minimum load
current is used to determine the maximum allowable ripple in
order to maintain continuous conduction mode (the lower
peak does not reach 0 mA). This is not a requirement of the
LM25011, but serves as a guideline for selecting L1. For this
example, the maximum ripple current should be less than:
Thermal Shutdown
The LM25011 should be operated so the junction temperature
does not exceed 125°C. If the junction temperature increases
above that, an internal Thermal Shutdown circuit activates
(typically) at 155°C, taking the controller to a low power reset
state by disabling the buck switch and taking the SS pin to
ground. This feature helps prevent catastrophic failures from
accidental device overheating. When the junction tempera-
ture reduces below 135°C (typical hysteresis = 20°C) normal
operation resumes.
IOR(max) = 2 x IOUT(min) = 600 mA p-p
(8)
For applications where the minimum load current is zero, a
good starting point for allowable ripple is 20% of the maximum
load current. In this case substitute 20% of IOUT(max) for IOUT
(min) in equation 8. The ripple amplitude calculated in Equation
8 is then used in the following equation:
Applications Information
EXTERNAL COMPONENTS
The procedure for calculating the external components is il-
lustrated with a design example. Referring to the Block Dia-
gram, the circuit is to be configured for the following
specifications:
A standard value 10 µH inductor is chosen. Using this inductor
value, the maximum ripple current amplitude, which occurs at
maximum VIN, calculates to 472 mAp-p, and the peak current
is 1736 mA at maximum load current. Ensure the selected
inductor is rated for this peak current. The minimum ripple
current, which occurs at minimum VIN, calculates to 200 mAp-
p.
•
•
•
VOUT = 5V
VIN = 8V to 36V
Minimum load current for continuous conduction mode
(IOUT(min) = 300 mA
RS: The minimum current limit threshold is calculated at max-
imum load current, using the minimum ripple current calcu-
lated above. The current limit threshold is the lower peak of
the inductor current waveform when in current limit (see Fig-
ure 2).
•
•
•
Maximum load current (IOUT(max) = 1.5 A
Switching frequency (FS) = 1.0 MHz
Soft-start time = 5 ms
RFB2 and RFB1: These resistors set the output voltage, and
ILIM = 1.5A – (0.2 A/2) = 1.4A
their ratio is calculated from:
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Current limit detection occurs when the voltage across the
sense resistor (RS) reaches the current limit threshold. To al-
low for tolerances, the sense resistor value is calculated using
the minimum threshold specification:
at VIN, since it is assumed the voltage source feeding VIN has
some amount of source impedance. When the buck switch
turns on, the current into VIN suddenly increases to the lower
peak of the inductor’s ripple current, then ramps up to the up-
per peak, then drops to zero at turn-off. The average current
during the on-time is the average load current. For a worst
case calculation, CIN must supply this average load current
during the maximum on-time, without letting the voltage at the
VIN pin drop below a minimum operating level of 5.5V. For
this exercise 0.5V is chosen as the maximum allowed input
ripple voltage. Using the maximum load current, the minimum
value for CIN is calculated from:
RS = 115 mV/1.4A = 82 mΩ
The next smaller standard value, 80 mΩ, is selected. The next
step is to ensure that sufficient ripple voltage occurs across
RS with this value sense resistor. As mentioned in the Ripple
Requirements section, a minimum of 10mVp-p voltage ripple
is required across the RS sense resistor during the off-time to
ensure the regulation circuit operates properly. The ripple
voltage is the product of the inductor ripple current amplitude
and the sense resistor value. In this case, the minimum ripple
voltage calculates to:
(9)
VRIPPLE = ΔI x RS = 200 mA x 0.080Ω = 16 mV
where tON is the maximum on-time, and ΔV is the allowable
ripple voltage at VIN. The purpose of CBYP is to minimize tran-
sients and ringing due to long lead inductance leading to the
VIN pin. A low ESR 0.1 µF ceramic chip capacitor is recom-
mended, and CBYP must be located close to the VIN and
SGND pins.
If the ripple voltage had calculated to less than 10 mVp-p the
inductor value would have to be reduced to increase the ripple
current amplitude. This would have required a recalculation
of ILIM and RS in the above equations. Since the minimum
requirement is satisfied in this case no change is necessary.
The nominal current limit threshold calculates to 1.63A. The
minimum and maximum thresholds calculate to 1.44A and
1.83A respectively, using the minimum and maximum limits
for the current limit threshold specification. The load current
is equal to the threshold current plus one half the ripple cur-
rent. Under normal load conditions, the maximum power dis-
sipation in RS occurs at maximum load current, and at
maximum input voltage where the on-time duty cycle is min-
imum. In this design example, the minimum on-time duty
cycle is:
CBST: The recommended value for CBST is 0.1 µF. A high
quality ceramic capacitor with low ESR is recommended as
CBST supplies a surge current to charge the buck switch gate
at each turn-on. A low ESR also helps ensure a complete
recharge during each off-time.
CSS: The capacitor at the SS pin determines the soft-start
time, i.e. the time for the output voltage to reach its final value
(t1 in Figure 1). For a soft-start time of 5 ms, the capacitor
value is determined from the following:
D1: A Schottky diode is recommended. Ultra-fast recovery
diodes are not recommended as the high speed transitions at
the SW pin may affect the regulator’s operation due to the
diode’s reverse recovery transients. The diode must be rated
for the maximum input voltage, the maximum load current,
and the peak current which occurs when the current limit and
maximum ripple current are reached simultaneously. The
diode’s average power dissipation is calculated from:
At maximum load current, the power dissipation in RS is equal
to:
P(RS) = (1.5A)2 x 0.080Ω x (1 – 0.139) = 155 mW
When in current limit the maximum power dissipation in RS
calculates to
P(RS) = (1.83A + 0.472A/4)2 x 0.080Ω = 304 mW
Duty cycle is not included in this power calculation since the
on-time duty cycle is typically <5% when in current limit.
PD1 = VF x IOUT x (1 - D)
where VF is the diode’s forward voltage drop, and D is the on-
time duty cycle.
COUT: The output capacitor should typically be no smaller than
3.3 µF, although that is dependent on the frequency and the
desired output characteristics. COUT should be a low ESR
good quality ceramic capacitor. Experimentation is usually
necessary to determine the minimum value for COUT, as the
nature of the load may require a larger value. A load which
creates significant transients requires a larger value for
COUT than a non-varying load.
FINAL CIRCUIT
The final circuit is shown in Figure 5, and its performance is
shown in Figure 6 and Figure 7. The current limit measured
approximately 1.62A at Vin = 8V, and 1.69A at Vin = 36V.
CIN and CBYP: The purpose of CIN is to supply most of the
switch current during the on-time, and limit the voltage ripple
13
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30094634
FIGURE 5. Example Circuit
PC BOARD LAYOUT
The LM25011 regulation and current limit comparators are
very fast, and respond to short duration noise pulses. Layout
considerations are therefore critical for optimum perfor-
mance. The layout must be as neat and compact as possible,
and all of the components must be as close as possible to
their associated pins. The two major current loops conduct
currents which switch very fast, and therefore those loops
must be as small as possible to minimize conducted and ra-
diated EMI. The first loop is formed by CIN, through the VIN
to SW pins, L1, COUT, and back to CIN. The second current
loop is formed by RS, D1, L1, COUT and back to RS. The
ground connection from CSG to the ground end of CIN should
be as short and direct as possible.
The power dissipation within the LM25011 can be approxi-
mated by determining the circuit’s total conversion loss (PIN
-
POUT), and then subtracting the power losses in the free-
wheeling diode, the sense resistor, and the inductor. The
power loss in the diode is approximately:
30094603
FIGURE 6. Efficiency (Circuit of Figure 5)
PD1 = IOUT x VF x (1-D)
where Iout is the load current, VF is the diode’s forward volt-
age drop, and D is the on-time duty cycle. The power loss in
the sense resistor is:
PRS = (IOUT)2 x RS x (1 – D)
The power loss in the inductor is approximately:
PL1 = IOUT2 x RL x 1.1
where RL is the inductor’s DC resistance, and the 1.1 factor
is an approximation for the AC losses. If it is expected that the
internal dissipation of the LM25011 will produce excessive
junction temperatures during normal operation, good use of
the PC board’s ground plane can help to dissipate heat. Ad-
ditionally the use of wide PC board traces, where possible,
can help conduct heat away from the IC pins. Judicious po-
sitioning of the PC board within the end product, along with
the use of any available air flow (forced or natural convection)
can help reduce the junction temperature.
30094636
FIGURE 7. Frequency vs VIN (Circuit of Figure 5)
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14
Physical Dimensions inches (millimeters) unless otherwise noted
10-Lead MSSOP-EP Package
NS Package Number MUC10A
15
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