LM2750LDX-ADJ/NOPB [NSC]
IC SWITCHED CAPACITOR REGULATOR, PDSO10, 3 X 3 MM, LLP-10, Switching Regulator or Controller;
| 型号： | LM2750LDX-ADJ/NOPB |
| 厂家： | 
National Semiconductor |
| 描述： | IC SWITCHED CAPACITOR REGULATOR, PDSO10, 3 X 3 MM, LLP-10, Switching Regulator or Controller 光电二极管 |
| 文件： | 总16页 (文件大小：766K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
December 2005
LM2750
Low Noise Switched Capacitor Boost Regulator
General Description
Features
n Inductorless solution: Application requires only 3 small
ceramic capacitors
The LM2750 is a regulated switched-capacitor doubler that
produces a low-noise output voltage. The 5.0V output volt-
age option (LM2750-5.0) can supply up to 120mA of output
current over a 2.9V to 5.6V input range, as well as up to
40mA of output current when the input voltage is as low as
2.7V. An adjustable output voltage option with similar output
current capabilities is also available (LM2750-ADJ). The
LM2750 has been placed in National’s 10-pin LLP, a pack-
age with excellent thermal properties that keeps the part
from overheating under almost all rated operating conditions
n Fixed 5.0V output and adjustable output voltage options
available
n 85% Peak Efficiency
70% Average Efficiency over Li-Ion Input Range
(2.9V-to-4.2V)
n Output Current up to 120mA with 2.9V ≤ VIN ≤ 5.6V
Output Current up to 40mA with 2.7V ≤ VIN ≤ 2.9V
n Wide Input Voltage Range: 2.7V to 5.6V
n Fixed 1.7MHz switching frequency for a low-noise,
low-ripple output signal
n Pre-regulation minimizes input current ripple, keeping
the battery line (VIN) virtually noise-free
n Tiny LLP package with outstanding power dissipation:
Usually no derating required.
A perfect fit for space-constrained, battery-powered applica-
tions, the LM2750 requires only 3 external components: one
input capacitor, one output capacitor, and one flying capaci-
tor. Small, inexpensive ceramic capacitors are recom-
mended for use. These capacitors, in conjunction with the
1.7MHz fixed switching frequency of the LM2750, yield low
output voltage ripple, beneficial for systems requiring a low-
noise supply. Pre-regulation minimizes input current ripple,
reducing input noise to negligible levels.
n Shutdown Supply Current less than 2µA
Applications
A tightly controlled soft-start feature limits inrush currents
during part activation. Shutdown completely disconnects the
load from the input. Output current limiting and thermal
shutdown circuitry protect both the LM2750 and connected
devices in the event of output shorts or excessive current
loads.
n White and Colored LED-based Display Lighting
n Cellular Phone SIM cards
n Audio Amplifier Power Supplies
n General Purpose Li-Ion-to-5V Conversion
Typical Application Circuit
20035101
© 2005 National Semiconductor Corporation
DS200351
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Connection Diagram
LM2750
10-Pin Leadless Leadframe Package (LLP) - 3mm X 3mm
NS Package Number LDA10A (Shown below), and SDA10A
20035102
Pin Names and Numbers apply to both SDA10A and LDA10A packages.
Pin Descriptions
Pin #(s)
8, 9
1, 2
10
Pin Name
VIN
Description
Input Voltage - The pins must be connected externally.
Output Voltage - These pins must be connected externally.
Flying Capacitor Positive Terminal
VOUT
CAP+
CAP-
7
Flying Capacitor Negative Terminal
Active-Low Shutdown Input. A 200kΩ resistor is connected internally between
this pin and GND to pull the voltage on this pin to 0V, and shut down the part,
when the pin is left floating.
4
SD
This pin must be connected exernally to the ground pins (pins 5, 6, and the
DAP).
LM2750-5.0: GND
3
LM2750-ADJ: FB Feedback Pin
GND Ground - These pins must be connected externally.
5, 6, DAP
Ordering Information
Output Voltage
Option
5.0
Ordering
Package
(Note 1)
LDA10A
LDA10A
LDA10A
LDA10A
SDA10A
SDA10A
SDA10A
SDA10A
Package
Marking
S002B
S002B
S003B
S003B
S005B
S005B
S004B
S004B
Supplied as
Information
LM2750LD-5.0
LM2750LDX-5.0
LM2750LD-ADJ
LM2750LDX-ADJ
LM2750SD-5.0
LM2750SDX-5.0
LM2750SD-ADJ
LM2750SDX-ADJ
1000 Units, Tape and Reel
4500 Units, Tape and Reel
1000 Units, Tape and Reel
4500 Units, Tape and Reel
1000 Units, Tape and Reel
4500 Units, Tape and Reel
1000 Units, Tape and Reel
4500 Units, Tape and Reel
5.0
Adjustable
Adjustable
5.0
5.0
Adjustable
Adjustable
Note 1: LDA10A Package: 10 pad pullback LLP. SDA10A Package: 10 pad non-pullback LLP. For more details, refer to the package drawings in the Physical
Dimensions section at the end of this datasheet.
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2
Absolute Maximum Ratings (Notes 2, 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Operating Ratings (Notes 2, 3)
LM2750-5.0 Input Voltage Range
2.7V to 5.6V
LM2750-ADJ Input Voltage Range
3.8V ≤ VOUT ≤ 4.9V:
4.9V ≤ VOUT ≤ 5.2V:
2.7V to (VOUT+0.7V)
2.7V to 5.6V
VIN Pin: Voltage to Ground
SD Pin: Voltage to GND
−0.3V to 6V
−0.3V to
LM2750-ADJ Output Voltage Range
Recommended Output Current
2.9V ≤ VIN ≤ 5.6V
3.8V to 5.2V
(VIN+0.3V)
Junction Temperature (TJ-MAX-ABS
Continuous Power Dissipation
(Note 4)
)
150˚C
0 to 120mA
0 to 40mA
Internally Limited
2.7V ≤ VIN ≤ 2.9V
Junction Temperature (TJ) Range
Ambient Temperature (TA) Range
(Note 7)
-40˚C to 125˚C
-40˚C to 85˚C
Maximum Output Current (Note 5)
Storage Temperature Range
Maximum Lead Temperature
(Soldering, 5 sec.)
175mA
−65˚C to 150˚C
260˚C
Thermal Information
ESD Rating (Note 6)
Human-body model:
2 kV
Junction-to-Ambient Thermal
Resistance, LLP-10
Machine model
100V
55˚C/W
Package (θJA) (Note 8)
Electrical Characteristics (Notes 3, 9)
Typical values and limits in standard typeface apply for TJ = 25oC. Limits in boldface type apply over the operating junction
temperature range. Unless otherwise specified: 2.9V ≤ VIN ≤ 5.6V, VOUT = 5.0V (LM2750-ADJ), V(SD) = VIN, CFLY = 1µF, CIN
= 2 x 1µF, COUT = 2 x 1µF (Note 10).
Symbol
Parameter
Conditions
2.9V ≤ VIN ≤ 5.6V,
IOUT ≤ 120mA
2.7V ≤ VIN ≤ 2.9V,
IOUT ≤ 40mA
Min
4.80
(-4%)
4.80
Typ
Max
5.20
(+4%)
5.20
(+4%)
10
Units
5.0
Output Voltage
V
VOUT
(LM2750-5.0)
(%)
5.0
5
(-4%)
IQ
Operating Supply Current
IOUT = 0mA,
mA
VIH(MIN) ≤ V(SD) ≤VIN
V(SD) = 0V
12
ISD
Shutdown Supply Current
Feedback Pin Voltage
(LM2750-ADJ)
2
µA
V
VFB
VIN = 3.1V
1.170
1.232
1
1.294
IFB
Feedback Pin Input Current
(LM2750-ADJ)
VFB = 1.4V
nA
VR
Output Ripple
COUT = 10µF, IOUT = 100mA
COUT = 2.2µF, IOUT = 100mA
VIN = 2.7V, IOUT = 40mA
VIN = 2.9V, IOUT = 120mA
VIN Range: 2.9V - 4.2V,
IOUT = 120mA
4
mVp-p
%
15
87
85
70
EPEAK
EAVG
Peak Efficiency
(LM2750-5.0)
Average Efficiency over Li-Ion
Input Range
%
(LM2750-5.0)
VIN Range: 2.9V - 4.2V,
IOUT = 40mA
67
(Note 12)
fSW
tON
Switching Frequency
VOUT Turn-On Time
1.0
1.7
0.5
MHz
ms
VIN= 3.0V, IOUT = 100mA,
(Note 11)
ILIM
Current Limit
VOUT shorted to GND
300
mA
Shutdown Pin (SD) Characteristics
VIH
VIL
IIH
Logic-High SD Input
Logic-Low SD Input
SD Input Current (Note 13)
SD Input Current
1.3
0
VIN
0.4
50
1
V
V
1.3V ≤ V(SD) ≤ VIN
15
µA
µA
IIL
V(SD) = 0V
−1
3
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Electrical Characteristics (Notes 3, 9) (Continued)
Typical values and limits in standard typeface apply for TJ = 25oC. Limits in boldface type apply over the operating junction
temperature range. Unless otherwise specified: 2.9V ≤ VIN ≤ 5.6V, VOUT = 5.0V (LM2750-ADJ), V(SD) = VIN, CFLY = 1µF, CIN
= 2 x 1µF, COUT = 2 x 1µF (Note 10).
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Capacitor Requirements
IOUT ≤ 60mA
1.0
2.0
1.0
2.0
µF
Required Input
CIN
Capacitance(Note 14)
60mA ≤ IOUT ≤ 120mA
IOUT ≤ 60mA
COUT
Required Output
µF
Capacitance(Note 14)
60mA ≤ IOUT ≤ 120mA
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 3: All voltages are with respect to the potential at the GND pin.
Note 4: Thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T =150˚C (typ.) and disengages at T =135˚C (typ.).
J
J
Note 5: Absiolute Maximum Output Current guaranteed by design. Recommended input voltage range for output currents in excess of 120mA: 3.1V to 4.4V.
Note 6: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. MIL-STD-883 3015.7. The machine model is a 200pF
capacitor discharged directly into each pin.
Note 7: Maximum ambient temperature (T
) is dependent on the maximum operating junction temperature (T
= 125oC), the maximum power
J-MAX-OP
A-MAX
dissipation of the device in the application (P
), and the junction-to ambient thermal resistance of the part/package in the application (θ ), as given by the
D-MAX
JA
following equation: T
= T
- (θ x P ). Maximum power dissipation of the LM2750 in a given application can be approximated using the following
A-MAX
J-MAX-OP
JA
D-MAX
equation: P
= (V
x I
) - (V
x I
) = [V
x ((2 x I ) + 5mA)] - (V
OUT-MAX
x I
). In this equation, V
OUT-MAX
, I
, and
D-MAX
IN-MAX
IN-MAX
OUT
OUT-MAX
IN-MAX
OUT
IN-MAX IN-MAX
I
are the maximum voltage/current of the specific application, and not necessarily the maximum rating of the LM2750.
OUT-MAX
The maximum ambient temperature rating of 85oC is determined under the following application conditions: θ = 55oC/W, P
= 727mW (achieved when
D-MAX
JA
V
= 5.5V and I
= 115mA, for example). Maximum ambient temperature must be derated by 1.1oC for every increase in internal power dissipation of
OUT-MAX
IN-MAX
20mW above 727mW (again assuming that θ = 55oC/W in the application). For more information on these topics, please refer to Application Note 1187: Leadless
JA
Leadframe Package (LLP) and the Power Efficiency and Power Dissipation section of this datasheet.
Note 8: Junction-to-ambient thermal resistance (θ ) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC
JA
standard JESD51-7. The test board is a 4 layer FR-4 board measuring 102mm x 76mm x 1.6mm with a 2 x 1 array of thermal vias. The ground plane on the board
is 50mm x 50mm. Thickness of copper layers are 36µm/18µm /18µm/36µm (1.5oz/1oz/1oz/1.5oz). Ambient temperature in simulation is 22˚C, still air. Power
dissipation is 1W.
The value of θ of the LM2750 in LLP-10 could fall in a range as wide as 50oC/W to 150oC/W (if not wider), depending on PCB material, layout, and environmental
JA
conditions. In applications where high maximum power dissipation exists (high V , high I
), special care must be paid to thermal dissipation issues. For more
OUT
IN
information on these topics, please refer to Application Note 1187: Leadless Leadframe Package (LLP) and the Layout Recommendations section of this
datasheet.
Note 9: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 10: C , C , and C : Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics
OUT
FLY
IN
Note 11: Turn-on time is measured from when SD signal is pulled high until the output voltage crosses 90% of its final value.
Note 12: Efficiency is measured versus V , with V being swept in small increments from 3.0V to 4.2V. The average is calculated from these measurements
IN
IN
results. Weighting to account for battery voltage discharge characteristics (V
vs. Time) is not done in computing the average.
BAT
Note 13: SD Input Current (I ) is due to a 200kΩ (typ.) pull-down resistor connected internally between the SD pin and GND.
IH
Note 14: Limit is the minimum required output capacitance to ensure proper operation. This electrical specification is guaranteed by design.
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Block Diagram
20035103
5
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Typical Performance Characteristics Unless otherwise specified: VIN = 3.6V, TA = 25oC, CIN
=
2.2µF, CFLY = 1.0µF, COUT = 2.2µF. Capacitors are low-ESR multi-layer ceramic capacitors (MLCC’s).
Output Voltage vs. Output Current
Output Voltage vs. Output Current
20035115
20035116
Output Voltage vs. Input Voltage
Power Efficiency
20035117
20035118
Input Current vs. Output Current
Quiescent Supply Current
20035119
20035120
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6
Typical Performance Characteristics Unless otherwise specified: VIN = 3.6V, TA = 25oC, CIN
=
2.2µF, CFLY = 1.0µF, COUT = 2.2µF. Capacitors are low-ESR multi-layer ceramic capacitors (MLCC’s). (Continued)
Current Limit Behavior
Switching Frequency
20035121
20035122
Output Voltage Ripple
Output Voltage Ripple, IOUT = 120mA
20035113
20035112
Turn-on Behavior
20035114
7
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and it is much more advantageous to route a flying capacitor
trace in this fashion than it is to place input traces on other
layers.
Operation Description
OVERVIEW
The GND pads of the LM2750 are ground connections and
The LM2750 is a regulated switched capacitor doubler that,
by combining the principles of switched-capacitor voltage
boost and linear regulation, generates a regulated output
from an extended Li-Ion input voltage range. A two-phase
non-overlapping clock generated internally controls the op-
eration of the doubler. During the charge phase (φ1), the
flying capacitor (CFLY) is connected between the input and
ground through internal pass-transistor switches and is
charged to the input voltage. In the pump phase that follows
(φ2), the flying capacitor is connected between the input and
output through similar switches. Stacked atop the input, the
charge of the flying capacitor boosts the output voltage and
supplies the load current.
must be connected externally. These include pads
3
(LM2750-5.0 only), 5, 6 and the die-attach pad (DAP). Large,
low impedance copper fills and via connections to an internal
ground plane are the preferred way of connecting together
the ground pads of the LM2750, the input capacitor, and the
output capacitor, as well as connecting this circuit ground to
the system ground of the PCB.
SHUTDOWN
When the voltage on the active-low-logic shutdown pin is
low, the LM2750 will be in shutdown mode. In shutdown, the
LM2750 draws virtually no supply current. There is a 200kΩ
pull-down resistor tied between the SD pin and GND that
pulls the SD pin voltage low if the pin is not driven by a
voltage source. When pulling the part out of shutdown, the
voltage source connected to the SD pin must be able to drive
the current required by the 200kΩ resistor. For voltage man-
agement purposes required upon startup, internal switches
connect the output of the LM2750 to an internal pull-down
resistor (1kΩ typ) when the part is shutdown. Driving the
output of the LM2750 by another supply when the LM2750 is
shutdown is not recommended, as the pull-down resistor
was not sized to sink continuous current.
A traditional switched capacitor doubler operating in this
manner will use switches with very low on-resistance to
generate an output voltage that is 2x the input voltage. The
LM2750 regulates the output voltage by controlling the re-
sistance of the two input-connected pass-transistor switches
in the doubler.
PRE-REGULATION
The very low input current ripple of the LM2750, resulting
from internal pre-regulation, adds very little noise to the input
line. The core of the LM2750 is very similar to that of a basic
switched capacitor doubler: it is composed of four switches
and a flying capacitor (external). Regulation is achieved by
modulating the on-resistance of the two switches connected
to the input pin (one switch in each phase). The regulation is
done before the voltage doubling, giving rise to the term
"pre-regulation". It is pre-regulation that eliminates most of
the input current ripple that is a typical and undesirable
characteristic of a many switched capacitor converters.
SOFT START
The LM2750 employs soft start circuitry to prevent excessive
input inrush currents during startup. The output voltage is
programmed to rise from 0V to the nominal output voltage
(5.0V) in 500µs (typ.). Soft-start is engaged when a part, with
input voltage established, is taken out of shutdown mode by
pulling the SD pin voltage high. Soft-start will also engage
when voltage is established simultaneously to the input and
SD pins.
INPUT, OUTPUT, AND GROUND CONNECTIONS
Making good input, output, and ground connections is es-
sential to achieve optimal LM2750 performance. The two
input pads, pads 8 and 9, must be connected externally. It is
strongly recommended that the input capacitor (CIN) be
placed as close as possible to the LM2750, so that the traces
from the input pads are as short and straight as possible. To
minimize the effect of input noise on LM2750 performance, it
is best to bring two traces out from the LM2750 all the way to
the input capacitor pad, so that they are connected at the
capacitor pad. Connecting the two input traces between the
input capacitor and the LM2750 input pads could make the
LM2750 more susceptible to noise-related performance deg-
radation. It is also recommended that the input capacitor be
on the same side of the PCB as the LM2750, and that traces
remain on this side of the board as well (vias to traces on
other PCB layers are not recommended between the input
capacitor and LM2750 input pads).
OUTPUT CURRENT CAPABILITY
The LM2750-5.0 is guaranteed to provide 120mA of output
current when the input voltage is within 2.9V-to-5.6V. Using
the LM2750 to drive loads in excess of 120mA is possible.
IMPORTANT NOTE: Understanding relevant application is-
sues is recommended and a thorough analysis of the appli-
cation circuit should be performed when using the part out-
side operating ratings and/or specifications to ensure
satisfactory circuit performance in the application. Special
care should be paid to power dissipation and thermal effects.
These parameters can have a dramatic impact on high-
current applications, especially when the input voltage is
high. (see "Power Efficiency and Power Dissipation" section,
to come).
The schematic of Figure 1 is a simplified model of the
LM2750 that is useful for evaluating output current capability.
The model shows a linear pre-regulation block (Reg), a
voltage doubler (2x), and an output resistance (ROUT). Out-
put resistance models the output voltage droop that is inher-
ent to switched capacitor converters. The output resistance
of the LM2750 is 5Ω (typ.), and is approximately equal to
twice the resistance of the four LM2750 switches. When the
output voltage is in regulation, the regulator in the model
controls the voltage V’ to keep the output voltage equal to
5.0V 4%. With increased output current, the voltage drop
across ROUT increases. To prevent droop in output voltage,
the voltage drop across the regulator is reduced, V’ in-
creases, and VOUT remains at 5V. When the output current
The two output pads, pads 1 and 2, must also be connected
externally. It is recommended that the output capacitor
(COUT) be placed as close to the LM2750 output pads as
possible. It is best if routing of output pad traces follow
guidelines similar to those presented for the input pads and
capacitor. The flying capacitor (CFLY) should also be placed
as close to the LM2750 as possible to minimize PCB trace
length between the capacitor and the IC. Due to the pad-
layout of the part, it is likely that the trace from one of the
flying capacitor pads (C+ or C-) will need to be routed to an
internal or opposite-side layer using vias. This is acceptable,
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8
switches into shutdown mode. The LM2750 releases thermal
shutdown when the junction temperature of the part is re-
duced to 130oC (typ.).
Operation Description (Continued)
increases to the point that there is zero voltage drop across
the regulator, V’ equals the input voltage, and the output
voltage is "on the edge" of regulation. Additional output
current causes the output voltage to fall out of regulation,
and the LM2750 operation is similar to a basic open-loop
doubler. As in a voltage doubler, increase in output current
results in output voltage drop proportional to the output
resistance of the doubler. The out-of-regulation LM2750 out-
put voltage can be approximated by:
Thermal shutdown is most-often triggered by self-heating,
which occurs when there is excessive power dissipation in
the device and/or insufficient thermal dissipation. LM2750
power dissipation increases with increased output current
and input voltage (see Power Efficiency and Power Dissi-
pation section). When self-heating brings on thermal shut-
down, thermal cycling is the typical result. Thermal cycling is
the repeating process where the part self-heats, enters ther-
mal shutdown (where internal power dissipation is practically
zero), cools, turns-on, and then heats up again to the ther-
mal shutdown threshold. Thermal cycling is recognized by a
pulsing output voltage and can be stopped be reducing the
internal power dissipation (reduce input voltage and/or out-
put current) or the ambient temperature. If thermal cycling
occurs under desired operating conditions, thermal dissipa-
tion performance must be improved to accommodate the
power dissipation of the LM2750. Fortunately, the LLP pack-
age has excellent thermal properties that, when soldered to
a PCB designed to aid thermal dissipation, allows the
LM2750 to operate under very demanding power dissipation
conditions.
VOUT= 2xVIN - IOUT x ROUT
Again, this equation only applies at low input voltage and
high output current where the LM2750 is not regulating. See
Output Current vs. Output Voltage curves in the Typical
Performance Characteristics section for more details.
OUTPUT CURRENT LIMITING
20035109
The LM2750 contains current limit circuitry that protects the
device in the event of excessive output current and/or output
shorts to ground. Current is limited to 300mA (typ.) when the
output is shorted directly to ground. When the LM2750 is
current limiting, power dissipation in the device is likely to be
quite high. In this event, thermal cycling should be expected
(see Thermal Shutdown section).
FIGURE 1. LM2750 Output Resistance Model
A more complete calculation of output resistance takes into
account the effects of switching frequency, flying capaci-
tance, and capacitor equivalent series resistance (ESR).
This equation is shown below:
PROGRAMMING THE OUTPUT VOLTAGE OF THE
LM2750-ADJ
As shown in the application circuit of Figure 2, the output
voltage of the LM2750-ADJ can be programmed with a
simple resistor divider (see resistors R1 and R2). The values
of the feedback resistors set the output voltage, as deter-
mined by the following equation:
Switch resistance (5Ω typ.) dominates the output resistance
equation of the LM2750. With a 1.7MHz typical switching
frequency, the 1/(FxC) component of the output resistance
contributes only 0.6Ω to the total output resistance. Increas-
ing the flying capacitance will only provide minimal improve-
ment to the total output current capability of the LM2750. In
some applications it may be desirable to reduce the value of
the flying capacitor below 1µF to reduce solution size and/or
cost, but this should be done with care so that output resis-
tance does not increase to the point that undesired output
voltage droop results. If ceramic capacitors are used, ESR
will be a negligible factor in the total output resistance, as the
ESR of quality ceramic capacitors is typically much less than
100mΩ.
VOUT = 1.23V x (1 + R1/ R2)
In the equation above, the "1.23V" term is the nominal
voltage of the feedback pin when the feedback loop is cor-
rectly established and the part is operating normally. The
sum of the resistance of the two feedback resistors should
be between 15kΩ and 20kΩ:
<
<
15kΩ (R1 + R2) 20kΩ
If larger feedback resistors are desired, a 10pF capacitor
should be placed in parallel with resistor R1.
THERMAL SHUTDOWN
The LM2750 implements a thermal shutdown mechanism to
protect the device from damage due to overheating. When
the junction temperature rises to 150oC (typ.), the part
9
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Operation Description (Continued)
20035123
FIGURE 2. LM2750-ADJ Typical Application Circuit
A low-ESR ceramic capacitor is recommended on the output
to keep output voltage ripple low. Placing multiple capacitors
in parallel can reduce ripple significantly, both by increasing
capacitance and reducing ESR. When capacitors are in
parallel, ESR is in parallel as well. The effective net ESR is
determined according to the properties of parallel resistance.
Two identical capacitors in parallel have twice the capaci-
tance and half the ESR as compared to a single capacitor of
the same make. On a similar note, if a large-value, high-ESR
capacitor (tantalum, for example) is to be used as the pri-
mary output capacitor, the net output ESR can be signifi-
cantly reduced by placing a low-ESR ceramic capacitor in
parallel with this primary output capacitor.
Application Information
OUTPUT VOLTAGE RIPPLE
The amount of voltage ripple on the output of the LM2750 is
highly dependent on the application conditions: output cur-
rent and the output capacitor, specifically. A simple approxi-
mation of output ripple is determined by calculating the
amount of voltage droop that occurs when the output of the
LM2750 is not being driven. This occurs during the charge
phase (φ1). During this time, the load is driven solely by the
charge on the output capacitor. The magnitude of the ripple
thus follows the basic discharge equation for a capacitor (I =
C x dV/dt), where discharge time is one-half the switching
period, or 0.5/FSW. Put simply,
CAPACITORS
The LM2750 requires 3 external capacitors for proper opera-
tion. Surface-mount multi-layer ceramic capacitors are rec-
ommended. These capacitors are small, inexpensive and
have very low equivalent series resistance (≤10mΩ typ.).
Tantalum capacitors, OS-CON capacitors, and aluminum
electrolytic capacitors generally are not recommended for
use with the LM2750 due to their high ESR, as compared to
ceramic capacitors.
A more thorough and accurate examination of factors that
affect ripple requires including effects of phase non-overlap
times and output capacitor equivalent series resistance
(ESR). In order for the LM2750 to operate properly, the two
phases of operation must never coincide. (If this were to
happen all switches would be closed simultaneously, short-
ing input, output, and ground). Thus, non-overlap time is built
into the clocks that control the phases. Since the output is
not being driven during the non-overlap time, this time
should be accounted for in calculating ripple. Actual output
capacitor discharge time is approximately 60% of a switch-
For most applications, ceramic capacitors with X7R or X5R
temperature characteristic are preferred for use with the
LM2750. These capacitors have tight capacitance tolerance
(as good as 10%), hold their value over temperature (X7R:
15% over -55oC to 125oC; X5R: 15% over -55oC to 85oC),
and typically have little voltage coefficient. Capacitors with
Y5V and/or Z5U temperature characteristic are generally not
recommended. These types of capacitors typically have
wide capacitance tolerance (+80%, -20%), vary significantly
over temperature (Y5V: +22%, -82% over -30oC to +85oC
range; Z5U: +22%, -56% over +10oC to +85oC range), and
have poor voltage coefficients. Under some conditions, a
nominal 1µF Y5V or Z5U capacitor could have a capacitance
of only 0.1µF. Such detrimental deviation is likely to cause
these Y5V and Z5U of capacitors to fail to meet the minimum
capacitance requirements of the LM2750.
ing period, or 0.6/FSW
.
The ESR of the output capacitor also contributes to the
output voltage ripple, as there is effectively an AC voltage
drop across the ESR due to current switching in and out of
the capacitor. The following equation is a more complete
calculation of output ripple than presented previously, taking
into account phase non-overlap time and capacitor ESR.
The table below lists some leading ceramic capacitor manu-
facturers.
www.national.com
10
output to ensure stability. For output currents between 60mA
and 120mA, a minimum output capacitance of 2.0µF is
required.
Application Information (Continued)
Manufacturer
TDK
Contact Information
www.component.tdk.com
www.avx.com
A minimum voltage rating of 10V is recommended for the
output capacitor. This is to account for DC bias properties of
ceramic capacitors. Capacitance of ceramic capacitors re-
duces with increased DC bias. This degradation can be quite
AVX
Murata
www.murata.com
www.t-yuden.com
www.vishay.com
>
significant ( 50%) when the DC bias approaches the volt-
Taiyo-Yuden
Vishay-Vitramon
age rating of the capacitor.
POWER EFFICIENCY AND POWER DISSIPATION
INPUT CAPACITOR
Efficiency of the LM2750 mirrors that of an unregulated
switched capacitor converter followed by a linear regulator.
The simplified power model of the LM2750, in Figure 3, will
be used to discuss power efficiency and power dissipation.
In calculating power efficiency, output power (POUT) is easily
determined as the product of the output current and the 5.0V
output voltage. Like output current, input voltage is an
application-dependent variable. The input current can be
calculated using the principles of linear regulation and
switched capacitor conversion. In an ideal linear regulator,
the current into the circuit is equal to the current out of the
circuit. The principles of power conservation mandate the
ideal input current of a voltage doubler must be twice the
output current. Adding a correction factor for operating qui-
escent current (IQ, 5mA typ.) gives an approximation for total
input current which, when combined with the other input and
output parameter(s), yields the following equation for effi-
ciency:
The input capacitor (CIN) is used as a reservoir of charge,
helping to quickly transfer charge to the flying capacitor
during the charge phase (φ1) of operation. The input capaci-
tor helps to keep the input voltage from drooping at the start
of the charge phase, when the flying capacitor is first con-
nected to the input, and helps to filter noise on the input pin
that could adversely affect sensitive internal analog circuitry
biased off the input line. As mentioned above, an X7R/X5R
ceramic capacitor is recommended for use. For applications
where the maximum load current required is between 60mA
and 120mA, a minimum input capacitance of 2.0µF is re-
quired. For applications where the maximum load current is
60mA or less, 1.0µF of input capacitance is sufficient. Failure
to provide enough capacitance on the LM2750 input can
result in poor part performance, often consisting of output
voltage droop, excessive output voltage ripple and/or exces-
sive input voltage ripple.
A minimum voltage rating of 10V is recommended for the
input capacitor. This is to account for DC bias properties of
ceramic capacitors. Capacitance of ceramic capacitors re-
duces with increased DC bias. This degradation can be quite
>
significant ( 50%) when the DC bias approaches the volt-
age rating of the capacitor.
Comparisons of LM2750 efficiency measurements to calcu-
lations using the above equation have shown the equation to
be a quite accurate approximation of actual efficiency. Be-
cause efficiency is inversely proportional to input voltage, it
is highest when the input voltage is low. In fact, for an input
voltage of 2.9V, efficiency of the LM2750 is greater than 80%
(IOUT ≥ 40mA) and peak efficiency is 85% (IOUT = 120mA).
The average efficiency for an input voltage range spanning
the Li-Ion range (2.9V-to-4.2V) is 70% (IOUT = 120mA). At
higher input voltages, efficiency drops dramatically. In Li-Ion-
powered applications, this is typically not a major concern,
as the circuit will be powered off a charger in these circum-
stances. Low efficiency equates to high power dissipation,
however, which could become an issue worthy of attention.
FLYING CAPACITOR
The flying capacitor (CFLY) transfers charge from the input to
the output, providing the voltage boost of the doubler. A
polarized capacitor (tantalum, aluminum electrolytic, etc.)
must not be used here, as the capacitor will be reverse-
biased upon start-up of the LM2750. The size of the flying
capacitor and its ESR affect output current capability when
the input voltage of the LM2750 is low, most notable for input
voltages below 3.0V. These issues were discussed previ-
ously in the Output Current Capability section. For most
applications, a 1µF X7R/X5R ceramic capacitor is recom-
mended for the flying capacitor.
LM2750 power dissipation (PD) is calculated simply by sub-
tracting output power from input power:
OUTPUT CAPACITOR
PD = PIN - POUT = [VIN x (2·IOUT + IQ)] - [VOUT x IOUT
]
The output capacitor of the LM2750 plays an important part
in determining the characteristics of the output signal of the
LM2750, many of which have already been discussed. The
ESR of the output capacitor affects charge pump output
resistance, which plays a role in determining output current
capability. Both output capacitance and ESR affect output
voltage ripple. For these reasons, a low-ESR X7R/X5R ce-
ramic capacitor is the capacitor of choice for the LM2750
output.
Power dissipation increases with increased input voltage
and output current, up to 772mW at the ends of the operating
ratings (VIN = 5.6V, IOUT = 120mA). Internal power dissipa-
tion self-heats the device. Dissipating this amount power/
heat so the LM2750 does not overheat is a demanding
thermal requirement for a small surface-mount package.
When soldered to a PCB with layout conducive to power
dissipation, the excellent thermal properties of the LLP pack-
age enable this power to be dissipated from the LM2750 with
little or no derating, even when the circuit is placed in el-
evated ambient temperatures.
In addition to these issues previously discussed, the output
capacitor of the LM2750 also affects control-loop stability of
the part. Instability typically results in the switching fre-
quency effectively reducing by a factor of two, giving exces-
sive output voltage droop and/or increased voltage ripple on
the output and the input. With output currents of 60mA or
less, a minimum capacitance of 1.0µF is required at the
11
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implementing recommended techniques. For more informa-
tion related to layout for the LLP package, refer to National
Semiconductor’s Application Note 1187: Leadless Lead-
frame Package (LLP). Below are some general guidelines
for board layout:
Application Information (Continued)
•
•
•
Place capacitors as close to the as possible to the
LM2750, and on the same side of the board. VIN and
VOUT connections are most critical: run short traces from
the LM2750 pads directly to these capacitor pads.
Connect the ground pins of the LM2750 and the capaci-
tors to a good ground plane. The ground plane is essen-
tial for both electrical and thermal disspation perfor-
mance.
20035110
For optimal thermal performance, make the ground
plane(s) as large as possible. Connect the die-attach pad
(DAP) of the LM2750 to the ground plane(s) with wide
traces and/or multiple vias. Top-layer ground planes are
most effective in increasing the thermal dissipation capa-
bility of the LLP package. Large internal ground planes
are also very effective in keeping the die temperature of
the LM2750 within operating ratings.
FIGURE 3. LM2750 Model for Power Efficiency and
Power Dissipation Calculations
LAYOUT RECOMMENDATIONS
A good board layout of the LM2750 circuit is required to
achieve optimal assembly, electical, and thermal dissipation
perfromance. Figure 4 is an example of a board layout
20035126
FIGURE 4. LM2750-5.0 Recommended Layout
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12
LM2750 LED Drive Application
20035124
FIGURE 5. LM2750-5.0 LED Drive Application Circuit
20035125
FIGURE 6. LM2750-ADJ LED Drive Application Circuit
The LM2750 is an excellent part for driving white and blue
LEDs for display backlighting and other general-purpose
lighting functions. The circuits of Figure 5 and Figure 6 show
LED driver circuits for the LM2750-5.0 and the LM2750-ADJ,
respectively. Simply placing a resistor (R) in series with each
LED sets the current through the LEDs:
voltage (1.23V typ.), and the current through the LED is the
current through that resistor. Current through all other LEDs
(LEDx) will not be regulated, however, and will vary with LED
forward voltage variations. When using the LM2750-ADJ in
current-mode, LED currents can be calculated with the
equations below:
ILED = (VOUT - VLED) / R
ILED1 = 1.23V / R1
In the equation above, ILED is the current that flows through
a particular LED, and VLED is the forward voltage of the LED
at the given current. As can be seen in the equation above,
LED current will vary with changes in LED forward voltage
(VLED). Mismatch of LED currents will result in brightness
mismatch from one LED to the next.
ILEDx = (1.23V + VLED1 - VLEDx) / Rx
The current-mode configuration does not improve brightness
matching from one LED to another in a single circuit, but will
keep currents similar from one circuit to the next. For ex-
ample: if there is forward voltage mismatch from LED1 to
LED2 on a single board, the current-mode LM2750-ADJ
solution provides no benefit. But if the forward voltage of
LED1 on one board is different than the forward voltage of
LED1 on another board, the currents through LED1 in both
phones will match. THis helps keep LED currents fairly
consistent from one product to the next, adn helps to offset
lot-to-lot variation of LED forward voltage characteristics.
The feedback pin of the LM2750-ADJ can be utilized to help
better control brightness levels and negate the effects of
LED forward voltage variation. As shown in Figure 6, con-
necting the feedback pin to the primary LED-resistor junction
(LED1-R1) regulates the current through that LED. The volt-
age across the primary resistor (R1) is the feedback pin
13
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LED DRIVER POWER CONSUMPTION
LM2750 LED Drive Application
For battery-powered LED-drive applications, it is strongly
recommended that power consumption, rather than power
efficiency, be used as the metric of choice when evaluating
power conversion performance. Power consumed (PIN) is
simply the product of input voltage (VIN) and input current
(IIN):
(Continued)
PWM BRIGHTNESS/DIMMING CONTROL
Brightness of the LEDs can be adjusted in an application by
driving the SD pin of the LM2750 with a PWM signal. When
the PWM signal is high, the LM2750 is ON, and current flows
through the LEDs, as described in the previous section. A
low PWM signal turns the part and the LEDs OFF. The
perceived brightness of the LEDs is proportional to ON
current of the LEDs and the duty cycle (D) of the PWM signal
(the percentage of time the LEDs are ON).
PIN = VIN x IIN
LM2750 input current is equal to twice the output current
(IOUT), plus the supply current of the part (nominally 5mA):
IIN = (2xIOUT) + 5mA
Output voltage and LED voltage do not impact the amount of
current consumed by the LM2750 circuit. Thus, neither factor
affects the current draw on a battery. Since output voltage
does not impact input current, there is no power savings with
either the LM2750-5.0 or the LM2750-ADJ: both options
consume the same amount of power.
To achieve good brightness/dimming control with this circuit,
proper selection of the PWM frequency is required. The
PWM frequency (FPWM) should be set higher than 100Hz to
avoid visible flickering of the LED light. An upper bound on
this frequency is also needed to accomodate the turn-on
time of the LM2750 (TON = 0.5ms typ.). This maximum
recommended PWM frequency is similarly dependent on the
minimum duty cycle (DMIN) of the application. The following
equation puts bounds on the reommended PWM frequency
range:
In the previous section, LED Driver Efficiency was defined
as:
ELED = PLED/PIN = (NxVLEDxILED) / {VIN x [(2xIOUT) + 5mA]}
The equation above can be simplified by recognizing the
following:
<
<
100Hz FPWM DMIN ÷ TON
>>
Choosing a PWM frequency within these limits will result in
fairly linear control of the time-averaged LED current over
the full duty-cycle adjustment range. For most applications, a
PWM frequency between 100Hz and 500Hz is recom-
mended. A PWM frequency up to 1kHz may be acceptable in
some designs.
2 x IOUT
5mA (high output current applications)
N x ILED = IOUT
Simplification yields:
ELED = VLED / VIN
This is in direct contrast to the previous assertion that
showed that power consumption was completely indepen-
dent of LED voltage. As is the case here with the LM2750,
efficiency is often not a good measure of power conversion
effectiveness of LED driver topologies. This is why it is
strongly recommended that power consumption be studied
or measured when comparing the power conversion effic-
tiveness of LED drivers.
LED DRIVER POWER EFFICIENCY
Efficiency of an LED driver (ELED) is typically defined as the
power consumed by the LEDs (PLED) divided by the power
consumed at the input of the circuit. Input power consump-
tion of the LM2750 was explained and defined in the previ-
ous section titled: Power Efficiency and Power Dissipa-
tion. Assuming LED forward voltages and currents match
reasonably well, LED power consumption is the product of
the number of LEDs in the circuit (N), the LED forward
voltage (VLED), and the LED forward current (ILED):
One final note: efficiency of an LED drive solution should not
be confused with an efficiency calculation for a standard
power converter (EP).
EP = POUT / PIN = (VOUTx IOUT) / (VIN x IIN
)
PLED = N x VLED x ILED
The equation above neglects power losses in the external
resistors that set LED currents and is a very poor metric of
LED-drive power conversion performance.
ELED = PLED / PIN = (NxVLEDxILED) / {VIN x [(2xIOUT) + 5mA]}
Figure 7 is an efficiency curve for a typical LM2750 LED-
drive application.
20035127
FIGURE 7. LM2750 LED Drive Efficiency. 6 LEDs, ILED
20mA each, VLED = 4.0V
=
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14
Datasheet Revision History
REV. #
1.0
DATE
COMMENTS
Production Release of LM2750 Datasheet
Preliminary version with the following additions:
1.1
09/24/2004
•
•
SDA10A Non-pullback package Added (pgs 2, 16)
Absolute Maximum Output Current Rating Added (pgs 3, 4)
1.2
1.3
09/28/2005
12/21/2005
Production Release of new LM2750 Datasheet
•
•
Ordering information for SDA10A package added
Reference to SDA10A package option added to the Connection Diagram
section
Production release of new Datasheet for ADJ voltage option in the
No-Pullback Package
Physical Dimensions inches (millimeters) unless otherwise noted
10-Pin Pullback LLP
NS Package Number LDA10A
15
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
10-Pin Non-Pullback LLP
NS Package Number SDA10A
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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相关型号：
LM2750SD-ADJ/NOPB
IC SWITCHED CAPACITOR REGULATOR, PDSO10, 3 X 3 MM, LLP-10, Switching Regulator or Controller
NSC
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