LM3488MMX [NSC]

High Efficiency Low-Side N-Channel Controller for Switching Regulators; 高效低侧N通道控制器开关稳压器
LM3488MMX
型号: LM3488MMX
厂家: National Semiconductor    National Semiconductor
描述:

High Efficiency Low-Side N-Channel Controller for Switching Regulators
高效低侧N通道控制器开关稳压器

稳压器 开关 控制器
文件: 总24页 (文件大小:620K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
May 2003  
LM3488  
High Efficiency Low-Side N-Channel Controller for  
Switching Regulators  
n
1.5% (over temperature) internal reference  
General Description  
n 5µA shutdown current (over temperature)  
The LM3488 is a versatile Low-Side N-FET high perfor-  
mance controller for switching regulators. It is suitable for  
use in topologies requiring low side FET, such as boost,  
flyback, SEPIC, etc. Moreover, the LM3488 can be operated  
at extremely high switching frequency in order to reduce the  
overall solution size. The switching frequency of LM3488 can  
be adjusted to any value between 100kHz and 1MHz by  
using a single external resistor or by synchronizing it to an  
external clock. Current mode control provides superior band-  
width and transient response, besides cycle-by-cycle current  
limiting. Output current can be programmed with a single  
external resistor.  
Features  
n 8-lead Mini-SO8 (MSOP-8) package  
n Internal push-pull driver with 1A peak current capability  
n Current limit and thermal shutdown  
n Frequency compensation optimized with a capacitor and  
a resistor  
n Internal softstart  
n Current Mode Operation  
n Undervoltage Lockout with hysteresis  
The LM3488 has built in features such as thermal shutdown,  
short-circuit protection and over voltage protection. Power  
saving shutdown mode reduces the total supply current to  
5µA and allows power supply sequencing. Internal soft-start  
limits the inrush current at start-up.  
Applications  
n Distributed Power Systems  
n Notebook, PDA, Digital Camera, and other Portable  
Applications  
n Offline Power Supplies  
n Set-Top Boxes  
Key Specifications  
n Wide supply voltage range of 2.97V to 40V  
n 100kHz to 1MHz Adjustable and Synchronizable clock  
frequency  
Typical Application Circuit  
10138844  
Typical SEPIC Converter  
© 2003 National Semiconductor Corporation  
DS101388  
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Connection Diagram  
10138802  
8 Lead Mini SO8 Package (MSOP-8 Package)  
Package Marking and Ordering Information  
Order Number  
Package Type  
Package Marking  
Supplied As:  
LM3488MM  
MSOP-8  
S21B  
1000 units on Tape and Reel  
3500 units on Tape and Reel  
LM3488MMX  
MSOP-8  
S21B  
Pin Description  
Pin Name  
Pin Number  
Description  
ISEN  
1
Current sense input pin. Voltage generated across an external  
sense resistor is fed into this pin.  
COMP  
FB  
2
3
Compensation pin. A resistor, capacitor combination connected to  
this pin provides compensation for the control loop.  
Feedback pin. The output voltage should be adjusted using a  
resistor divider to provide 1.26V at this pin.  
Analog ground pin.  
AGND  
PGND  
DR  
4
5
6
Power ground pin.  
Drive pin of the IC. The gate of the external MOSFET should be  
connected to this pin.  
FA/SYNC/SD  
7
Frequency adjust, synchronization, and Shutdown pin. A resistor  
connected to this pin sets the oscillator frequency. An external  
clock signal at this pin will synchronize the controller to the  
frequency of the clock. A high level on this pin for 30µs will turn  
the device off. The device will then draw less than 10µA from the  
supply.  
VIN  
8
Power supply input pin.  
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2
Absolute Maximum Ratings (Note 1)  
Lead Temperature  
MM Package  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
Vapor Phase (60 sec.)  
Infared (15 sec.)  
DR Pin Voltage  
ILIM Pin Voltage  
215˚C  
220˚C  
−0.4V VDR 8V  
600mV  
Input Voltage  
45V  
< <  
-0.4V VFB 7V  
FB Pin Voltage  
<
-0.4V  
FA/SYNC/SD Pin Voltage  
<
1.0A  
VFA/SYNC/SD 7V  
Operating Ratings (Note 1)  
Supply Voltage  
<
Peak Driver Output Current ( 10µs)  
2.97V VIN 40V  
Power Dissipation  
Internally Limited  
−65˚C to +150˚C  
+150˚C  
Junction  
Storage Temperature Range  
Junction Temperature  
Temperature Range  
Switching Frequency  
−40˚C TJ +125˚C  
100kHz FSW 1MHz  
ESD Susceptibilty  
Human Body Model (Note 2)  
2kV  
Electrical Characteristics  
Specifications in Standard type face are for TJ = 25˚C, and in bold type face apply over the full Operating Temperature  
Range. Unless otherwise specified, VIN = 12V, RFA = 40kΩ  
Symbol  
VFB  
Parameter  
Conditions  
VCOMP = 1.4V,  
Typical  
Limit  
Units  
V
Feedback Voltage  
1.26  
2.97 VIN 40V  
2.97 VIN 40V  
IEAO Source/Sink  
1.2507/1.24  
1.2753/1.28  
V(min)  
V(max)  
%/V  
VLINE  
VLOAD  
VUVLO  
Feedback Voltage  
Line Regulation  
Output Voltage Load  
Regulation  
0.001  
0.5  
%/V (max)  
Input Undervoltage  
Lock-out  
2.85  
170  
V
2.97  
V(max)  
mV  
VUV(HYS)  
Input Undervoltage  
Lock-out Hysteresis  
130  
210  
mV (min)  
mV (max)  
kHz  
Fnom  
Nominal Switching  
Frequency  
RFA = 40KΩ  
400  
370  
420  
kHz(min)  
kHz(max)  
RDS1 (ON)  
RDS2 (ON)  
VDR (max)  
Dmax  
Driver Switch On  
Resistance (top)  
IDR = 0.2A, VIN= 5V  
IDR = 0.2A  
16  
Driver Switch On  
Resistance (bottom)  
Maximum Drive  
4.5  
V
<
VIN 7.2V  
VIN  
7.2  
Voltage Swing(Note 6)  
VIN 7.2V  
Maximum Duty  
Cycle(Note 7)  
100  
%
Tmin (on)  
Minimum On Time  
325  
nsec  
nsec(min)  
nsec(max)  
mA  
230  
550  
ISUPPLY  
IQ  
Supply Current  
(switching)  
(Note 9)  
2.0  
5
2.6  
7
mA (max)  
µA  
Quiescent Current in  
Shutdown Mode  
Current Sense  
Threshold Voltage  
VFA/SYNC/SD = 5V(Note  
10), VIN = 5V  
µA (max)  
mV  
VSENSE  
VIN = 5V  
165  
140/ 135  
195/ 200  
mV (min)  
mV (max)  
3
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Electrical Characteristics (Continued)  
Specifications in Standard type face are for TJ = 25˚C, and in bold type face apply over the full Operating Temperature  
Range. Unless otherwise specified, VIN = 12V, RFA = 40kΩ  
Symbol  
VSC  
Parameter  
Conditions  
VIN = 5V  
Typical  
Limit  
Units  
mV  
Short-Circuit Current  
Limit Sense Voltage  
325  
235  
395  
mV (min)  
mV (max)  
mV  
VSL  
Internal Compensation  
Ramp Voltage  
VIN = 5V  
92  
50  
52  
132  
mV(min)  
mV(max)  
VOVP  
Output Over-voltage  
Protection (with  
VCOMP = 1.4V  
mV  
mV(min)  
mV(max)  
mV  
respect to feedback  
voltage) (Note 8)  
Output Over-Voltage  
Protection  
32/ 25  
78/ 85  
VOVP(HYS)  
VCOMP = 1.4V  
60  
800  
38  
20  
110  
mV(min)  
mV(max)  
µmho  
Hysteresis(Note 8)  
Error Ampifier  
Gm  
VCOMP = 1.4V  
IEAO = 100µA  
(Source/Sink)  
VCOMP = 1.4V  
IEAO = 100µA  
(Source/Sink)  
Source, VCOMP = 1.4V,  
VFB = 0V  
Transconductance  
600/ 365  
1000/ 1265  
µmho (min)  
µmho (max)  
V/V  
AVOL  
Error Amplifier Voltage  
Gain  
26  
44  
V/V (min)  
V/V (max)  
µA  
IEAO  
Error Amplifier Output  
Current (Source/ Sink)  
110  
−140  
2.2  
80/ 50  
140/ 180  
µA (min)  
µA (max)  
µA  
Sink, VCOMP = 1.4V, VFB  
= 1.4V  
−100/ −85  
−180/ −185  
µA (min)  
µA (max)  
V
VEAO  
Error Amplifier Output  
Voltage Swing  
Upper Limit  
VFB = 0V  
1.8  
2.4  
V(min)  
V(max)  
V
COMP Pin = Floating  
Lower Limit  
0.56  
VFB = 1.4V  
0.2  
1.0  
V(min)  
V(max)  
msec  
TSS  
Tr  
Internal Soft-Start  
Delay  
VFB = 1.2V, VCOMP  
Floating  
=
4
Drive Pin Rise Time  
Cgs = 3000pf, VDR = 0 to  
25  
ns  
ns  
3V  
Tf  
Drive Pin Fall Time  
Cgs = 3000pf, VDR = 0 to  
25  
3V  
VSD  
Shutdown and  
Output = High  
1.27  
0.65  
V
V (max)  
V
Synchronization signal  
threshold (Note 5)  
1.35  
0.35  
Output = Low  
V (min)  
µA  
ISD  
Shutdown Pin Current  
VSD = 5V  
VSD = 0V  
−1  
+1  
TSD  
Tsh  
Thermal Shutdown  
Thermal Shutdown  
Hysteresis  
165  
10  
˚C  
˚C  
θJA  
Thermal Resistance  
MM Package  
200  
˚C/W  
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4
Electrical Characteristics (Continued)  
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device  
is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.  
Note 2: The human body model is a 100 pF capacitor discharged through a 1.5kresistor into each pin.  
Note 3: All limits are guaranteed at room temperature (standard type face) and at temperature extremes (bold type face). All room temperature limits are 100%  
tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate  
Average Outgoing Quality Level (AOQL).  
Note 4: Typical numbers are at 25˚C and represent the most likely norm.  
Note 5: The FA/SYNC/SD pin should be pulled to V through a resistor to turn the regulator off.  
IN  
Note 6: The voltage on the drive pin, V is equal to the input voltage when input voltage is less than 7.2V. V is equal to 7.2V when the input voltage is greater  
DR  
DR  
than or equal to 7.2V.  
Note 7: The limits for the maximum duty cycle can not be specified since the part does not permit less than 100% maximum duty cycle operation.  
Note 8: The over-voltage protection is specified with respect to the feedback voltage. This is because the over-voltage protection tracks the feedback voltage. The  
over-voltage thresold can be calculated by adding the feedback voltage, V to the over-voltage protection specification.  
FB  
Note 9: For this test, the FA/SYNC/SD Pin is pulled to ground using a 40K resistor .  
Note 10: For this test, the FA/SYNC/SD Pin is pulled to 5V using a 40K resistor.  
5
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Typical Performance Characteristics Unless otherwise specified, VIN = 12V, TJ = 25˚C.  
IQ vs Temperature & Input Voltage  
ISupply vs Input Voltage (Non-Switching)  
10138834  
10138803  
ISupply vs VIN  
Switching Frequency vs RFA  
10138835  
10138804  
Frequency vs Temperature  
Drive Voltage vs Input Voltage  
10138854  
10138805  
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6
Typical Performance Characteristics Unless otherwise specified, VIN = 12V, TJ = 25˚C. (Continued)  
Current Sense Threshold vs Input Voltage  
COMP Pin Voltage vs Load Current  
10138862  
10138845  
Efficiency vs Load Current (3.3V In and 12V Out)  
Efficiency vs Load Current (5V In and 12V Out)  
10138859  
10138858  
Efficiency vs Load Current (9V In and 12V Out)  
Efficiency vs Load Current (3.3V In and 5V Out)  
10138860  
10138853  
7
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Typical Performance Characteristics Unless otherwise specified, VIN = 12V, TJ = 25˚C. (Continued)  
Error Amplifier Gain  
Error Amplifier Phase  
10138855  
10138856  
COMP Pin Source Current vs Temperature  
Short Circuit Protection vs Input Voltage  
10138857  
10138836  
Compensation Ramp vs Compensation Resistor  
Shutdown Threshold Hysteresis vs Temperature  
10138846  
10138851  
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8
Typical Performance Characteristics Unless otherwise specified, VIN = 12V, TJ = 25˚C. (Continued)  
Current Sense Voltage vs Duty Cycle  
10138852  
9
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Functional Block Diagram  
10138806  
The voltage sensed across the sense resistor generally  
contains spurious noise spikes, as shown in Figure 1. These  
spikes can force the PWM comparator to reset the RS latch  
prematurely. To prevent these spikes from resetting the  
latch, a blank-out circuit inside the IC prevents the PWM  
comparator from resetting the latch for a short duration after  
the latch is set. This duration is about 150ns and is called the  
blank-out time.  
Functional Description  
The LM3488 uses a fixed frequency, Pulse Width Modulated  
(PWM), current mode control architecture. In a typical appli-  
cation circuit, the peak current through the external MOS-  
FET is sensed through an external sense resistor. The volt-  
age across this resistor is fed into the ISEN pin. This voltage  
is then level shifted and fed into the positive input of the  
PWM comparator. The output voltage is also sensed through  
an external feedback resistor divider network and fed into  
the error amplifier negative input (feedback pin, FB). The  
output of the error amplifier (COMP pin) is added to the slope  
compensation ramp and fed into the negative input of the  
PWM comparator.  
Under extremely light load or no-load conditions, the energy  
delivered to the output capacitor when the external MOSFET  
is on during the blank-out time is more than what is delivered  
to the load. An over-voltage comparator inside the LM3488  
prevents the output voltage from rising under these condi-  
tions. The over-voltage comparator senses the feedback (FB  
pin) voltage and resets the RS latch under these conditions.  
The latch remains in reset state till the output decays to the  
nominal value.  
At the start of any switching cycle, the oscillator sets the RS  
latch using the SET/Blank-out and switch logic blocks. This  
forces a high signal on the DR pin (gate of the external  
MOSFET) and the external MOSFET turns on. When the  
voltage on the positive input of the PWM comparator ex-  
ceeds the negative input, the RS latch is reset and the  
external MOSFET turns off.  
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10  
Functional Description (Continued)  
10138807  
FIGURE 1. Basic Operation of the PWM comparator  
>
SLOPE COMPENSATION RAMP  
From the above equation, when D 0.5, I1 will be greater  
than IO. In other words, the disturbance is divergent. So a  
very small perturbation in the load will cause the disturbance  
to increase.  
The LM3488 uses a current mode control scheme. The main  
advantages of current mode control are inherent cycle-by-  
cycle current limit for the switch, and simpler control loop  
characteristics. It is also easy to parallel power stages using  
current mode control since as current sharing is automatic.  
To prevent the sub-harmonic oscillations, a compensation  
ramp is added to the control signal, as shown in Figure 3.  
Current mode control has an inherent instability for duty  
cycles greater than 50%, as shown in Figure 2. In Figure 2,  
a small increase in the load current causes the switch cur-  
rent to increase by IO. The effect of this load change, I1, is  
:
With the compensation ramp,  
10138809  
>
FIGURE 2. Sub-Harmonic Oscillation for D 0.5  
11  
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Functional Description (Continued)  
10138811  
FIGURE 3. Compensation Ramp Avoids Sub-Harmonic Oscillation  
The compensation ramp has been added internally in  
LM3488. The slope of this compensation ramp has been  
selected to satisfy most of the applications. The slope of the  
internal compensation ramp depends on the frequency. This  
slope can be calculated using the formula:  
In this equation, VSL is equal to 40.10-6RSL. Hence,  
MC = VSL.FS Volts/second  
In the above equation, VSL is the amplitude of the internal  
compensation ramp. Limits for VSL have been specified in  
the electrical characteristics.  
In order to provide the user additional flexibility, a patented  
scheme has been implemented inside the IC to increase the  
slope of the compensation ramp externally, if the need  
arises. Adding a single external resistor, RSL(as shown in  
Figure 4) increases the slope of the compensation ramp, MC  
by :  
VSL versus RSL has been plotted in Figure 5 for different  
frequencies.  
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12  
Functional Description (Continued)  
10138813  
FIGURE 4. Increasing the Slope of the Compensation Ramp  
10138851  
FIGURE 5. VSL vs RSL  
FREQUENCY  
this resistor is dependent on the off time of the synchroniza-  
ADJUST/SYNCHRONIZATION/SHUTDOWN  
tion pulse, TOFF(SYNC). Table 1 shows the range of resistors  
to be used for a given TOFF(SYNC)  
.
The switching frequency of LM3488 can be adjusted be-  
tween 100kHz and 1MHz using a single external resistor.  
This resistor must be connected between FA/SYNC/SD pin  
and ground, as shown in Figure 6. Please refer to the typical  
performance characteristics to determine the value of the  
resistor required for a desired switching frequency.  
TABLE 1.  
TOFF(SYNC) (µsec)  
RSYNC range (k)  
5 to 13  
1
2
3
The LM3488 can be synchronized to an external clock. The  
external clock must be connected to the FA/SYNC/SD pin  
through a resistor, RSYNC as shown in Figure 7. The value of  
20 to 40  
40 to 65  
13  
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The FA/SYNC/SD pin also functions as a shutdown pin. If a  
high signal (refer to the electrical characteristics for definition  
of high signal) appears on the FA/SYNC/SD pin, the LM3488  
stops switching and goes into a low current mode. The total  
supply current of the IC reduces to less than 10µA under  
these conditions.  
Functional Description (Continued)  
TABLE 1. (Continued)  
TOFF(SYNC) (µsec)  
RSYNC range (k)  
55 to 90  
4
5
70 to 110  
Figure 8 and Figure 9 show implementation of shutdown  
function when operating in Frequency adjust mode and syn-  
chronization mode respectively. In frequency adjust mode,  
connecting the FA/SYNC/SD pin to ground forces the clock  
to run at a certain frequency. Pulling this pin high shuts down  
the IC. In frequency adjust or synchronization mode, a high  
signal for more than 30ms shuts down the IC.  
6
85 to 140  
7
100 to 160  
120 to 190  
135 to 215  
150 to 240  
8
9
10  
It is also necessary to have the width of the synchronization  
pulse narrower than the duty cycle of the converter. It is also  
necessary to have the synchronization pulse width  
300nsecs.  
10138816  
FIGURE 6. Frequency Adjust  
10138815  
FIGURE 7. Frequency Synchronization  
10138816  
FIGURE 8. Shutdown Operation in Frequency Adjust Mode  
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14  
Functional Description (Continued)  
10138817  
FIGURE 9. Shutdown Operation in Synchronization Mode  
SHORT-CIRCUIT PROTECTION  
When the voltage across the sense resistor (measured on  
ISEN Pin) exceeds 350mV, short-circuit current limit gets  
activated. A comparator inside LM3488 reduces the switch-  
ing frequency by a factor of 5 and maintains this condition till  
the short is removed.  
Typical Applications  
The LM3488 may be operated in either continuous or dis-  
continuous conduction mode. The following applications are  
designed for continuous conduction operation. This mode of  
operation has higher efficiency and lower EMI characteristics  
than the discontinuous mode.  
ferred to the load and output capacitor. The ratio of these two  
cycles determines the output voltage. The output voltage is  
defined as:  
BOOST CONVERTER  
The most common topology for LM3488 is the boost or  
step-up topology. The boost converter converts a low input  
voltage into a higher output voltage. The basic configuration  
for a boost regulator is shown in Figure 10. In continuous  
conduction mode (when the inductor current never reaches  
zero at steady state), the boost regulator operates in two  
cycles. In the first cycle of operation, MOSFET Q is turned  
on and energy is stored in the inductor. During this cycle,  
diode D is reverse biased and load current is supplied by the  
(ignoring the drop across the MOSFET and the diode), or  
where D is the duty cycle of the switch, VD is the forward  
voltage drop of the diode, and VQ is the drop across the  
MOSFET when it is on. The following sections describe  
selection of components for a boost converter.  
output capacitor, COUT  
.
In the second cycle, MOSFET Q is off and the diode is  
forward biased. The energy stored in the inductor is trans-  
15  
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Typical Applications (Continued)  
10138822  
FIGURE 10. Simplified Boost Converter Diagram (a) First cycle of operation. (b) Second cycle of operation  
POWER INDUCTOR SELECTION  
The inductor is one of the two energy storage elements in a  
boost converter. Figure 11 shows how the inductor current  
varies during a switching cycle. The current through an  
inductor is quantified as:  
10138824  
FIGURE 11. A. Inductor current B. Diode current  
If VL(t) is constant, diL(t)/dt must be constant. Hence, for a  
given input voltage and output voltage, the current in the  
inductor changes at a constant rate.  
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16  
PROGRAMMING THE OUTPUT VOLTAGE AND OUTPUT  
CURRENT  
Typical Applications (Continued)  
The important quantities in determining a proper inductance  
value are IL (the average inductor current) and iL (the  
inductor current ripple). If iL is larger than IL, the inductor  
current will drop to zero for a portion of the cycle and the  
converter will operate in discontinuous conduction mode. If  
iL is smaller than IL, the inductor current will stay above  
zero and the converter will operate in continuous conduction  
mode. All the analysis in this datasheet assumes operation  
in continuous conduction mode. To operate in continuous  
conduction mode, the following conditions must be met:  
The output voltage can be programmed using a resistor  
divider between the output and the feedback pins, as shown  
in Figure 12. The resistors are selected such that the voltage  
at the feedback pin is 1.26V. RF1 and RF2 can be selected  
using the equation,  
A 100pF capacitor may be connected between the feedback  
and ground pins to reduce noise.  
>
IL iL  
The maximum amount of current that can be delivered at the  
output can be controlled by the sense resistor, RSEN. Current  
limit occurs when the voltage that is generated across the  
sense resistor equals the current sense threshold voltage,  
VSENSE. Limits for VSENSE have been specified in the elec-  
trical characteristics. This can be expressed as:  
*
Isw(peak) RSEN = VSENSE  
VSENSE represents the maximum value of the control signal  
as shown in Figure 2. This control signal, however, is not a  
constant value and changes over the course of a period as a  
result of the internal compensation ramp (see Figure 3).  
Therefore the current limit will also change as a result of the  
internal compensation ramp. The actual command signal,  
VCS, can be better expressed as a function of the sense  
voltage and the internal compensation ramp:  
Choose the minimum IOUT to determine the minimum L. A  
common choice is to set iL to 30% of IL. Choosing an  
appropriate core size for the inductor involves calculating the  
average and peak currents expected through the inductor. In  
a boost converter,  
*
VCS = VSENSE − (D VSL  
)
VSL is defined as the internal compensation ramp voltage,  
limits are specified in the electrical characteristics.  
The peak current through the switch is equal to the peak  
inductor current.  
and IL_peak = IL(max) + iL(max),  
where  
Isw(peak) = IL + iL  
Therefore for a boost converter  
A core size with ratings higher than these values should be  
chosen. If the core is not properly rated, saturation will  
dramatically reduce overall efficiency.  
Combining the three equation yields an expression for RSEN  
The LM3488 can be set to switch at very high frequencies.  
When the switching frequency is high, the converter can be  
operated with very small inductor values. With a small induc-  
tor value, the peak inductor current can be extremely higher  
than the output currents, especially under light load condi-  
tions.  
The LM3488 senses the peak current through the switch.  
The peak current through the switch is the same as the peak  
current calculated above.  
17  
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Typical Applications (Continued)  
10138820  
FIGURE 12. Adjusting the Output Voltage  
CURRENT LIMIT WITH ADDITIONAL SLOPE  
COMPENSATION  
In the above equation, IOUT is the output current and IL has  
been defined in Figure 11  
If an external slope compensation resistor is used (see  
Figure 4) the internal control signal will be modified and this  
will have an effect on the current limit. The control signal is  
given by:  
The peak reverse voltage for boost converter is equal to the  
regulator output voltage. The diode must be capable of  
handling this voltage. To improve efficiency, a low forward  
drop schottky diode is recommended.  
*
VCS = VSENSE − (D VSL  
)
POWER MOSFET SELECTION  
Where VSENSE and VSL are defined parameters in the elec-  
trical characteristics section. If RSL is used, then this will add  
to the existing slope compensation. The command voltage  
will then be given by:  
The drive pin of LM3488 must be connected to the gate of an  
external MOSFET. In a boost topology, the drain of the  
external N-Channel MOSFET is connected to the inductor  
and the source is connected to the ground. The drive pin  
(DR) voltage depends on the input voltage (see typical per-  
formance characteristics). In most applications, a logic level  
MOSFET can be used. For very low input voltages, a sub-  
logic level MOSFET should be used.  
*
VCS = VSENSE − (D ( VSL + VSL) )  
Where VSL is the additional slope compensation generated  
and can be calculated by use of Figure 5 or is equal to 40 x  
10−6 * RSL. This changes the equation for RSEN to:  
The selected MOSFET directly controls the efficiency. The  
critical parameters for selection of a MOSFET are:  
1. Minimum threshold voltage, VTH(MIN)  
2. On-resistance, RDS(ON)  
3. Total gate charge, Qg  
4. Reverse transfer capacitance, CRSS  
5. Maximum drain to source voltage, VDS(MAX)  
Therefore RSL can be used to provide an additional method  
for setting the current limit.  
The off-state voltage of the MOSFET is approximately equal  
to the output voltage. VDS(MAX) of the MOSFET must be  
greater than the output voltage. The power losses in the  
MOSFET can be categorized into conduction losses and ac  
switching or transition losses. RDS(ON) is needed to estimate  
the conduction losses. The conduction loss, PCOND, is the  
I2R loss across the MOSFET. The maximum conduction loss  
is given by:  
POWER DIODE SELECTION  
Observation of the boost converter circuit shows that the  
average current through the diode is the average load cur-  
rent, and the peak current through the diode is the peak  
current through the inductor. The diode should be rated to  
handle more than its peak current. The peak diode current  
can be calculated using the formula:  
ID(Peak) = IOUT/ (1−D) + IL  
www.national.com  
18  
Typical Applications (Continued)  
OUTPUT CAPACITOR SELECTION  
The output capacitor in a boost converter provides all the  
output current when the inductor is charging. As a result it  
sees very large ripple currents. The output capacitor should  
be capable of handling the maximum rms current. The rms  
current in the output capacitor is:  
where DMAX is the maximum duty cycle.  
The turn-on and turn-off transitions of a MOSFET require  
times of tens of nano-seconds. CRSS and Qg are needed to  
estimate the large instantaneous power loss that occurs  
during these transitions.  
Where  
The amount of gate current required to turn the MOSFET on  
can be calculated using the formula:  
and D, the duty cycle is equal to (VOUT − VIN)/VOUT  
.
IG = Qg.FS  
The ESR and ESL of the output capacitor directly control the  
output ripple. Use capacitors with low ESR and ESL at the  
output for high efficiency and low ripple voltage. Surface  
Mount tantalums, surface mount polymer electrolytic and  
polymer tantalum, Sanyo- OSCON, or multi-layer ceramic  
capacitors are recommended at the output.  
The required gate drive power to turn the MOSFET on is  
equal to the switching frequency times the energy required  
to deliver the charge to bring the gate charge voltage to VDR  
(see electrical characteristics and typical performance char-  
acteristics for the drive voltage specification).  
PDrive = FS.Qg.VDR  
Designing SEPIC Using LM3488  
INPUT CAPACITOR SELECTION  
Since the LM3488 controls a low-side N-Channel MOSFET,  
it can also be used in SEPIC (Single Ended Primary Induc-  
tance Converter) applications. An example of SEPIC using  
LM3488 is shown in Figure 14. As shown in Figure 14, the  
output voltage can be higher or lower than the input voltage.  
The SEPIC uses two inductors to step-up or step-down the  
input voltage. The inductors L1 and L2 can be two discrete  
inductors or two windings of a coupled transformer since  
equal voltages are applied across the inductor throughout  
the switching cycle. Using two discrete inductors allows use  
of catalog magnetics, as opposed to a custom transformer.  
The input ripple can be reduced along with size by using the  
coupled windings of transformer for L1 and L2.  
Due to the presence of an inductor at the input of a boost  
converter, the input current waveform is continuous and  
triangular, as shown in Figure 11. The inductor ensures that  
the input capacitor sees fairly low ripple currents. However,  
as the input capacitor gets smaller, the input ripple goes up.  
The rms current in the input capacitor is given by:  
The input capacitor should be capable of handling the rms  
current. Although the input capacitor is not as critical in a  
boost application, low values can cause impedance interac-  
tions. Therefore a good quality capacitor should be chosen  
in the range of 100µF to 200µF. If a value lower than 100µF  
is used, then problems with impedance interactions or  
switching noise can affect the LM3478. To improve perfor-  
mance, especially with VIN below 8 volts, it is recommended  
to use a 20resistor at the input to provide a RC filter. The  
resistor is placed in series with the VIN pin with only a bypass  
capacitor attached to the VIN pin directly (see Figure 13). A  
0.1µF or 1µF ceramic capacitor is necessary in this configu-  
ration. The bulk input capacitor and inductor will connect on  
the other side of the resistor with the input power supply.  
Due to the presence of the inductor L1 at the input, the  
SEPIC inherits all the benefits of a boost converter. One  
main advantage of SEPIC over boost converter is the inher-  
ent input to output isolation. The capacitor CS isolates the  
input from the output and provides protection against  
shorted or malfunctioning load. Hence, the A SEPIC is useful  
for replacing boost circuits when true shutdown is required.  
This means that the output voltage falls to 0V when the  
switch is turned off. In a boost converter, the output can only  
fall to the input voltage minus a diode drop.  
10138893  
FIGURE 13. Reducing IC Input Noise  
19  
www.national.com  
Designing SEPIC Using LM3488  
(Continued)  
The duty cycle of a SEPIC is given by:  
In the above equation, VQ is the on-state voltage of the  
MOSFET, Q, and VDIODE is the forward voltage drop of the  
diode.  
10138844  
FIGURE 14. Typical SEPIC Converter  
SELECTION OF INDUCTORS L1 AND L2  
POWER MOSFET SELECTION  
As in boost converter, the parameters governing the selec-  
tion of the MOSFET are the minimum threshold voltage,  
VTH(MIN), the on-resistance, RDS(ON), the total gate charge,  
Qg, the reverse transfer capacitance, CRSS, and the maxi-  
mum drain to source voltage, VDS(MAX). The peak switch  
voltage in a SEPIC is given by:  
Proper selection of the inductors L1 and L2 to maintain  
constant current mode requires calculations of the following  
parameters.  
Average current in the inductors:  
VSW(PEAK) = VIN + VOUT + VDIODE  
The selected MOSFET should satisfy the condition:  
>
VDS(MAX) VSW(PEAK)  
IL2AVE = IOUT  
The peak switch current is given by:  
Peak to peak ripple current, to calculate core loss if neces-  
sary:  
The rms current through the switch is given by:  
>
maintains the condition IL  
mode.  
iL to ensure constant current  
POWER DIODE SELECTION  
The Power diode must be selected to handle the peak  
current and the peak reverse voltage. In a SEPIC, the diode  
peak current is the same as the switch peak current. The  
off-state voltage or peak reverse voltage of the diode is VIN  
+ VOUT. Similar to the boost converter, the average diode  
current is equal to the output current. Schottky diodes are  
recommended.  
www.national.com  
20  
having high rms current ratings relative to size. Ceramic  
capacitors could be used, but the low C values will tend to  
cause larger changes in voltage across the capacitor due to  
the large currents. High C value ceramics are expensive.  
Electrolytics work well for through hole applications where  
the size required to meet the rms current rating can be  
accommodated. There is an energy balance between CS  
and L1, which can be used to determine the value of the  
capacitor. The basic energy balance equation is:  
Designing SEPIC Using LM3488  
(Continued)  
Peak current in the inductor, to ensure the inductor does not  
saturate:  
Where  
IL1PK must be lower than the maximum current rating set by  
the current sense resistor.  
is the ripple voltage across the SEPIC capacitor, and  
The value of L1 can be increased above the minimum rec-  
ommended to reduce input ripple and output ripple. How-  
ever, once DIL1 is less than 20% of IL1AVE, the benefit to  
output ripple is minimal.  
By increasing the value of L2 above the minimum recom-  
mended, IL2 can be reduced, which in turn will reduce the  
output ripple voltage:  
is the ripple current through the inductor L1. The energy  
balance equation can be solved to provide a minimum value  
for CS:  
where ESR is the effective series resistance of the output  
capacitor.  
Input Capacitor Selection  
If L1 and L2 are wound on the same core, then L1 = L2 = L.  
All the equations above will hold true if the inductance is  
replaced by 2L. A good choice for transformer with equal  
turns is Coiltronics CTX series Octopack.  
Similar to a boost converter, the SEPIC has an inductor at  
the input. Hence, the input current waveform is continuous  
and triangular. The inductor ensures that the input capacitor  
sees fairly low ripple currents. However, as the input capaci-  
tor gets smaller, the input ripple goes up. The rms current in  
the input capacitor is given by:  
SENSE RESISTOR SELECTION  
The peak current through the switch, ISW(PEAK) can be ad-  
justed using the current sense resistor, RSEN, to provide a  
certain output current. Resistor RSEN can be selected using  
the formula:  
The input capacitor should be capable of handling the rms  
current. Although the input capacitor is not as critical in a  
boost application, low values can cause impedance interac-  
tions. Therefore a good quality capacitor should be chosen  
in the range of 100µF to 200µF. If a value lower than 100µF  
is used, then problems with impedance interactions or  
switching noise can affect the LM3478. To improve perfor-  
mance, especially with VIN below 8 volts, it is recommended  
to use a 20resistor at the input to provide a RC filter. The  
resistor is placed in series with the VIN pin with only a bypass  
capacitor attached to the VIN pin directly (see Figure 13). A  
0.1µF or 1µF ceramic capacitor is necessary in this configu-  
ration. The bulk input capacitor and inductor will connect on  
the other side of the resistor with the input power supply.  
Sepic Capacitor Selection  
The selection of SEPIC capacitor, CS, depends on the rms  
current. The rms current of the SEPIC capacitor is given by:  
The SEPIC capacitor must be rated for a large ACrms cur-  
rent relative to the output power. This property makes the  
SEPIC much better suited to lower power applications where  
the rms current through the capacitor is relatively small  
(relative to capacitor technology). The voltage rating of the  
SEPIC capacitor must be greater than the maximum input  
voltage. Tantalum capacitors are the best choice for SMT,  
Output Capacitor Selection  
The ESR and ESL of the output capacitor directly control the  
output ripple. Use low capacitors with low ESR and ESL at  
21  
www.national.com  
mount tantalums, surface mount polymer electrolytic and  
polymer tantalum, Sanyo- OSCON, or multi-layer ceramic  
capacitors are recommended at the output for low ripple.  
Output Capacitor Selection  
(Continued)  
the output for high efficiency and low ripple voltage. Surface  
mount tantalums, surface mount polymer electrolytic and  
polymer tantalum, Sanyo- OSCON, or multi-layer ceramic  
capacitors are recommended at the output.  
The output capacitor of the SEPIC sees very large ripple  
currents (similar to the output capacitor of a boost converter.  
The rms current through the output capacitor is given by:  
The ESR and ESL of the output capacitor directly control the  
output ripple. Use low capacitors with low ESR and ESL at  
the output for high efficiency and low ripple voltage. Surface  
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22  
Other Application Circuits  
10138843  
FIGURE 15. Typical High Efficiency Step-Up (Boost) Converter  
23  
www.national.com  
Physical Dimensions inches (millimeters)  
unless otherwise noted  
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL  
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and  
whose failure to perform when properly used in  
accordance with instructions for use provided in the  
labeling, can be reasonably expected to result in a  
significant injury to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform  
can be reasonably expected to cause the failure of  
the life support device or system, or to affect its  
safety or effectiveness.  
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Support Center  
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Fax: +49 (0) 180-530 85 86  
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