LM3668SD-2833 [NSC]
1A, High Efficiency Dual Mode Single Inductor Buck-Boost DC/DC Converter; 1A ，高效率双模式单电感器降压 - 升压型DC / DC转换器
| 型号： | LM3668SD-2833 |
| 厂家： | 
National Semiconductor |
| 描述： | 1A, High Efficiency Dual Mode Single Inductor Buck-Boost DC/DC Converter |
| 文件： | 总18页 (文件大小：4749K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
September 10, 2008
LM3668
1A, High Efficiency Dual Mode Single Inductor Buck-Boost
DC/DC Converter
General Description
The LM3668 is a synchronous buck-boost DC-DC converter
optimized for powering low voltage circuits from a Li-Ion bat-
tery and input voltage rails between 2.5V and 5.5V. It has the
capability to support up to 1A output current over the output
voltage range. The LM3668 regulates the output voltage over
the complete input voltage range by automatically switching
between buck or boost modes depending on the input volt-
age.
Features
45µA typical quiescent current
■
■
For 2.8V/3.3V and 3.0/3.4V versions:
- 1A maximum load current for VIN = 2.8V to 5.5V
- 800mA maximum load current for VIN = 2.7V
- 600mA maximum load current for VIN = 2.5V
For 4.5/5V
■
- 1A maximum load current for VIN = 3.9V to 5.5V
- 800mA maximum load current for VIN = 3.4V to 3.8V
- 700mA maximum load current for VIN = 3.0V to 3.3V
- 600mA maximum load current for VIN = 2.7V to 2.9V
The LM3668 has 2 N-channel MOSFETS and 2 P-channel
MOSFETS arranged in a topology that provides continuous
operation through the buck and boost operating modes.
There is a MODE pin that allows the user to choose between
an intelligent automatic PFM-PWM mode operation and
forced PWM operation. During PWM mode, a fixed-frequency
2.2MHz (typ.) is used. PWM mode drives load up to 1A. Hys-
teretic PFM mode extends the battery life through reduction
of the quiescent current to 45µA (typ.) at light loads during
system standby. Internal synchronous rectification provides
high efficiency. In shutdown mode (Enable pin pulled low) the
device turns off and reduces battery consumption to 0.01µA
(typ.).
2.2MHz PWM fixed switching frequency (typ.)
■
■
■
■
Automatic PFM-PWM Mode or Forced PWM Mode
Wide Input Voltage Range: 2.5V to 5.5V
Internal synchronous rectification for high efficiency
Internal soft start: 600µs Maximum start-up time after VIN
settled
■
0.01µA typical shutdown current
■
■
■
Current overload and Thermal shutdown protection
Frequency Sync Pin: 1.6MHz to 2.7MHz
The LM3668 is available in a 12-pin LLP package. A high
switching frequency of 2.2MHz (typ.) allows the use of tiny
surface-mount components including a 2.2µH inductor, a
10µF input capacitor, and a 22µF output capacitor.
Applications
Handset Peripherals
■
■
■
■
MP3 players
Pre-Regulation for linear regulators
PDAs
Portable Hard Disk Drives
■
WiMax Modems
■
Typical Applications
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Typical Application Circuit
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Efficiency at 3.3V Output
© 2008 National Semiconductor Corporation
201914
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Functional Block Diagram
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FIGURE 1. Functional Block Diagram
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Connection Diagrams and Package Mark Information
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Top View
Bottom View
Pin Descriptions
Pin #
Pin Name
VOUT
SW2
Description
1
2
3
4
5
6
7
Connect to output capacitor.
Switching Node connection to the internal PFET switch (P2) and NFET synchronous rectifier (N2).
Power Ground.
PGND
SW1
Switching Node connection to the internal PFET switch (P1) and NFET synchronous rectifier (N1).
Supply to the power switch, connect to the input capacitor.
PVIN
EN
Enable Input. Set this digital input high for normal operation. For shutdown, set low.
VDD
Signal Supply input. If board layout is not optimum an optional 1µF ceramic capacitor is suggested
as close to this pin as possible.
8
9
NC*
SGND
No connect. Connect this pin to GND on PCB layout.
Analog and Control Ground.
10
MODE/SYNC
Mode = LOW, Automatic Mode. Mode= HI, Forced PWM Mode SYNC = external clock
synchronization from 1.6MHz to 2.7MHz (When SYNC function is used, device is forced in PWM
mode).
11
VSEL
Voltage selection pin; ( ie: 2.8V/3.3V option) Logic input low (or GND) = 2.8V and logic high = 3.3V
(or VIN) to set output Voltage.
12
FB
Feedback Analog Input. Connect to the output at the output filter.
DAP
DAP
Die Attach Pad, connect the DAP to SGND on PCB layout to enhance thermal performance. It should
not be used as a primary ground connection.
Ordering Information
NSC Package
Marking
Order Number
Package
LLP-12
LLP-12
LLP-12
Supplied As
LM3668SD - 2833
LM3668SDX - 2833
LM3668SD - 3034
LM3668SDX - 3034
LM3668SD - 4550
LM3668SDX - 4550
1000 units, Tape and Reel
4500 units, Tape and Reel
1000 units, Tape and Reel
4500 units, Tape and Reel
1000 units, Tape and Reel
4500 units, Tape and Reel
S017B
S018B
S019B
Note: As an example, if VOUT option is 3.0V/3.4V, when VSEL = Low, set VOUT to 3V; when VSEL = high, set VOUT = 3.4V. This configuration applies to all voltage
options.
3
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Storage Temperature Range
Maximum Lead Temperature
(Soldering, 10 sec)
−65°C to +150°C
+260°C
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Operating Ratings
Input Voltage Range
Recommended Load Current
Junction Temperature (TJ) Range
Ambient Temperature (TA) Range
ꢀ(Note 3)
PVIN, VDD Pin, SW1, SW2 & VOUT
:
−0.2V to +6.0V
2.5V to 5.5V
0mA to 1A
−40°C to +125°C
−40°C to +85°C
Voltage to SGND & PGND
FB, EN ,MODE, SYNC pins:
(PGND &
SGND-0.2V) to
(PVIN + 0.2)
PGND to SGND
-0.2V to 0.2V
Continuous Power Dissipation
ꢀ(Note 3)
Maximum Junction Temperature
Internally Limited
Thermal Properties
Junction-to-Ambient Thermal Resistance (θJA),
34°C/W
(TJ-MAX
)
+125°C
Leadless Lead frame Package (Note 5)
Electrical Characteristics (Notes 6, 7) Limits in standard typeface are for TJ = +25°C. Limits in boldface type
apply over the full operating ambient temperature range (−40°C ≤ = TA ≤ +85°C). Unless otherwise noted, specifications apply to
the LM3668. VIN = 3.6V = EN, VOUT = 3.3V. For VOUT = 4.5/5.0V, VIN = 4V.
Symbol
Parameter
Feedback Voltage
Conditions
Min
-3
Typ
Max
3
Units
%
VFB
ILIM
(Note 7)
Switch Peak Current Limit
Shutdown Supply Current
DC Bias Current in PFM
Open loop(Note 2)
EN =0V
1.6
1.85
0.01
2.05
1
A
ISHDN
µA
IQ_PFM
No load, device is not switching
(FB forced higher than
45
60
µA
programmed output voltage)
IQ_PWM
RDSON(P)
RDSON(N)
FOSC
DC Bias Current in PWM
Pin-Pin Resistance for PFET
Pin-Pin Resistance for NFET
Internal Oscillator Frequency
Sync Frequency Range
PWM Mode, No Switching
Switches P1 and P2
Switches N1 and N2
PWM Mode
600
130
100
2.2
750
180
150
2.5
µA
mΩ
mΩ
1.9
MHz
MHz
FSYNC
VIH
VIN = 3.6V
1.6
2.7
Logic High Input for EN, MODE/
SYNC pins
1.1
V
V
VIL
Logic Low Input for EN, MODES/
SYNC pins
0.4
1
IEN, MODE, SYNC
EN, MODES/SYNC pins Input
Current
0.3
µA
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics tables.
Note 2: Electrical Characteristic table reflects open loop data (FB = 0V and current drawn from SW pin ramped up until cycle by cycle current limits is activated).
Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops by 10%.
Note 3: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125ºC), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
Note 4: The Human body model is a 100pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin. MIL-STD-883 3015.7
Note 5: Junction-to-ambient thermal resistance (θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the
JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 101.6mm x 76.2mm x 1.6mm. Thickness of the copper layers are 2oz/1oz/1oz/
2oz. The middle layer of the board is 60mm x 60mm. Ambient temperature in simulation is 22°C, still air.
Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special
care must be paid to thermal dissipation issues in board design.
Note 6: All voltage is with respect to SGND.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 8: CIN and COUT: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
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Typical Performance Characteristics Typical Application Circuit (Figure 1): VIN = 3.6V, L = 2.2µH,
CIN = 10µF, COUT = 22µF (Note 8), TA = 25°C , unless otherwise stated.
Supply Current vs. Temperature (Not switching)
(VOUT = 3.4V)
Switching Frequency vs. Temperature
(VOUT = 3.4V)
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NFET_RDS (on) vs. Temperature
(VOUT = 3.4V)
PFET_RDS (on) vs. Temperature
(VOUT = 3.4V)
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ILIMIT vs. Temperature
(VOUT = 3.4V)
Efficiency at VOUT = 2.8V
(Forced PWM Mode)
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Efficiency at VOUT = 2.8V
(Auto Mode)
Efficiency at VOUT = 3.0V
(Forced PWM Mode)
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Efficiency at VOUT = 3.0V
(Auto Mode)
Efficiency at VOUT = 3.3V
(Forced PWM Mode)
Efficiency at VOUT = 3.3V
(Auto Mode)
Efficiency at VOUT = 3.4V
(Forced PWM Mode)
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Efficiency at VOUT = 3.4V
(Auto Mode)
Efficiency at VOUT = 4.5V
(Forced PWM Mode)
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Efficiency at VOUT = 4.5V
(Auto Mode)
Efficiency at VOUT = 5.0V
(Forced PWM Mode)
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Efficiency at VOUT = 5.0V
(Auto Mode)
Line Transient in Buck Mode
( VOUT = 3.4V, Load = 500mA)
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Line Transient in Boost Mode
( VOUT = 3.4V, Load = 500mA)
Line Transient in Buck-Boost Mode
( VOUT = 3.4V, Load = 500mA)
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Load Transient in Buck Mode
(Forced PWM Mode)
VIN = 4.2V, VOUT = 3.4V, Load = 0-500mA
Load Transient in Boost Operation
(Forced PWM Mode)
VIN = 2.7V, VOUT = 3.4V, Load = 0-500mA
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Load Transient in Buck-Boost Operation
(Forced PWM Mode)
VIN = 3.44V, VOUT = 3.4V, Load = 0-500mA
Load Transient in Buck Mode
(Forced PWM Mode)
VIN = 4.2V, VOUT = 3.0V, Load = 0-500mA
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Load Transient in Boost Mode
(Forced PWM Mode)
VIN = 2.7V, VOUT = 3.0V, Load = 0-500mA
Load Transient in Buck-Boost Mode
(Forced PWM Mode)
VIN = 3.05V, VOUT = 3.0V, Load = 0-500mA
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Load Transient in Buck Mode
(Auto Mode)
VIN = 4.2V, VOUT = 3.3V, Load = 50-150mA
Load Transient in Boost Mode
(Auto Mode)
VIN = 2.7V, VOUT = 3.3V, Load = 50-150mA
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Load Transient in Buck-Boost Mode
(Auto Mode)
VIN = 3.6V, VOUT = 3.3V, Load = 50-150mA
Load Transient in Buck Mode
(Forced PWM Mode)
VIN = 5.5V, VOUT = 5.0V, Load = 0-500mA
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Load Transient in Boost Mode
(Forced PWM Mode)
VIN = 3.5V, VOUT = 5.0V, Load = 0-500mA
Typical Switching Waveform in Boost Mode
(PWM Mode)
VIN = 2.7V, VOUT = 3.0V, Load = 500mA
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Typical Switching Waveform in Buck Mode
(PWM Mode)
Typical Switching Waveformt in Boost Mode
(PFM Mode)
VIN = 3.6V, VOUT = 3.0V, Load = 500mA
VIN = 2.7V, VOUT = 3.0V, Load = 50mA
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Typical Switching Waveform in Buck Mode
(PFM Mode)
Typical Switching Waveform in Boost Mode
(PWM Mode)
VIN = 3.6V, VOUT = 3.0V, Load = 50mA
VIN = 3V, VOUT = 3.4V, Load = 500mA
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Typical Switching Waveform in Buck Mode
(PWM Mode)
Typical Switching Waveform in Boost Mode
(PFM Mode)
VIN = 4V, VOUT = 3.4V, Load = 500mA
VIN = 3V, VOUT = 3.4V, Load = 50mA
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Typical Switching Waveform in Buck Mode
(PFM Mode)
Start up in PWM Mode
(VOUT = 3.4V, Load = 1mA)
VIN = 4V, VOUT = 3.4V, Load = 50mA
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Start up in PWM Mode
(VOUT = 3.4V, Load = 500mA)
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Circuit Description
The LM3668, a high-efficiency Buck or Boost DC-DC con-
verter, delivers a constant voltage from either a single Li-Ion
or three cell NIMH/NiCd battery to portable devices such as
mobile phones and PDAs. Using a voltage mode architecture
with synchronous rectification, the LM3668 has the ability to
deliver up to 1A depending on the input voltage, output volt-
age, ambient temperature and the chosen inductor.
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In addition, the device incorporates a seamless transition
from buck-to-boost or boost-to-buck mode. The internal error
amplifier continuously monitors the output to determine the
transition from buck-to-boost or boost-to-buck operation. Fig-
ure 2 shows the four switches network used for the buck and
boost operation. Table 1 summarizes the state of the switches
in different modes.
FIGURE 3. Simplified Circuit for Buck Operation
Boost Operation
When the input voltage is smaller than the output voltage, the
device enters boost mode operation where P1 is always ON,
while switches N2 & P2 control the output. Figure 4 shows the
simplified circuit for boost mode operation.
There are three modes of operation depending on the current
required: PWM (Pulse Width Modulation), PFM (Pulse Fre-
quency Modulation), and shutdown. The device operates in
PWM mode at load currents of approximately 80mA or higher
to improve efficiency. Lighter load current causes the device
to automatically switch into PFM mode to reduce current con-
sumption and extend battery life. Shutdown mode turns off
the device, offering the lowest current consumption.
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FIGURE 4. Simplified Circuit for Boost Operation
PWM Operation
In PWM operation, the output voltage is regulated by switch-
ing at a constant frequency and then modulating the energy
per cycle to control power to the load. In Normal operation,
the internal error amplifier provides an error signal, Vc, from
the feedback voltage and Vref. The error amplifier signal, Vc,
is compared with a voltage, Vcenter, and used to generate
the PWM signals for both Buck & Boost modes. Signal Vcen-
ter is a DC signal which sets the transition point of the buck
and boost modes. Below are three regions of operation:
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FIGURE 2. Simplified Diagram of Switches
State of Switches in Different Modes
Mode
Always ON
Always
OFF
Switching
•
•
Region I: If Vc is less than Vcenter, Buck mode.
Region II: If Vc and Vcenter are equal, both PMOS
switches (P1, P2) are on and both NMOS switches (N1,
N2) are off. The power passes directly from input to output
via P1 & P2
Buck
SW P2
SW P1
SW N2
SW N1
SW P1 & N1
SW N2 & P2
Boost
TABLE 1
•
Region III: If Vc is greater than Vcenter, Boost mode.
The Buck-Boost operation is avoided, to improve the efficien-
cy across VIN and load range.
Buck Operation
When the input voltage is greater than the output voltage, the
device operates in buck mode where switch P2 is always ON
and P1 & N1 control the output . Figure 3 shows the simplified
circuit for buck mode operation.
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FIGURE 5. PWM Generator Block Diagram
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~1.6% of the nominal PWM output voltage (Figure 6). If the
output voltage is below the ‘high’ PFM comparator threshold,
the P1 & P2 (Buck mode) or N2 & P1 (Boost mode) power
switches are turned on. It remains on until the output voltage
reaches the ‘high’ PFM threshold or the peak current exceeds
the IPFM level set for PFM mode. The typical peak current in
PFM mode is: IPFM = 220mA
Internal Synchronous Rectification
While in PWM mode, the LM3668 uses an internal MOSFET
as a synchronous rectifier to reduce rectifier forward voltage
drop and associated power loss. Synchronous rectification
provides a significant improvement in efficiency whenever the
output voltage is relatively low compare to the voltage drop
across an ordinary rectifier diode.
Once the P1 ( Buck mode) or N2 ( Boost mode) power switch
is turned off, the N1 & P2 ( Buck mode) or P1 & P2 (Boost
mode) power switches are turned on until the inductor current
ramps to zero. When the zero inductor current condition is
detected, the N1( Buck mode) or P2 ( Boost mode) power
switches are turned off. If the output voltage is below the ‘high’
PFM comparator threshold, the P1 & P2 (Buck mode) or N2
& P1 ( Boost mode) switches are again turned on and the
cycle is repeated until the output reaches the desired level.
Once the output reaches the ‘high’ PFM threshold, the N1 &
P2 (Buck mode) or P1 & P2 ( Boost mode) switches are turned
on briefly to ramp the inductor current to zero, then both output
switches are turned off and the part enters an extremely low
power mode. Quiescent supply current during this ‘sleep’
mode is 45µA (typ), which allows the part to achieve high ef-
ficiency under extremely light load conditions.
PFM Operation
At very light loads, the converter enters PFM mode and op-
erates with reduced switching frequency and supply current
to maintain high efficiency. The part automatically transitions
into PFM mode when either of two following conditions occur
for a duration of 128 or more clock cycles:
A.ꢁThe inductor current reaches zero.
B.ꢁThe peak inductor current drops below the IMODE level,
(Typically IMODE < 45mA + VIN/80 Ω ).
In PFM operation, the compensation circuit in the error am-
plifier is turned off. The error amplifier works as a hysteretic
comparator. The PFM comparator senses the output voltage
via the feedback pin and controls the switching of the output
FETs such that the output voltage ramps between ~0.8% and
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FIGURE 6. PFM to PWM Mode Transition
In addition to the auto mode transition, the LM3668 operates
in PFM Buck or PFM Boost based on the following conditions.
There is a small delta (~500mV) known as dv1(~200mV) &
dv2(~300mV) when VOUT_TARGET is very close to VIN where
the LM3668 can be in either Buck or Boost mode. For exam-
ple, when VOUT_TARGET = 3.3V and VIN is between 3.1V &
3.6V, the LM3668 can be in either mode depending on the
•
•
•
Region I: If VIN < VOUT_TARGET - dv1, the regulator operates
in Boost mode.
Region II: If VOUT_TARGET - dv1 < VIN < VOUT_TARGET
+
dv2 ,the regulator operates in either Buck or Boost mode.
Region III: If VIN > VOUT_TARGET + dv2, the regulator
operates in Buck mode.
VIN vs VOUT_TARGET
.
13
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FIGURE 7. VOUT vs VIN Transition
Start-up
The LM3668 has a soft-start circuit that smooth the output
voltage and ramp current during start-up. During start-up the
bandgap reference is slowly ramped up and switch current
limit is reduced to half the typical value. Soft start is activated
only if EN goes from logic low to logic high after VIN reaches
2.5V. The start-up time thereby depends on the output ca-
pacitor and load current demanded at start-up. It is not rec-
ommended to start up the device at full load while in soft-start.
In the buck PFM operation, P2 is always turned on and N2 is
always turned off , P1 and N1 power switches are switching.
P1 and N1 are turned off to enter " sleep mode" when the
output voltage reaches the "high" comparator threshold. In
boost PFM operation, P2 and N2 are switching. P1 is turned
on and N1 is turned off when the output voltage is below the
"high" threshold. Unlike in buck mode, all four power switches
are turned off to enter "sleep" mode when the output voltage
reaches the "high" threshold in boost mode. In addition, the
internal current sensing of the IPFM is used to determine the
precise condition to switch over to buck or boost mode via the
PFM generator.
Application Information
SYNC/MODE PIN
If the SYNC/MODE pin is set high, the device is set to operate
at PWM mode only. If SYNC/MODE pin is set low, the device
is set to automatically transition from PFM to PWM or PWM
to PFM depending on the load current. Do not leave this pin
floating. The SYNC/MODE pin can also be driven by an ex-
ternal clock to set the desired switching frequency between
1.6MHz to 2.7MHz.
Current Limit Protection
The LM3668 has current limit protection to prevent excessive
stress on itself and external components during overload con-
ditions. The internal current limit comparator will disable the
power device at a typical switch peak current limit of 1.85A
(typ.).
VSEL Pin
Under Voltage Protection
The LM3668 has built in logic for conveniently setting the out-
put voltage, for example if VSEL high, the output is set to 3.3V;
with VSEL low the output is set to 2.8V. It is not recommended
to use this function for dynamically switching between 2.8V
and 3.3V or switching at maximum load.
The LM3668 has an UVP comparator to turn the power device
off in case the input voltage or battery voltage is too low . The
typical UVP threshold is around 2V.
Short Circuit Protection
When the output of the LM3668 is shorted to GND, the current
limit is reduced to about half of the typical current limit value
until the short is removed.
Maximum Current
The LM3668 is designed to operate up to 1A. For input volt-
ages at 2.5V, the maximum operating current is 600mA and
800mA for 2.7V input voltage. In any mode it is recommended
to avoid starting up the device at minimum input voltage and
maximum load. Special attention must be taken to avoid op-
erating near thermal shutdown when operating in boost mode
at maximum load (1A). A simple calculation can be used to
determine the power dissipation at the operating condition;
PD-MAX = (TJ-MAX-OP – TA-MAX)/θJA . The LM3668 has thermal
resistance θJA = 34°C/W ((Note 3) and (Note 5)), and maxi-
mum operating ambient of 85°C. As a result, the maximum
power dissipation using the above formula is around
1176mW. Refer to dissipation table below for PD-MAX value at
different ambient temperatures.
Shutdown
When the EN pin is pulled low, P1 and P2 are off; N1 and N2
are turned on to pull SW1 and SW2 to ground.
Thermal Shutdown
The LM3668 has an internal thermal shutdown function to
protect the die from excessive temperatures. The thermal
shutdown trip point is typically 150°C; normal operation re-
sumes when the temperature drops below 125°C.
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As a result, the inductor should be selected according to the
highest of the two ISAT values.
Dissipation Rating Table
θJA
TA ≤ 25°C
TA ≤ 60°C
TA ≤ 85°C
1176mW
A more conservative and recommended approach is to
choose an inductor that has a saturation current rating greater
than the maximum current limit of 2.05A.
34°C/W ( 4
layers board
per JEDEC
standard)
2941mW
1912mW
A 2.2µH inductor with a saturation current rating of at least
2.05A is recommended for most applications. The inductor’s
resistance should be less than 100mΩ for good efficiency. For
low-cost applications, an unshielded bobbin inductor could be
considered. For noise critical applications, a toroidal or shield-
ed-bobbin inductor should be used. A good practice is to lay
out the board with overlapping footprints of both types for de-
sign flexibility. This allows substitution of a low-noise shielded
inductor, in the event that noise from low-cost bobbin model
is unacceptable.
Inductor Selection
There are two main considerations when choosing an induc-
tor: the inductor should not saturate, and the inductor current
ripple should be small enough to achieve the desired output
voltage ripple. Different saturation current rating specifica-
tions are followed by different manufacturers so attention
must be given to details. Saturation current ratings are typi-
cally specified at 25°C. However, ratings at the maximum
ambient temperature of application should be requested from
the manufacturer. Shielded inductors radiate less noise and
should be preferred.
Suggest Inductors and Suppliers
Model
Vendor Dimension D.C.R
ISAT
s
(max)
LxWxH
(mm)
In the case of the LM3668, there are two modes (Buck &
Boost) of operation that must be consider when selecting an
inductor with appropriate saturation current. The saturation
current should be greater than the sum of the maximum load
current and the worst case average to peak inductor current.
The first equation shows the buck mode operation for worst
case conditions and the second equation for boost condition.
LPS4012- Coilcraft 4 x 4 x 1.2
222L
2.1A
2.5A
100 mΩ
70 mΩ
67 mΩ
LPS4018- Coilcraft 4 x 4 x 1.8
222L
1098AS-2 TOKO 3 x 2.8x 1.2
R0M (2µF)
1.8A
( lower
current
application
s)
Input Capacitor Selection
A ceramic input capacitor of at least 10 µF, 6.3V is sufficient
for most applications. Place the input capacitor as close as
possible to the PVIN pin of the device. A larger value may be
used for improved input voltage filtering. Use X7R or X5R
types; do not use Y5V. DC bias characteristics of ceramic ca-
pacitors must be considered when selecting case sizes like
0805 or 0603. The input filter capacitor supplies current to
the PFET switch of the LM3668 in the first half of each cycle
and reduces voltage ripple imposed on the input power
source. A ceramic capacitor’s low ESR provides the best
noise filtering of the input voltage spikes due to this rapidly
changing current. For applications where input voltage is 4V
or higher, it is best to use a higher voltage rating capacitor to
eliminate the DC bias affect over capacitance.
•
•
•
•
IRIPPLE: Peak inductor current
IOUTMAX: Maximum load current
VIN: Maximum input voltage in application
L : Min inductor value including worst case tolerances
(30% drop can be considered)
f : Minimum switching frequency
VOUT: Output voltage
D: Duty Cycle for CCM Operation
VOUT : Output Voltage
VIN: Input Voltage
Output Capacitor Selection
•
•
•
•
•
A ceramic output capacitor of 22µF, 6.3V (use 10V or higher
rating for 4.5/5V output option) is sufficient for most applica-
tions. Multilayer ceramic capacitors such as X5R or X7R with
low ESR is a good choice for this as well. These capacitors
provide an ideal balance between small size, cost, reliability
and performance. Do not use Y5V ceramic capacitors as they
have poor dielectric performance over temperature and poor
voltage characteristic for a given value.
Example using above equations:
•
•
•
•
•
•
•
VIN = 2.8V to 4V
VOUT = 3.3V
IOUT = 500mA
L = 2.2µH
F = 2MHz
Buck: ISAT = 567mA
Boost: ISAT = 638mA
Extra attention is required if a smaller case size capacitor is
used in the application. Smaller case size capacitors typically
have less capacitance for a given bias voltage as compared
to a larger case size capacitor with the same bias voltage.
Please contact the capacitor manufacturer for detail informa-
15
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tion regarding capacitance verses case size. Table 1 lists
several capacitor suppliers.
Note that the output voltage ripple is dependent on the induc-
tor current ripple and the equivalent series resistance of the
output capacitor (RESR).
The output filter capacitor smooths out current flow from the
inductor to the load, helps maintain a steady output voltage
during transient load changes and reduces output voltage
ripple. These capacitors must be selected with sufficient ca-
pacitance and sufficiently low ESR to perform these functions.
The RESR is frequency dependent (as well as temperature
dependent); make sure the value used for calculations is at
the switching frequency of the part.
TABLE 1. Suggested Capacitors and Suppliers
Case Size
Inch (mm)
Model
Type
Vendor
Voltage Rating
10 µF for CIN (For 4.5/5V option, use 10V or higher rating capacitor)
GRM21BR60J106K
JMK212BJ106K
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Murata
Taiyo-Yuden
TDK
6.3V
6.3V
6.3V
10V
10V
0805 (2012)
0805 (2012)
0805 (2012)
0806(2012)
0805(2012)
C2012X5R0J106K
LMK212 BJ106MG (+/-20%)
LMK212 BJ106KG (+/-10%)
Taiyon-Yuden
Taiyon-Yuden
22 µF for COUT (For 4.5/5V option, use 10V or higher rating capacitor)
JMK212BJ226MG
LMK212BJ226MG
Ceramic, X5R
Ceramic, X5R
Taiyo-Yuden
Taiyo-Yuden
6.3V
10V
0805 (2012)
0805 (2012)
(quiet GND) and star GND them at a single point on the PCB
preferably close to the device GND pin.
Layout Considerations
As for any high frequency switcher, it is important to place the
external components as close as possible to the IC to maxi-
mize device performance. Below are some layout recommen-
dations:
3) Connect the ground pins and filter capacitors together via
a ground plane to prevent switching current circulating
through the ground plane. Additional layout consideration re-
garding the LLP package can be found in Application AN
1187.
1) Place input filter and output filter capacitors close to the IC
to minimize copper trace resistance which will directly effect
the overall ripple voltage.
2) Route noise sensitive trace away from noisy power com-
ponents. Separate power GND (Noisy GND) and Signal GND
www.national.com
16
Physical Dimensions inches (millimeters) unless otherwise noted
12–Pin LLP
NS Package Number SDF12A
17
www.national.com
Notes
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