LM3671MFX-2.8/NOPB [NSC]
IC 1.15 A SWITCHING REGULATOR, 2600 kHz SWITCHING FREQ-MAX, PDSO5, 2.92 X 2.84 MM, 1.20 MM HEIGHT, LEAD FREE, SOT-23, 5 PIN, Switching Regulator or Controller;
| 型号： | LM3671MFX-2.8/NOPB |
| 厂家： | 
National Semiconductor |
| 描述： | IC 1.15 A SWITCHING REGULATOR, 2600 kHz SWITCHING FREQ-MAX, PDSO5, 2.92 X 2.84 MM, 1.20 MM HEIGHT, LEAD FREE, SOT-23, 5 PIN, Switching Regulator or Controller 开关 光电二极管 |
| 文件： | 总24页 (文件大小：7360K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 28, 2008
LM3671
2MHz, 600mA Step-Down DC-DC Converter
General Description
Features
The LM3671 step-down DC-DC converter is optimized for
powering low voltage circuits from a single Li-Ion cell battery
and input voltage rails from 2.7V to 5.5V. It provides up to
600mA load current, over the entire input voltage range.
There are several different fixed voltage output options avail-
able as well as an adjustable output voltage version range
from 1.1V to 3.3V.
16 µA typical quiescent current
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■
600 mA maximum load capability
2 MHz PWM fixed switching frequency (typ.)
Automatic PFM/PWM mode switching
Internal synchronous rectification for high efficiency
Internal soft start
■
■
■
■
■
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■
The device offers superior features and performance for mo-
bile phones and similar portable systems. Automatic intelli-
gent switching between PWM low-noise and PFM low-current
mode offers improved system control. During PWM mode, the
device operates at a fixed-frequency of 2 MHz (typ.). Hys-
teretic PFM mode extends the battery life by reducing the
quiescent current to 16 µA (typ.) during light load and standby
operation. Internal synchronous rectification provides high ef-
ficiency during PWM mode operation. In shutdown mode, the
device turns off and reduces battery consumption to 0.01 µA
(typ.).
0.01 µA typical shutdown current
Operates from a single Li-Ion cell battery
Only three tiny surface-mount external components
required (one inductor, two ceramic capacitors)
Current overload and Thermal shutdown protection
Available in fixed output voltages and adjustable version
SOT23-5, 5-bump micro SMD and 6-pin LLP packages
■
■
■
Applications
Mobile phones
■
■
■
■
■
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The LM3671 is available in SOT23-5, tiny 5-bump micro SMD
and a 6-pin LLP packages in leaded (PB) and lead-free (NO
PB) versions. A high switching frequency of 2 MHz (typ.) al-
lows use of tiny surface-mount components. Only three ex-
ternal surface-mount components, an inductor and two
ceramic capacitors, are required.
PDAs
MP3 players
W-LAN
Portable instruments
Digital still cameras
Portable Hard disk drives
Typical Application Circuits
20108401
FIGURE 1. Typical Application Circuit
© 2008 National Semiconductor Corporation
201084
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20108431
FIGURE 2. Typical Application Circuit for ADJ version
Connection Diagram and Package Mark Information
20108402
FIGURE 3. Top View
SOT23-5 Package NS Package Number MF05A (2.92mm x 2.84mm x 1.2mm)
20108444
FIGURE 4. 5-Bump Micro SMD Package NS Package Number TLA05CBA (1.05mm x 1.38mm x 0.6mm)
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20108462
FIGURE 5. 6-Pin LLP Package Number LCA06B (2mm x 2mm x 0.6mm)
Pin Descriptions (SOT23-5)
Pin #
Name
VIN
Description
1
2
3
Power supply input. Connect to the input filter capacitor (Figure 1).
GND
EN
Ground pin.
Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled
when >1.0V. Do not leave this pin floating.
4
5
FB
Feedback analog input. Connect directly to the output filter capacitor for fixed voltage
versions. For adjustable version external resistor dividers are required (Figure 2). The
internal resistor dividers are disabled for the adjustable version.
SW
Switching node connection to the internal PFET switch and NFET synchronous rectifier.
Pin Descriptions (5-Bump Micro SMD)
Pin #
A1
Name
VIN
Description
Power supply input. Connect to the input filter capacitor (Figure 1).
A3
GND
EN
Ground pin.
C1
Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled
when >1.0V. Do not leave this pin floating.
C3
B2
FB
Feedback analog input. Connect directly to the output filter capacitor for fixed voltage
versions. For adjustable version external resistor dividers are required (Figure 2). The
internal resistor dividers are disabled for the adjustable version.
SW
Switching node connection to the internal PFET switch and NFET synchronous rectifier.
Pin Descriptions (6-Pin LLP)
Pin #
Name
Description
1
EN
Enable pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled
when >1.0V. Do not leave this pin floating.
2
3
4
5
6
Pgnd
VIN
Ground pin.
Power supply input. Connect to the input filter capacitor ().
Switching node connection to the internal PFET switch and NFET synchronous rectifier.
Singnal ground (feedback ground).
SW
Sgnd
FB
Feedback analog input. Connect directly to the output filter capacitor for fixed voltage
versions. For adjustable version external resistor dividers are required (Figure 2). The
internal resistor dividers are disabled for the adjustable version.
3
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Ordering Information (SOT23-5)
Voltage Option
Order Number
LM3671MF-ADJ
Spec
NOPB
NOPB
Package Marking
Supplied As
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
1000 units, Tape-and-Reel
3000 units, Tape-and-Reel
ADJ
LM3671MFX-ADJ
LM3671MF-ADJ
LM3671MFX-ADJ
LM3671MF-1.2
LM3671MFX-1.2
LM3671MF-1.2
LM3671MFX-1.2
LM3671MF-1.25
LM3671MFX-1.25
LM3671MF-1.25
LM3671MFX-1.25
LM3671MF-1.375
LM3671MFX-1.375
LM3671MF-1.375
LM3671MFX-1.375
LM3671MF-1.5
LM3671MFX-1.5
LM3671MF-1.5
LM3671MFX-1.5
LM3671MF-1.6
LM3671MFX-1.6
LM3671MF-1.6
LM3671MFX-1.6
LM3671MF-1.8
LM3671MFX-1.8
LM3671MF-1.8
LM3671MFX-1.8
LM3671MF-1.875
LM3671MFX-1.875
LM3671MF-1.875
LM3671MFX-1.875
LM3671MF-2.5
LM3671MFX-2.5
LM3671MF-2.5
LM3671MFX-2.5
LM3671MF-2.8
LM3671MFX-2.8
LM3671MF-2.8
LM3671MFX-2.8
LM3671MF-3.3
LM3671MFX-3.3
LM3671MF-3.3
LM3671MFX-3.3
SBTB
1.2
1.25
1.375
1.5
NOPB
NOPB
SBPB
SDRB
SEDB
SBRB
SDUB
SBSB
SDVB
SJRB
SJSB
SJEB
NOPB
NOPB
NOPB
NOPB
NOPB
NOPB
1.6
NOPB
NOPB
1.8
NOPB
NOPB
1.875
2.5
NOPB
NOPB
NOPB
NOPB
2.8
NOPB
NOPB
3.3
NOPB
NOPB
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Ordering Information (5-bump Micro SMD)
Voltage Option
Order Number
LM3671TL-ADJ
Spec
NOPB
NOPB
Package Marking
Supplied As
250 units, Tape-and-Reel
ADJ
LM3671TLX-ADJ
LM3671TL-ADJ
LM3671TLX-ADJ
LM3671TL-1.2
LM3671TLX-1.2
LM3671TL-1.2
LM3671TLX-1.2
LM3671TL-1.5
LM3671TLX-1.5
LM3671TL-1.5
LM3671TLX-1.5
LM3671TL-1.8
LM3671TLX-1.8
LM3671TL-1.8
LM3671TLX-1.8
LM3671TL-1.875
LM3671TLX-1.875
LM3671TL-1.875
LM3671TLX-1.875
LM3671TL-2.5
LM3671TLX-2.5
LM3671TL-2.5
LM3671TLX-2.5
LM3671TL-2.8
LM3671TLX-2.8
LM3671TL-2.8
LM3671TLX-2.8
LM3671TL-3.3
LM3671TLX-3.3
LM3671TL-3.3
LM3671TLX-3.3
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
250 units, Tape-and-Reel
3000 units, Tape-and-Reel
E
1.2
1.5
NOPB
NOPB
C
D
B
S
L
NOPB
NOPB
1.8
NOPB
NOPB
1.875
2.5
NOPB
NOPB
NOPB
NOPB
2.8
NOPB
NOPB
K
J
3.3
NOPB
NOPB
Ordering Information (6-Pin LLP)
Voltage Option
Order Number
LM3671LC-1.2
Spec
NOPB
NOPB
NOPB
NOPB
NOPB
NOPB
NOPB
NOPB
Package Marking
Supplied As
1000 units, Tape-and-Reel
4500 units, Tape-and-Reel
1000 units, Tape-and-Reel
4500 units, Tape-and-Reel
1000 units, Tape-and-Reel
4500 units, Tape-and-Reel
1000 units, Tape-and-Reel
4500 units, Tape-and-Reel
1.2
S39
LM3671LCX-1.2
LM3671LC-1.3
LM3671LCX-1.3
LM3671LC-1.6
LM3671LCX-1.6
LM3671LC-1.8
LM3671LCX-1.8
1.3
1.6
1.8
S40
S41
S42
5
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Absolute Maximum Ratings (Note 1)
Thermal Properties
Junction-to-Ambient Thermal
Resistance (θJA) (SOT23-5) for 4
layer board (Note 6)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
130°C/W
85°C/W
VIN Pin: Voltage to GND
FB, SW, EN Pin:
−0.2V to 6.0V
Junction-to-Ambient Thermal
Resistance (θJA) (Micro SMD) for 4
layer board (Note 6)
(GND−0.2V) to
(VIN + 0.2V)
Continuous Power Dissipation
(Note 3)
Internally Limited
Junction-to-Ambient Thermal
Resistance (θJA) (COL) for 4 layer
board (Note 6)
165°C/W
Junction Temperature (TJ-MAX
Storage Temperature Range
Maximum Lead Temperature
(Soldering, 10 sec.)
)
+125°C
−65°C to +150°C
260°C
ESD Rating (Note 4)
Human Body Model
Machine Model
2 kV
200V
Operating Ratings (Notes 1, 2)
Input Voltage Range (Note 10)
2.7V to 5.5V
Recommended Load Current
0mA to 600 mA
Junction Temperature (TJ) Range
−30°C to +125°C
Ambient Temperature (TA) Range (Note −30°C to +85°C
5)
Electrical Characteristics (Notes 2, 8, 9) Limits in standard typeface are for TJ = 25°C. Limits in boldface type
apply over the full operating ambient temperature range (−30°C ≤ TA ≤ +85°C). Unless otherwise noted, specifications apply to
the LM3671MF/TL/LC with VIN = EN = 3.6V
Symbol
VIN
Parameter
Condition
Min
2.7
-4
Typ
Max
5.5
+4
Units
V
Input Voltage
(Note 10)
VFB
Feedback Voltage (Fixed) MF
Feedback Voltage (Fixed) TL
Feedback Voltage (Fixed) LC
PWM mode (Note 12)
%
-2.5
-4
+2.5
+4
Feedback Voltage (ADJ) MF
(Note 11)
PWM mode (Note 12)
-4
+4
%
Feedback Voltage (ADJ) TL
Line Regulation
-2.5
+2.5
0.031
%/V
2.7V ≤ VIN ≤ 5.5V
IO = 10 mA
Load Regulation
0.0013
%/mA
100 mA ≤ IO ≤ 600 mA
VIN= 3.6V
VREF
ISHDN
IQ
Internal Reference Voltage
Shutdown Supply Current
DC Bias Current into VIN
0.5
0.01
16
V
EN = 0V
1
µA
µA
No load, device is not switching (FB
forced higher than programmed
output voltage)
35
RDSON (P)
RDSON (N)
ILIM
Pin-Pin Resistance for PFET
Pin-Pin Resistance for NFET
Switch Peak Current Limit
Logic High Input
VIN= VGS= 3.6V
VIN= VGS= 3.6V
Open Loop (Note 7)
380
250
500
400
mΩ
mΩ
mA
V
830
1.0
1020
1150
VIH
VIL
Logic Low Input
0.4
1
V
IEN
Enable (EN) Input Current
Internal Oscillator Frequency
0.01
2
µA
FOSC
PWM Mode (Note 12)
1.6
2.6
MHz
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see
the Electrical Characteristics tables.
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Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ= 150°C (typ.) and disengages at
TJ= 130°C (typ.).
Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin. MIL-STD-883 3015.7
Note 5: In Applications where high power dissipation and/or poor package resistance is present, the maximum ambient temperature may have to be derated.
Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX), the maximum power dissipation of the device in
the application (PD-MAX) and the junction to ambient thermal resistance of the package (θJA) in the application, as given by the following equation:TA-MAX= TJ-MAX
− (θJAx PD-MAX). Refer to Dissipation rating table for PD-MAX values at different ambient temperatures.
Note 6: Junction to ambient thermal resistance is highly application and board layout dependent. In applications where high power dissipation exists, special care
must be given to thermal dissipation issues in board design. Specified value of 130 °C/W for SOT23-5 is based on a 4 layer, 4" x 3", 2/1/1/2 oz. Cu board as per
JEDEC standards is used.
Note 7: Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Electrical Characteristic table reflects
open loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current limit is activated). Closed loop current limit is the peak inductor
current measured in the application circuit by increasing output current until output voltage drops by 10%.
Note 8: Min and Max limits are guaranteed by design, test or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 9: The parameters in the electrical characteristic table are tested at VIN= 3.6V unless otherwise specified. For performance over the input voltage range
refer to datasheet curves.
Note 10: The input voltage range recommended for ideal applications performance for the specified output voltages are given below:
VIN = 2.7V to 4.5V for 1.1V ≤ VOUT < 1.5V
VIN = 2.7V to 5.5V for 1.5V ≤ VOUT < 1.8V
VIN = (VOUT+ VDROPOUT) to 5.5V for 1.8V ≤ VOUT ≤ 3.3V
where VDROPOUT = ILOAD *( RDSON, PFET + RINDUCTOR
)
Note 11: ADJ version is configured to 1.5V output. For ADJ output version:
VIN = 2.7V to 4.5V for 0.90V ≤ VOUT < 1.1V
VIN = 2.7V to 5.5V for 1.1V ≤ VOUT < 3.3V
Note 12: Test condition: for VOUT less than 2.5V, VIN = 3.6V; for VOUT greater than or equal to 2.5V, VIN = VOUT+ 1V.
Dissipation Rating Table
TA= 60°C
Power Rating
TA= 85°C
Power Rating
θJA
TA≤ 25°C
Power Rating
770mW
130°C/W (4 layer board)
SOT23-5
500mW
765mW
394mW
310mW
470mW
242mW
85°C/W (4 layer board) 5-bump
Micro SMD
1179mW
606mW
165°C/W (4 layer board) 6-pin
LLP
7
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Block Diagram
20108418
FIGURE 6. Simplified Functional Diagram
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Typical Performance Characteristics
LM3671MF/TL/LC, Circuit of Figure 1, VIN= 3.6V, VOUT= 1.5V, TA= 25°C, unless otherwise noted.
Quiescent Supply Current vs. Supply Voltage
Shutdown Current vs. Temp
20108405
20108404
Feedback Bias Current vs. Temp
Switching Frequency vs. Temperature
20108440
20108447
RDS(ON) vs. Temperature
Open/Closed Loop Current Limit vs. Temperature
20108433
20108448
9
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Output Voltage vs. Supply Voltage
(VOUT = 1.5V)
Output Voltage vs. Supply Voltage
(VOUT = 2.5V)
20108429
20108458
Output Voltage vs. Temperature
(VOUT = 1.5V)
Output Voltage vs. Temperature
(VOUT = 2.5V)
20108406
20108459
Output Voltage vs. Output Current
(VOUT = 1.5V)
Output Voltage vs. Output Current
(VOUT = 2.5V)
20108407
20108460
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Efficiency vs. Output Current
(VOUT = 1.5V, L= 2.2 µH)
Efficiency vs. Output Current
(VOUT = 1.8V, L= 2.2 µH)
20108408
20108409
Efficiency vs. Output Current
(VOUT = 2.5V, L= 2.2 µH)
Efficiency vs. Output Current
(VOUT = 3.3V, L= 2.2 µH)
20108441
20108442
Line Transient Response
VOUT = 1.5V (PWM Mode)
Line Transient Response
VOUT = 2.5V (PWM Mode)
20108450
20108412
11
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Load Transient Response
VOUT = 1.5V (PWM Mode)
Load Transient Response
VOUT = 2.5V (PWM Mode)
20108451
20108413
Load Transient Response (VOUT = 1.5V)
(PFM Mode 0.5mA to 50mA)
Load Transient Response (VOUT = 1.5V)
(PFM Mode 50mA to 0.5mA)
20108414
20108415
Load Transient Response (VOUT = 2.5V)
(PFM Mode 0.5mA to 50mA)
Load Transient Response (VOUT = 2.5V)
(PFM Mode 50mA to 0.5mA)
20108452
20108453
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Mode Change by Load Transients
VOUT = 1.5V (PFM to PWM)
Mode Change by Load Transients
VOUT = 1.5V (PWM to PFM)
20108420
20108421
Mode Change by Load Transients
VOUT = 2.5V (PFM to PWM)
Mode Change by Load Transients
VOUT = 2.5V (PWM to PFM)
20108454
20108455
Start Up into PWM Mode
VOUT = 1.5V (Output Current= 300mA)
Start Up into PWM Mode
VOUT = 2.5V (Output Current= 300mA)
20108456
20108424
13
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Start Up into PFM Mode
VOUT = 1.5V (Output Current= 1mA)
Start Up into PFM Mode
VOUT = 2.5V (Output Current= 1mA)
20108457
20108419
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can also turn off the switch in case the current limit of the
PFET is exceeded. Then the NFET switch is turned on and
the inductor current ramps down. The next cycle is initiated
by the clock turning off the NFET and turning on the PFET.
Operation Description
DEVICE INFORMATION
The LM3671, a high efficiency step down DC-DC switching
buck converter, delivers a constant voltage from a single Li-
Ion battery and input voltage rails from 2.7V to 5.5V to
portable devices such as cell phones and PDAs. Using a volt-
age mode architecture with synchronous rectification, the
LM3671 has the ability to deliver up to 600 mA depending on
the input voltage, output voltage, ambient temperature and
the inductor chosen.
There are three modes of operation depending on the current
required - PWM (Pulse Width Modulation), PFM (Pulse Fre-
quency Modulation), and shutdown. The device operates in
PWM mode at load current of approximately 80 mA or higher.
Lighter load current cause the device to automatically switch
into PFM for reduced current consumption (IQ = 16 µA typ)
and a longer battery life. Shutdown mode turns off the device,
offering
the
lowest
current
consumption
(ISHUTDOWN = 0.01 µA typ).
20108423
Additional features include soft-start, under voltage protec-
tion, current overload protection, and thermal shutdown pro-
tection. As shown in Figure 1, only three external power
components are required for implementation.
FIGURE 7. Typical PWM Operation
Internal Synchronous Rectification
The part uses an internal reference voltage of 0.5V. It is rec-
ommended to keep the part in shutdown until the input voltage
is 2.7V or higher.
While in PWM mode, the LM3671 uses an internal NFET as
a synchronous rectifier to reduce rectifier forward voltage
drop and associated power loss. Synchronous rectification
provides a significant improvement in efficiency whenever the
output voltage is relatively low compared to the voltage drop
across an ordinary rectifier diode.
CIRCUIT OPERATION
During the first portion of each switching cycle, the control
block in the LM3671 turns on the internal PFET switch. This
allows current to flow from the input through the inductor to
the output filter capacitor and load. The inductor limits the
current to a ramp with a slope of (VIN–VOUT)/L, by storing en-
ergy in a magnetic field.
Current Limiting
A current limit feature allows the LM3671 to protect itself and
external components during overload conditions. PWM mode
implements current limiting using an internal comparator that
trips at 1020 mA (typ.). If the output is shorted to ground the
device enters a timed current limit mode where the NFET is
turned on for a longer duration until the inductor current falls
below a low threshold. This allows the inductor current more
time to decay, thereby preventing runaway.
During the second portion of each cycle, the controller turns
the PFET switch off, blocking current flow from the input, and
then turns the NFET synchronous rectifier on. The inductor
draws current from ground through the NFET to the output
filter capacitor and load, which ramps the inductor current
down with a slope of - VOUT/L.
PFM OPERATION
The output filter stores charge when the inductor current is
high, and releases it when inductor current is low, smoothing
the voltage across the load.
At very light load, the converter enters PFM mode and oper-
ates with reduced switching frequency and supply current to
maintain high efficiency.
The output voltage is regulated by modulating the PFET
switch on time to control the average current sent to the load.
The effect is identical to sending a duty-cycle modulated rect-
angular wave formed by the switch and synchronous rectifier
at the SW pin to a low-pass filter formed by the inductor and
output filter capacitor. The output voltage is equal to the av-
erage voltage at the SW pin.
The part automatically transitions into PFM mode when either
of two conditions occurs for a duration of 32 or more clock
cycles:
A.ꢀThe NFET current reaches zero.
B.ꢀThe peak PMOS switch current drops below the IMODE
level, (Typically IMODE < 30mA + VIN/42 Ω ).
PWM OPERATION
During PWM operation the converter operates as a voltage-
mode controller with input voltage feed forward. This allows
the converter to achieve good load and line regulation. The
DC gain of the power stage is proportional to the input voltage.
To eliminate this dependence, feed forward inversely propor-
tional to the input voltage is introduced.
While in PWM mode, the output voltage is regulated by
switching at a constant frequency and then modulating the
energy per cycle to control power to the load. At the beginning
of each clock cycle the PFET switch is turned on and the in-
ductor current ramps up until the comparator trips and the
control logic turns off the switch. The current limit comparator
15
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is turned on. It remains on until the output voltage reaches the
‘high’ PFM threshold or the peak current exceeds the IPFM
level set for PFM mode. The typical peak current in PFM mode
is: IPFM = 112mA + VIN/27Ω .
Once the PMOS power switch is turned off, the NMOS power
switch is turned on until the inductor current ramps to zero.
When the NMOS zero-current condition is detected, the
NMOS power switch is turned off. If the output voltage is be-
low the ‘high’ PFM comparator threshold (see Figure 9), the
PMOS switch is again turned on and the cycle is repeated
until the output reaches the desired level. Once the output
reaches the ‘high’ PFM threshold, the NMOS switch is turned
on briefly to ramp the inductor current to zero and then both
output switches are turned off and the part enters an ex-
tremely low power mode. Quiescent supply current during this
‘sleep’ mode is 16µA (typ.), which allows the part to achieve
high efficiency under extremely light load conditions.
20108422
FIGURE 8. Typical PFM Operation
If the load current should increase during PFM mode (see
Figure 9) causing the output voltage to fall below the ‘low2’
PFM threshold, the part will automatically transition into fixed-
frequency PWM mode. When VIN =2.7V the part transitions
from PWM to PFM mode at ~35mA output current and from
PFM to PWM mode at ~85mA , when VIN=3.6V, PWM to PFM
transition happens at ~50mA and PFM to PWM transition
happens at ~100mA, when VIN =4.5V, PWM to PFM transition
happens at ~65mA and PFM to PWM transition happens at
~115mA.
During PFM operation, the converter positions the output volt-
age slightly higher than the nominal output voltage during
PWM operation, allowing additional headroom for voltage
drop during a load transient from light to heavy load. The PFM
comparators sense the output voltage via the feedback pin
and control the switching of the output FETs such that the
output voltage ramps between ~0.6% and ~1.7% above the
nominal PWM output voltage. If the output voltage is below
the ‘high’ PFM comparator threshold, the PMOS power switch
20108403
FIGURE 9. Operation in PFM Mode and Transfer to PWM Mode
SHUTDOWN MODE
SOFT START
Setting the EN input pin low (<0.4V) places the LM3671 in
shutdown mode. During shutdown the PFET switch, NFET
switch, reference, control and bias circuitry of the LM3671 are
turned off. Setting EN high (>1.0V) enables normal operation.
It is recommended to set EN pin low to turn off the LM3671
during system power up and undervoltage conditions when
the supply is less than 2.7V. Do not leave the EN pin floating.
The LM3671 has a soft-start circuit that limits in-rush current
during start-up. During start-up the switch current limit is in-
creased in steps. Soft start is activated only if EN goes from
logic low to logic high after Vin reaches 2.7V. Soft start is im-
plemented by increasing switch current limit in steps of 70mA,
140mA, 280mA and 1020mA (typical switch current limit). The
start-up time thereby depends on the output capacitor and
www.national.com
16
load current demanded at start-up. Typical start-up times with
a 10µF output capacitor and 300mA load is 400 µs and with
1mA load is 275µs.
•
•
•
•
VOUT: output voltage (volts)
VFB : feedback voltage = 0.5V
R1: feedback resistor from VOUT to FB
R2: feedback resistor from FB to GND
LDO - LOW DROP OUT OPERATION
For any output voltage greater than or equal to 1.1V, a zero
must be added around 45 kHz for stability. The formula for
calculation of C1 is:
The LM3671-ADJ can operate at 100% duty cycle (no switch-
ing; PMOS switch completely on) for low drop out support of
the output voltage. In this way the output voltage will be con-
trolled down to the lowest possible input voltage. When the
device operates near 100% duty cycle, output voltage ripple
is approximately 25 mV.
The minimum input voltage needed to support the output volt-
age is
For output voltages higher than 2.5V, a pole must be placed
at 45 kHz as well. If the pole and zero are at the same fre-
quency the formula for calculation of C2 is:
VIN, MIN = ILOAD * (RDSON, PFET + RINDUCTOR) + VOUT
ILOAD
Load current
•
•
RDSON, PFET
Drain to source resistance of PFET
switch in the triode region
Inductor resistance
RINDUCTOR
•
The formula for location of zero and pole frequency created
by adding C1 and C2 is given below. By adding C1, a zero as
well as a higher frequency pole is introduced.
Application Information
OUTPUT VOLTAGE SELECTION FOR LM3671-ADJ
The output voltage of the adjustable parts can be pro-
grammed through the resistor network connected from VOUT
to FB, then to GND. VOUT is adjusted to make the voltage at
FB equal to 0.5V. The resistor from FB to GND (R2) should
be 200 kΩ to keep the current drawn through this network well
below the 16 µA quiescent current level (PFM mode) but large
enough that it is not susceptible to noise. If R2 is 200 kΩ, and
VFB is 0.5V, the current through the resistor feedback network
will be 2.5 µA. The output voltage of the adjustable parts
ranges from 1.1V to 3.3V.
See the "LM3671-ADJ configurations for various VOUT" table.
The formula for output voltage selection is:
17
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LM3671-ADJ Configurations For Various VOUT (Circuit of Figure 2)
(Refer to Note 11 for VIN requirements)
VOUT(V)
0.90
1.1
C1 (pF)
C2 (pF)
none
none
none
none
none
none
none
none
none
none
33
L (µH)
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
CIN (µF)
4.7
COUT(µF)
10
R1(kΩ)
160
240
280
320
357
442
432
464
523
402
464
562
R2 (kΩ)
200
200
200
200
178
200
178
178
191
100
100
100
22
15
4.7
10
1.2
12
4.7
10
1.3
12
4.7
10
1.5
10
4.7
10
1.6
8.2
8.2
8.2
6.8
8.2
8.2
6.8
4.7
10
1.7
4.7
10
1.8
4.7
10
1.875
2.5
4.7
10
4.7
10
2.8
4.7
10
3.3
33
4.7
10
INDUCTOR SELECTION
A 2.2 µH inductor with a saturation current rating of at least
1150 mA is recommended for most applications.The
inductor’s resistance should be less than 0.3Ω for good effi-
ciency. Table 1 lists suggested inductors and suppliers. For
low-cost applications, an unshielded bobbin inductor could be
considered. For noise critical applications, a toroidal or shield-
ed-bobbin inductor should be used. A good practice is to lay
out the board with overlapping footprints of both types for de-
sign flexibility. This allows substitution of a low-noise shielded
inductor, in the event that noise from low-cost bobbin models
is unacceptable.
There are two main considerations when choosing an induc-
tor; the inductor should not saturate, and the inductor current
ripple should be small enough to achieve the desired output
voltage ripple. Different saturation current rating specifica-
tions are followed by different manufacturers so attention
must be given to details. Saturation current ratings are typi-
cally specified at 25°C. However, ratings at the maximum
ambient temperature of application should be requested from
the manufacturer. The minimum value of inductance to
guarantee good performance is 1.76µH at ILIM (typ.) dc
current over the ambient temperature range. Shielded in-
ductors radiate less noise and should be preferred.
INPUT CAPACITOR SELECTION
A ceramic input capacitor of 4.7 µF, 6.3V is sufficient for most
applications. Place the input capacitor as close as possible to
the VIN pin of the device. A larger value may be used for im-
proved input voltage filtering. Use X7R or X5R types; do not
use Y5V. DC bias characteristics of ceramic capacitors must
be considered when selecting case sizes like 0805 and 0603.
The minimum input capacitance to guarantee good per-
formance is 2.2µF at 3V dc bias; 1.5µF at 5V dc bias
including tolerances and over ambient temperature
range. The input filter capacitor supplies current to the PFET
switch of the LM3671 in the first half of each cycle and re-
duces voltage ripple imposed on the input power source. A
ceramic capacitor’s low ESR provides the best noise filtering
of the input voltage spikes due to this rapidly changing cur-
rent. Select a capacitor with sufficient ripple current rating.
The input current ripple can be calculated as:
There are two methods to choose the inductor saturation cur-
rent rating.
Method 1:
The saturation current should be greater than the sum of the
maximum load current and the worst case average to peak
inductor current. This can be written as
•
•
•
•
IRIPPLE: average to peak inductor current
IOUTMAX: maximum load current (600mA)
VIN: maximum input voltage in application
L : min inductor value including worst case tolerances
(30% drop can be considered for method 1)
•
•
f : minimum switching frequency (1.6Mhz)
VOUT: output voltage
Method 2:
A more conservative and recommended approach is to
choose an inductor that has a saturation current rating greater
than the maximum current limit of 1150mA.
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18
TABLE 1. Suggested Inductors and Their Suppliers
Model
Vendor
Coilcraft
Coilcraft
Panasonic
Sumida
Dimensions LxWxH(mm)
3.3 x 3.3 x 1.4
D.C.R (max)
200 mΩ
150 mΩ
53 mΩ
DO3314-222MX
LPO3310-222MX
ELL5GM2R2N
3.3 x 3.3 x 1.0
5.2 x 5.2 x 1.5
CDRH2D14NP-2R2NC
3.2 x 3.2 x 1.55
94 mΩ
OUTPUT CAPACITOR SELECTION
Voltage peak-to-peak ripple due to ESR can be expressed as
follow:
A ceramic output capacitor of 10 µF, 6.3V is sufficient for most
applications. Use X7R or X5R types; do not use Y5V. DC bias
characteristics of ceramic capacitors must be considered
when selecting case sizes like 0805 and 0603. DC bias char-
acteristics vary from manufacturer to manufacturer and dc
bias curves should be requested from them as part of the ca-
pacitor selection process.
VPP-ESR = (2 * IRIPPLE) * RESR
Because these two components are out of phase the rms (root
mean squared) value can be used to get an approximate val-
ue of peak-to-peak ripple.
The peak-to-peak ripple voltage, rms value can be expressed
as follow:
The minimum output capacitance to guarantee good per-
formance is 5.75µF at 1.8V dc bias including tolerances
and over ambient temperature range. The output filter ca-
pacitor smoothes out current flow from the inductor to the
load, helps maintain a steady output voltage during transient
load changes and reduces output voltage ripple. These ca-
pacitors must be selected with sufficient capacitance and
sufficiently low ESR to perform these functions.
Note that the output voltage ripple is dependent on the induc-
tor current ripple and the equivalent series resistance of the
output capacitor (RESR).
The RESR is frequency dependent (as well as temperature
dependent); make sure the value used for calculations is at
the switching frequency of the part.
The output voltage ripple is caused by the charging and dis-
charging of the output capacitor and by the RESR and can be
calculated as:
Voltage peak-to-peak ripple due to capacitance can be ex-
pressed as follow:
TABLE 2. Suggested Capacitors and Their Suppliers
Case Size
Inch (mm)
Model
4.7 µF for CIN
Type
Vendor
Voltage Rating
C2012X5R0J475K
JMK212BJ475K
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
TDK
Taiyo-Yuden
Murata
6.3V
6.3V
6.3V
6.3V
0805 (2012)
0805 (2012)
0805 (2012)
0603 (1608)
GRM21BR60J475K
C1608X5R0J475K
TDK
10 µF for COUT
GRM21BR60J106K
JMK212BJ106K
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Ceramic, X5R
Murata
Taiyo-Yuden
TDK
6.3V
6.3V
6.3V
6.3V
0805 (2012)
0805 (2012)
0805 (2012)
0603 (1608)
C2012X5R0J106K
C1608X5R0J106K
TDK
Micro SMD PACKAGE ASSEMBLY AND USE
of the board and interfering with mounting. See Application
Note 1112 for specific instructions how to do this. The 5-Bump
package used for LM3671 has 300 micron solder balls and
requires 10.82 mils pads for mounting on the circuit board.
The trace to each pad should enter the pad with a 90° entry
angle to prevent debris from being caught in deep corners.
Initially, the trace to each pad should be 7 mil wide, for a sec-
tion approximately 7 mil long or longer, as a thermal relief.
Then each trace should neck up or down to its optimal width.
The important criteria is symmetry. This ensures the solder
bumps on the LM3671 re-flow evenly and that the device sol-
ders level to the board. In particular, special attention must be
paid to the pads for bumps A1 and A3, because VIN and GND
Use of the Micro SMD package requires specialized board
layout, precision mounting and careful re-flow techniques, as
detailed in National Semiconductor Application Note 1112.
Refer to the section "Surface Mount Technology (SMD) As-
sembly Considerations". For best results in assembly, align-
ment ordinals on the PC board should be used to facilitate
placement of the device. The pad style used with Micro SMD
package must be the NSMD (non-solder mask defined) type.
This means that the solder-mask opening is larger than the
pad size. This prevents a lip that otherwise forms if the solder-
mask and pad overlap, from holding the device off the surface
19
www.national.com
are typically connected to large copper planes, inadequate
thermal relief can result in late or inadequate re-flow of these
bumps.
field reversal between the two half-cycles and reduces
radiated noise.
3. Connect the ground pins of the LM3671 and filter
capacitors together using generous component-side
copper fill as a pseudo-ground plane. Then, connect this
to the ground-plane (if one is used) with several vias. This
reduces ground-plane noise by preventing the switching
currents from circulating through the ground plane. It also
reduces ground bounce at the LM3671 by giving it a low-
impedance ground connection.
The Micro SMD package is optimized for the smallest possi-
ble size in applications with red or infrared opaque cases.
Because the Micro SMD package lacks the plastic encapsu-
lation characteristic of larger devices, it is vulnerable to light.
Backside metallization and/or epoxy coating, along with front-
side shading by the printed circuit board, reduce this sensi-
tivity. However, the package has exposed die edges. In
particular, Micro SMD devices are sensitive to light, in the red
and infrared range, shining on the package’s exposed die
edges.
4. Use wide traces between the power components and for
power connections to the DC-DC converter circuit. This
reduces voltage errors caused by resistive losses across
the traces.
BOARD LAYOUT CONSIDERATIONS
5. Route noise sensitive traces, such as the voltage
feedback path, away from noisy traces between the
power components. The voltage feedback trace must
remain close to the LM3671 circuit and should be direct
but should be routed opposite to noisy components. This
reduces EMI radiated onto the DC-DC converter’s own
voltage feedback trace. A good approach is to route the
feedback trace on another layer and to have a ground
plane between the top layer and layer on which the
feedback trace is routed. In the same manner for the
adjustable part it is desired to have the feedback dividers
on the bottom layer.
PC board layout is an important part of DC-DC converter de-
sign. Poor board layout can disrupt the performance of a DC-
DC converter and surrounding circuitry by contributing to EMI,
ground bounce, and resistive voltage loss in the traces. These
can send erroneous signals to the DC-DC converter IC, re-
sulting in poor regulation or instability.
Good layout for the LM3671 can be implemented by following
a few simple design rules below. Refer to Figure 9 for top layer
board layout.
1. Place the LM3671, inductor and filter capacitors close
together and make the traces short. The traces between
these components carry relatively high switching
6. Place noise sensitive circuitry, such as radio IF blocks,
away from the DC-DC converter, CMOS digital blocks
and other noisy circuitry. Interference with noise-
sensitive circuitry in the system can be reduced through
distance.
currents and act as antennas. Following this rule reduces
radiated noise. Special care must be given to place the
input filter capacitor very close to the VIN and GND pin.
2. Arrange the components so that the switching current
loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor
through the LM3671 and inductor to the output filter
capacitor and back through ground, forming a current
loop. In the second half of each cycle, current is pulled
up from ground through the LM3671 by the inductor to
the output filter capacitor and then back through ground
forming a second current loop. Routing these loops so
the current curls in the same direction prevents magnetic
In mobile phones, for example, a common practice is to place
the DC-DC converter on one corner of the board, arrange the
CMOS digital circuitry around it (since this also generates
noise), and then place sensitive preamplifiers and IF stages
on the diagonally opposing corner. Often, the sensitive cir-
cuitry is shielded with a metal pan and power to it is post-
regulated to reduce conducted noise, using low-dropout
linear regulators.
20108449
FIGURE 10. Top layer board layout for SOT23-5
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20
21
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Physical Dimensions inches (millimeters) unless otherwise noted
5-Lead SOT23-5 Package
NS Package Number MF05A
5-Bump (Large) Micro SMD Package, 0.5mm Pitch
NS Package Number TLA05CBA
The dimensions for X1, X2, and X3 are as given:
X1 = 1.057 mm +/- 0.030mm
X2 = 1.387 mm +/- 0.030mm
X3 = 0.600 mm +/- 0.075mm
www.national.com
22
6-Pin LLP Package, 0.5mm Pitch
NS Package Number LCA06B
The dimensions for X1, X2, and X3 are as given:
X1 = 2.000 mm +/- 0.100mm
X2 = 2.000 mm +/- 0.100mm
X3 = 0.600 mm +/- 0.075mm
23
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Notes
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相关型号：
LM3671MFX-ADJ/NOPB
IC 1.15 A SWITCHING REGULATOR, 2600 kHz SWITCHING FREQ-MAX, PDSO5, 2.92 X 2.84 MM, 1.20 MM HEIGHT, LEAD FREE, SOT-23, 5 PIN, Switching Regulator or Controller
NSC
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