LM3702XABPX-23
更新时间:2024-09-18 07:08:26
品牌:NSC
描述:Microprocessor Supervisory Circuits with Low Line Output and Manual Reset
LM3702XABPX-23 概述
Microprocessor Supervisory Circuits with Low Line Output and Manual Reset 微处理器监控电路与低压线路输出和手动复位
LM3702XABPX-23 数据手册
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PDF下载September 2003
LM3702/LM3703
Microprocessor Supervisory Circuits with Low Line
Output and Manual Reset
n No external components required
n Manual-Reset input
The LM3702/LM3703 series of microprocessor supervisory
n RESET (LM3702) or RESET (LM3703) outputs
General Description
circuits provide the maximum flexibility for monitoring power
supplies and battery controlled functions in systems without
backup batteries. The LM3702/LM3703 series are available
in a 9-bump micro SMD package.
n Precision supply voltage monitor
n Factory programmable Reset Timeout Delay
n Available in micro SMD package for minimum footprint
n
n
0.5% Reset threshold accuracy at room temperature
2% Reset threshold accuracy over temperature
extremes
Built-in features include the following:
Reset: Reset is asserted during power-up, power-down, and
brownout conditions. RESET is guaranteed down to VCC of
1.0V.
n Reset assertion down to 1V VCC (RESET option only)
n 28 µA VCC supply current
Manual Reset Input: An input that asserts reset when pulled
low.
Applications
Low Line Output: This early power failure warning indicator
goes low when the supply voltage drops to a value which is
2% higher than the reset threshold voltage.
n Embedded Controllers and Processors
n Intelligent Instruments
n Automotive Systems
Features
n Critical µP Power Monitoring
n Standard Reset Threshold voltage: 3.08V
n Custom Reset Threshold voltages: For other voltages
between 2.2V and 5.0V in 10mV increments, contact
National Semiconductor Corp.
Typical Application
20011503
© 2003 National Semiconductor Corporation
DS200115
www.national.com
Connection Diagram
Top View
(looking from the coating side)
micro SMD 9 Bump Package
BPA09
20011501
Pin Descriptions
Bump No.
Name
Function
A1
MR
Manual-Reset input. When MR is less than VMRT (Manual Reset Threshold)
RESET/RESET is engaged.
B1
C1
VCC
Power Supply input.
RESET
Reset Logic Output. Pulses low for tRP (Reset Timeout Period) when triggered, and stays
low whenever VCC is below the reset threshold or when MR is below VMRT. It remains low
for tRP after either VCC rises above the reset threshold, or after MR input rises above
VMRT (LM3702 only).
RESET
LLO
Reset Logic Output. RESET is the inverse of RESET (LM3703 only).
Low-Line Logic Output. Early Power-Fail warning output. Low when VCC falls below VLLOT
(Low-Line Output Threshold). This output can be used to generate an NMI (Non-Maskable
Interrupt) to provide an early warning of imminent power-failure.
Ground reference for all signals.
C3
B3
A2, A3, C2
B2
GND
NC
No Connect.
NC
No Connect. Test input used at factory only. Leave floating.
www.national.com
2
Block Diagram
20011505
3
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Ordering Information
20011504
*For other voltages between 2.2V and 5.0V, please contact National Semiconductor sales office.
LM3702/LM3703
Reset
Timeout
Period
200ms
200ms
200ms
200ms
1600ms
1600ms
1.4ms
Package
Marking
Part Number
Output
LM3702XCBP-308
LM3702XCBPX-308
LM3703XCBP-308
LM3703XCBPX-308
LM3703XDBP-308
LM3703XDBPX-308
LM3702YABP-308
LM3702ABPX-308
LM3702YDBP-220
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
totem-pole
open-drain
open-drain
open-drain
open-drain
%%I2
%%I2
%%I3
%%I3
%%124
%%124
%%131
%%131
%%125
%%125
1.4ms
1600ms
1600ms
LM3702YDBPX-220
%% is the datecode and will vary with time.
Table Of Functions
Part
Number
Active
Low
Reset
x
Active
High
Reset
Output
(X = totem-pole)
(Y = open-drain)
Reset
Timeout
Period
Manual
Reset
Low
Line
Output
LM3702
LM3703
X, Y*
X
Customized
Customized
x
x
x
x
x
* = available upon request. Contact National
www.national.com
4
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Power Dissipation
(Note 3)
Operating Ratings (Note 1)
Temperature Range
−40˚C ≤ TJ ≤ 85˚C
Supply Voltage (VCC
)
−0.3V to 6.0V
All Other Inputs
−0.3V to VCC + 0.3V
ESD Ratings (Note 2)
Human Body Model
Machine Model
1.5kV
150V
LM3702/LM3703 Series Electrical Characteristics
Limits in the standard typeface are for TJ = 25˚C and limits in boldface type apply over full operating range. Unless otherwise
specified: VCC = +2.2V to 5.5V.
Symbol
POWER SUPPLY
VCC Operating Voltage
Parameter
Conditions
Min
Typ
Max
Units
LM3702
LM3703
1.0
1.2
5.5
5.5
50
V
Range: VCC
ICC
VCC Supply
Current
All inputs = VCC; all outputs floating
28
µA
RESET THRESHOLD
VRST
Reset Threshold
VCC falling
−0.5
−2
+0.5
+2
VRST
%
VCC falling: TA = 0˚C to 70˚C
−1.5
+1.5
VRSTH
tRP
Reset Threshold
Hysteresis
0.0032•VRST
mV
Reset Timeout
Period
Reset Timeout Period = A
Reset Timeout Period = B
Reset Timeout Period = C
Reset Timeout Period = D
VCC falling at 1mV/µs
1
20
140
1120
1.4
28
2
40
280
2240
ms
µs
200
1600
20
tRD
VCC to Reset
Delay
RESET (LM3703)
VOL RESET
>
VCC 2.25V, ISINK = 900µA
0.3
0.3
0.4
>
VCC 2.7V, ISINK = 1.2mA
V
>
VCC 4.5V, ISINK = 3.2mA
>
VOH
RESET
VCC 1.2V, ISOURCE = 50µA
0.8 VCC
0.8 VCC
>
VCC 1.8V, ISOURCE = 150µA
>
VCC 2.25V, ISOURCE = 300µA
0.8 VCC
V
>
VCC 2.7V, ISOURCE = 500µA
0.8 VCC
>
VCC 4.5V, ISOURCE = 800µA
VCC − 1.5V
ILKG
Output Leakage
Current
VRESET = 5.5V
1.0
µA
RESET (LM3702)
VOL RESET
>
VCC 1.0V, ISINK = 50µA
0.3
0.3
0.3
0.3
0.4
>
VCC 1.2V, ISINK = 100µA
>
VCC 2.25V, ISINK = 900µA
>
VCC 2.7V, ISINK = 1.2mA
V
>
VCC 4.5V, ISINK = 3.2mA
>
VOH
RESET
VCC 2.25V, ISOURCE = 300µA
0.8 VCC
0.8 VCC
>
VCC 2.7V, ISOURCE = 500µA
>
VCC 4.5V, ISOURCE = 800µA
VCC − 1.5V
5
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LM3702/LM3703 Series Electrical Characteristics (Continued)
Limits in the standard typeface are for TJ = 25˚C and limits in boldface type apply over full operating range. Unless otherwise
specified: VCC = +2.2V to 5.5V.
Symbol
MR
Parameter
Conditions
Min
2.0
35
Typ
Max
0.8
Units
VMRT
VMRTH
RMR
tMD
MR Input
MR, Low
MR, High
V
Threshold
MR Threshold
Hysteresis
MR falling: VCC = VRST MAX to 5.5V
0.0032•VRST
mV
MR Pull-up
Resistance
MR to Reset
Delay
56
12
75
kΩ
µS
µS
tMR
MR Pulse Width
25
LLO
VOL
>
LLO Output
Voltage
VCC 2.25V, ISINK = 900µA
0.3
0.3
0.4
>
VCC 2.7V, ISINK = 1.2mA
>
VCC 4.5V, ISINK = 3.2mA
V
V
>
VOH
VCC 2.25V, ISOURCE = 300µA
0.8 VCC
0.8 VCC
>
VCC 2.7V, ISOURCE = 500µA
>
VCC 4.5V, ISOURCE = 800µA
VCC − 1.5V
LLO OUTPUT
VLLOT
LLO Output
1.01•VRST
1.02•VRST
1.03•VRST
Threshold
(VLLO − VRST, VCC
falling)
VLLOTH
Low-Line
0.0032•VRST
mV
µs
Comparator
Hysteresis
tCD
Low-Line
VCC falling at 1mV/µs
20
Comparator Delay
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device
is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the
listed conditions.
Note 2: The Human Body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin.
Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, T (MAX), the junction-to-ambient thermal resistance, θ
,
J-A
J
and the ambient temperature, T . The maximum allowable power dissipation at any ambient temperture is calculated using:
A
Where the value of θ
for the micro SMD package is 220˚C/W.
J-A
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6
Typical Performance Characteristics
Supply Current vs Supply Voltage
3.3V Supply Current vs Temperature
20011511
20011515
Normalized Reset Threshold Voltage vs Temperature
Reset Timeout Period vs VCC
20011512
20011532
Max. Transient Duration vs Reset Comparator Overdrive
(VCC = 3.3V)
Reset Timeout Period vs Temperature
20011510
20011516
7
www.national.com
Typical Performance Characteristics (Continued)
Low-Line Comparator Propagation Delay vs Temperature
20011514
www.national.com
8
timeout period expires after MR rises above VMRT. Use MR
with digital logic to assert or to daisy chain supervisory
circuits. It may be used as another low-line comparator by
adding a buffer.
Circuit Information
RESET OUTPUT
The Reset input of a µP initializes the device into a known
state. The LM3702/LM3703 microprocessor supervisory cir-
cuits assert a forced reset output to prevent code execution
errors during power-up, power-down, and brownout condi-
tions.
LOW-LINE OUTPUT (LLO)
The low-line output comparator is typically used to provide a
non-maskable interrupt to a µP when VCC begins falling. LLO
monitors VCC and goes low when VCC falls below VLLOT
>
RESET is guaranteed valid for VCC
1V. Once VCC ex-
(typically 1.02 • VRST) with hysteresis of 0.0032 • VRST
.
ceeds the reset threshold, an internal timer maintains the
output for the reset timeout period. After this interval, reset
goes high. The LM3702 offers an active-low RESET; The
LM3703 offers an active-high RESET.
SPECIAL PRECAUTIONS FOR THE MICRO SMD
PACKAGE
As with most integrated circuits, the LM3702 and LM3703
are sensitive to exposure from visible and infrared (IR) light
radiation. Unlike a plastic encapsulated IC, the micro SMD
package has very limited shielding from light, and some
sensitivity to light reflected from the surface of the PC board
or long wavelength IR entering the die from the side may be
experienced. This light could have an unpredictable affect on
the electrical performance of the IC. Care should be taken to
shield the device from direct exposure to bright visible or IR
light during operation.
Any time VCC drops below the reset threshold (such as
during a brownout), the reset activates. When VCC again
rises above the reset threshold, the internal timer starts.
Reset holds until VCC exceeds the reset threshold for longer
than the reset timeout period. After this time, reset releases.
The Manual Reset input (MR) will initiate a forced reset also.
See the Manual Reset Input section.
RESET THRESHOLD
The LM3702/LM3703 family is available with a reset voltage
of 3.08V. Other reset thresholds in the 2.20V to 5.0V range,
in steps of 10 mV, are available; contact National Semicon-
ductor for details.
MICRO SMD MOUNTING
The micro SMD package requires specific mounting tech-
niques which are detailed in National Semiconductor Appli-
cation Note AN-1112. Referring to the section Surface
Mount Technology (SMT) Assembly Considerations, it
should be noted that the pad style which must be used with
the 9-pin package is the NSMD (non-solder mask defined)
type.
MANUAL RESET INPUT (MR)
Many µP-based products require a manual reset capability,
allowing the operator to initiate a reset. The MR input is fully
debounced and provides an internal 56 kΩ pull-up. When the
MR input is pulled below VMRT (1.225V) for more than 25 µs,
reset is asserted after a typical delay of 12 µs. Reset remains
active as long as MR is held low, and releases after the reset
For best results during assembly, alignment ordinals on the
PC board may be used to facilitate placement of the micro
SMD device.
9
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Timing Diagrams
20011528
FIGURE 1. LM3702 Reset Time with MR
20011529
FIGURE 2. LLO Output
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10
Typical Application Circuits
20011524
FIGURE 3. LM3703 Power-On Delay
11
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Typical Application Circuits (Continued)
20011522
FIGURE 4. Regulator/Switch with Long-Term Overvoltage Lockout Prevents Overdissipation in Linear Regulator
20011531
FIGURE 5. Switch Debouncer
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12
Physical Dimensions inches (millimeters)
unless otherwise noted
NOTES: UNLESS OTHERWISE SPECIFIED
1. EPOXY COATING
2. 63Sn/37Pb EUTECTIC BUMP
3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD.
4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTER
CLOCKWISE.
5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS
PACKAGE HEIGHT.
6.NO JEDEC REGISTRATION AS OF AUG.1999.
9 bump micro SMD Package
NS Package Number BPA09FFB
The dimensions of X1, X2 and X3 are given below
X1 = 1.412mm
X2 = 1.412mm
X3 = 0.850mm
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
National Semiconductor
Americas Customer
Support Center
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Fax: +49 (0) 180-530 85 86
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Support Center
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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