LM4867LQ [NSC]
Output-Transient-Free Dual 2.1W Audio Amplifier Plus No Coupling Capacitor Stereo Headphone Function; 输出瞬态免费双2.1W音频放大器加上无耦合电容器立体声耳机功能
| 型号： | LM4867LQ |
| 厂家： | 
National Semiconductor |
| 描述： | Output-Transient-Free Dual 2.1W Audio Amplifier Plus No Coupling Capacitor Stereo Headphone Function |
| 文件： | 总26页 (文件大小：765K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 2001
LM4867
Output-Transient-Free Dual 2.1W Audio Amplifier Plus
No Coupling Capacitor Stereo Headphone Function
General Description
Key Specifications
n PO at 1% THD+N
The LM4867 is a dual bridge-connected audio power ampli-
fier which, when connected to a 5V supply, will deliver 2.1W
to a 4Ω load (Note 1) or 2.4W to a 3Ω load (Note 2) with less
than 1.0% THD+N. The LM4867 uses advanced, latest gen-
eration circuitry to eliminate all traces of clicks and pops
when the supply voltage is first applied. The amplifier has a
headphone-amplifier-select input pin. It is used to switch the
amplifiers from bridge to single-ended mode for driving
headphones. A new circuit topology eliminates headphone
output coupling capacitors. A MUX control pin allows selec-
tion between the two sets of stereo input signals. The MUX
control can also be used to select between two different
customer-specified closed-loop responses.
n
n
n
n
LM4867LQ, 3Ω load
LM4867LQ, 4Ω load
LM4867MTE, 4Ω
LM4867MT, 8Ω
2.4W (typ)
2.1W (typ)
1.9W (typ)
1.1W (typ)
n Single-ended mode - THD+N at 75mW into 32Ω
(max)
n Shutdown current
0.5%
0.7µA (typ)
Features
n Advanced “click and pop” suppression circuitry
n Eliminates headphone amplifier output coupling
capacitors
n Stereo headphone amplifier mode
n Input mux control and two separate inputs per channel
n Thermal shutdown protection circuitry
n LLP, TSSOP, and exposed-DAP TSSOP packaging
available
Boomer audio power amplifiers are designed specifically to
provide high quality output power from a surface mount
package and require few external components. To simplify
audio system design, the LM4867 combines dual bridge
speaker amplifiers and stereo headphone amplifiers in one
package.
The LM4867 features an externally controlled power-saving
micropower shutdown mode, a stereo headphone amplifier
mode, and thermal shutdown protection.
Note 1: An LM4867LQ or LM4867MTE that has been properly mounted to
a circuit board will deliver 2.1W into 4Ω. The Mux control can also be used to
select two different closed-loop responses. LM4867MT will deliver 1.1W into
8Ω. See the Application Information sections for further information concern-
ing the LM4867LQ and the LM4867MT.
Applications
n Multimedia monitors
n Portable and desktop computers
n Portable audio systems
Note 2: An LM4867LQ or LM4867MTE that has been properly mounted to a
circuit board and forced-air cooled will deliver 2.4W into 3Ω.
Typical Application
DS200013-31
*
Refer to the Application Information section titled PROPER SELECTION OF EXTERNAL COMPONENTS for details concerning the value of C .
B
FIGURE 1. Typical Audio Amplifier Application Circuit
(Pin out shown for the 24-pin Exposed-DAP LLP package. Numbers in ( ) are for the 20-pin MTE and MT
packages.)
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2001 National Semiconductor Corporation
DS200013
www.national.com
Connection Diagram
DS200013-58
Top View
Order Number LM4867MT, LM4867MTE
See NS Package Number MTC20 for TSSOP
See NS Package Number MXA20A for Exposed-DAP TSSOP
Connection Diagram
DS200013-38
Top View
Order Number LM4867LQ
See NS Package Number LQA24A for Exposed-DAP LLP
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2
Absolute Maximum Ratings (Note 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Thermal Resistance
θJC (typ)—MTC20
θJA (typ)—MTC20
θJC (typ)—MXA20A
θJA (typ)—MXA20A
θJA (typ)—MXA20A
θJA (typ)—MXA20A
θJC (typ)—LQA24A
θJA (typ)—LQA24A
θJA (typ)—LQA24A
θJA (typ)—LQA24A
20˚C/W
80˚C/W
2˚C/W
41˚C/W (Note 7)
51˚C/W (Note 8)
90˚C/W (Note 9)
3.0˚C/W
Supply Voltage
6.0V
−65˚C to +150˚C
−0.3V to VDD +0.3V
Internally limited
Storage Temperature
Input Voltage
Power Dissipation (Note 4)
ESD Susceptibility (Note 5)
TBD˚C/W (Note 10)
TBD˚C/W (Note 11)
TBD˚C/W (Note 12)
All pins except Pin 3 (MT, MTE), Pin 2 (LQ)
Pin 3 (MT, MTE), Pin 2 (LQ)
ESD Susceptibility (Note 6)
Junction Temperature
2000V
8000V
200V
Operating Ratings
150˚C
Solder Information
Temperature Range
TMIN ≤ TA ≤ TMAX
Supply Voltage
Small Outline Package
−40˚C ≤ TA ≤ 85˚C
2.0V ≤ VDD ≤ 5.5V
Vapor Phase (60 sec.)
215˚C
220˚C
Infrared (15 sec.)
See AN-450 “Surface Mounting and their Effects on
Product Reliablilty” for other methods of soldering surface
mount devices.
Electrical Characteristics for Entire IC (Notes 3, 13)
The following specifications apply for VDD= 5V unless otherwise noted. Limits apply for TA= 25˚C.
Symbol
Parameter
Conditions
LM4867
Typical Limit
Units
(Limits)
(Note 14) (Note 15)
VDD
IDD
ISD
Supply Voltage
2
V (min)
V (max)
5.5
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, IO = 0A (Note 16) , HP-IN = 0V
VIN = 0V, IO = 0A (Note 16) , HP-IN = 4V
VDD applied to the SHUTDOWN pin
7.5
3.0
0.7
15
6
mA (max)
mA (max)
µA (max)
2
Electrical Characteristics for Bridged-Mode Operation (Notes 3, 13)
The following specifications apply for VDD= 5V unless otherwise specified. Limits apply for TA= 25˚C.
Symbol
Parameter
Conditions
LM4867
Typical Limit
(Note 14) (Note 15)
Units
(Limits)
VOS
PO
Output Offset Voltage
VIN = 0V
5
50
mV (max)
Output Power (Note 17)
THD = 1%, f = 1kHz
LM4867MTE, RL = 3Ω (Note 18)
LM4867LQ, RL = 3Ω (Note 18)
LM4867MTE, RL = 4Ω (Note 19)
LM4867LQ, RL = 4Ω (Note 19)
LM4867, RL = 8Ω
2.2
2.2
1.9
1.9
1.1
W
W
W
W
1.0
W (min)
THD+N = 10%, f = 1kHz
LM4867MTE, RL = 3Ω (Note 18)
LM4867LQ, RL = 3Ω (Note 18)
LM4867MTE, RL = 4Ω (Note 19)
LM4867LQ, RL = 4Ω (Note 19)
LM4867, RL = 8Ω
3.0
3.0
W
W
W
W
W
W
2.6
2.6
1.5
THD+N = 1%, f = 1 kHz, RL = 32Ω
0.34
3
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Electrical Characteristics for Bridged-Mode Operation (Notes 3, 13) (Continued)
The following specifications apply for VDD= 5V unless otherwise specified. Limits apply for TA= 25˚C.
Symbol
Parameter
Conditions
LM4867
Typical Limit
Units
(Limits)
(Note 14) (Note 15)
THD+N Total Harmonic Distortion+Noise 20Hz ≤ f ≤ 20kHz, AVD = 2
LM4867MTE, RL = 4Ω, PO = 2W
0.3
0.3
0.3
%
%
%
LM4867LQ, RL = 4Ω, PO = 2W
LM4867, RL = 8Ω, PO = 1W
PSRR
Power Supply Rejection Ratio
VDD = 5V, VRIPPLE = 200 mVRMS, RL = 8Ω,
67
dB
CB = 2.2µF
XTALK
SNR
Channel Separation
f = 1 kHz, CB = 2.2µF
80
97
dB
dB
Signal To Noise Ratio
VDD = 5V, PO = 1.1W, RL = 8Ω
Electrical Characteristics for Single-Ended Operation (Notes 3, 13)
The following specifications apply for VDD= 5V unless otherwise specified. Limits apply for TA= 25˚C.
Symbol
Parameter
Conditions
LM4867
Units
(Limits)
Typical
Limit
(Note 15)
50
(Note 14)
VOS
PO
Output Offset Voltage
Output Power
VIN = 0V
5
mV (max)
mW (min)
mW
THD = 0.5%, f = 1kHz, RL = 32Ω
85
75
THD+N = 1%, f = 1kHz, RL = 8Ω (Note
180
20)
THD+N = 1%, f = 1kHz, RL = 16Ω
THD+N = 10%, f = 1kHz, RL = 32Ω
THD+N = 10%, f = 1kHz, RL = 16Ω
THD+N = 10%, f = 1kHz, RL = 32Ω
165
88
208
114
mW
mW
mW
mW
VOUT
Output Voltage Swing
THD = 0.05%, RL = 5kΩ
1
VP-P
%
THD+N
Total Harmonic Distortion+Noise
AV = −1, PO = 75mW, 20 Hz ≤ f ≤ 20kHz,
RL = 32Ω
0.2
PSRR
Power Supply Rejection Ratio
CB = 2.2µF, VRIPPLE = 200mVRMS
f = 1kHz
,
52
dB
XTALK
SNR
Channel Separation
f = 1kHz, CB = 2.2µF
60
94
dB
dB
Signal To Noise Ratio
VDD = 5V, PO = 340mW, RL = 8Ω
Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device operates within the Operating Ratings. Specifications are not guaranteed for parameters where
no limit is given. The typical value however, is a good indication of device performance.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
, θ , and the ambient temperature T . The maximum
JA A
JMAX
allowable power dissipation is P
= (T
− T )/θ . For the LM4867, T
= 150˚C. For the θ s for different packages, please see the Application
DMAX
JMAX
A
JA
JMAX
JA
Information section or the Absolute Maximum Ratings section.
Note 5: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 6: Machine model, 220 pF–240 pF discharged through all pins.
2
Note 7: The given θ is for an LM4867 packaged in an MXA20A with the Exposed-DAP soldered to an exposed 2in area of 1oz printed circuit board copper.
JA
2
Note 8: The given θ is for an LM4867 packaged in an MXA20A with the Exposed-DAP soldered to an exposed 1in area of 1oz printed circuit board copper.
JA
Note 9: The given θ is for an LM4867 packaged in an MXA20A with the Exposed-DAP not soldered to printed circuit board copper.
JA
2
Note 10: The given θ is for an LM4867 packaged in an LQA24A with the Exposed-DAP soldered to an exposed 2in area of 1oz printed circuit board copper.
JA
2
Note 11: The given θ is for an LM4867 packaged in an LQA24A with the Exposed-DAP soldered to an exposed 1in area of 1oz printed circuit board copper.
JA
Note 12: The given θ is for an LM4867 packaged in an LQA24A with the Exposed-DAP not soldered to printed circuit board copper.
JA
Note 13: All voltages are measured with respect to the ground (GND) pins, unless otherwise specified.
Note 14: Typicals are measured at 25˚C and represent the parametric norm.
Note 15: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are guaranteed by design, test, or
statistical analysis.
Note 16: The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier.
Note 17: Output power is measured at the device terminals.
Note 18: When driving 3Ω loads from a 5V supply, the LM4867LQ, LM4867MTE, or LM4867MTE-1 must be mounted to the circuit board and forced-air cooled (450
linear-feet per minute).
Note 19: When driving 4Ω loads from a 5V supply, the LM4867LQ, LM4867MTE or LM4867MTE-1 must be mounted to the circuit board.
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4
Electrical Characteristics for Single-Ended Operation (Notes 3, 13) (Continued)
Note 20: See Application Information section ’Single-Ended Output Power Performance and Measurement Considerations’ for more information.
Typical Performance Characteristics
MTE- and LQ- Specific Characteristics
LM4867MTE
THD+N vs Output Power
LM4867MTE
THD+N vs Frequency
LM4867LQ
THD+N vs Output Power
DS200013-34
DS200013-33
DS200013-53
LM4867LQ
THD+N vs Frequency
LM4867MTE
THD+N vs Output Power
LM4867LQ
THD+N vs Output Power
DS200013-36
DS200013-54
DS200013-55
LM4867LQ, LM4867MTE
Power Dissipation vs Power Output
LM4867LQ, LM4867MTE(Note 21)
Power Derating Curve
DS200013-61
DS200013-59
Note 21: This curve shows the LM4867MTE’s thermal dissipation ability at different ambient temperatures given these conditions:
500LFPM + JEDEC board: The part is soldered to a 1S2P 20-lead exposed-DAP TSSOP test board with 500 linear feet per minute of forced-air flow across
it. Board information - copper dimensions: 74x74mm, copper coverage: 100% (buried layer) and 12% (top/bottom layers), 16 vias under the exposed-DAP.
2
2
500LFPM + 2.5in : The part is soldered to a 2.5in , 1 oz. copper plane with 500 linear feet per minute of forced-air flow across it.
2
2
2.5in : The part is soldered to a 2.5in , 1oz. copper plane.
Not Attached: The part is not soldered down and is not forced-air cooled.
5
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Typical Performance Characteristics
THD+N vs Frequency
THD+N vs Frequency
THD+N vs Frequency
DS200013-3
DS200013-4
DS200013-5
THD+N vs Output Power
THD+N vs Output Power
THD+N vs Output Power
DS200013-6
DS200013-7
DS200013-63
DS200013-62
DS200013-8
THD+N vs Output Power
THD+N vs Frequency
THD+N vs Output Power
DS200013-65
DS200013-66
THD+N vs Frequency
Output Power vs
Load Resistance
Power Dissipation vs
Supply Voltage
DS200013-64
DS200013-60
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6
Typical Performance Characteristics (Continued)
Output Power vs
Supply Voltage
Output Power vs
Supply Voltage
Output Power vs
Supply Voltage
DS200013-9
DS200013-10
DS200013-11
DS200013-14
DS200013-17
Output Power vs
Load Resistance
Output Power vs
Load Resistance
Power Dissipation vs
Output Power
DS200013-12
DS200013-13
Dropout Voltage vs
Supply Voltage
Power Derating Curve
Power Dissipation vs
Output Power
DS200013-15
DS200013-16
7
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Typical Performance Characteristics (Continued)
Noise Floor
Channel Separation
Channel Separation
DS200013-19
DS200013-20
DS200013-18
Power Supply
Rejection Ratio
Open Loop
Frequency Response
Supply Current vs
Supply Voltage
DS200013-23
DS200013-21
DS200013-22
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8
External Components Description
( Refer to Figure 1. )
Components
Functional Description
1.
Ri
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a
high pass filter with C at fc = 1/(2πRiCi).
i
2.
Ci
Input coupling capacitor which blocks the DC voltage at the amplifier’s input terminals. Also creates a
highpass filter with Ri at fc = 1/(2πRiCi). Refer to the section, Proper Selection of External Components,
for an explanation of how to determine the value of Ci.
3.
4.
Rf
Feedback resistance which sets the closed-loop gain in conjunction with Ri.
Cs
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing
section for information concerning proper placement and selection of the supply bypass capacitor.
5.
CB
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of
External Components, for information concerning proper placement and selection of CB.
Application Information
ELIMINATING OUTPUT COUPLING CAPACITORS
Typical single-supply audio amplifiers that can switch be-
tween driving bridge-tied-load (BTL) speakers and
single-ended (SE) headphones use a coupling capacitor on
each SE output. This capacitor blocks the half-supply volt-
age to which the output amplifiers are typically biased and
couples the audio signal to the headphones. The signal
return to circuit ground is through the headphone jack’s
sleeve.
Figure 2 shows the LM4867’s lack of transients in the differ-
ential signal (Trace B) across a BTL 8Ω load. The LM4867’s
active-high SHUTDOWN pin is driven by the logic signal
shown in Trace A. Trace C is the VOUT- output signal and
trace D is the VOUT+ output signal. The shutdown signal
frequency is 1Hz with a 50% duty cycle. Figure 3 is gener-
ated with the same conditions except that the output drives a
32Ω single-ended (SE) load. Again, no trace of output tran-
sients is seen.
The LM4867 eliminates these coupling capacitors. Amp2A is
internally configured to apply VDD/2 to a stereo headphone
jack’s sleeve. This voltage matches the quiescent voltage
present on the Amp1A and Amp1B outputs that drive the
headphones. The headphones operate in a manner very
similar to a bridge-tied-load (BTL). The same DC voltage is
applied to both headphone speaker terminals. This results in
no net DC current flow through the speaker. AC current flows
through a headphone speaker as an audio signal’s output
amplitude increases on the speaker’s terminal.
USING THE LM4867 TO UPGRADE LM4863 AND LM4873
DESIGNS
The
LM4867’s
noise-free
operation
plus
coupling-capacitorless headphone operation and functional
compatibility with the LM4873 and the LM4863 simplifies
upgrading systems using these parts. Upgrading older de-
signs that use either the LM4863 or the LM4873 is easy.
Simply remove and short the coupling capacitors located
between the LM4873’s or LM4863’s Amp1A and Amp1B
outputs and the headphone connections. Also remove the
1kΩ resistor between each headphone connection and
ground. Finally, remove any resistors connected to the
HP-IN pin (typically two 100kΩ resistors). Connect the HP-IN
pin directly to the headphone jack control pin as shown in
Figure 4.
When operating as a headphone amplifier, the headphone
jack sleeve is not connected to circuit ground. Using the
headphone output jack as a line-level output will place the
LM4867’s one-half supply voltage on a plug’s sleeve con-
nection. Driving
a
portable notebook computer or
audio-visual display equipment is possible. This presents no
difficulty when the external equipment uses capacitively
coupled inputs. For the very small minority of equipment that
is DC-coupled, the LM4867 monitors the current supplied by
the amplifier that drives the headphone jack’s sleeve. If this
current exceeds 500mAPK, the amplifier is shutdown, pro-
tecting the LM4867 and the external equipment. For more
information, see the section titled ’Single-Ended Output
Power Performance and Measurement Considerations’.
OUTPUT TRANSIENT (’POPS AND CLICKS’)
ELIMINATED
The LM4867 contains advanced circuitry that eliminates out-
put transients (’pop and click’). This circuitry prevents all
traces of transients when the supply voltage is first applied,
when the part resumes operation after shutdown, or when
switching between BTL speakers and SE headphones. Two
circuits combine to eliminate pop and click. One circuit
mutes the output when switching between speaker loads.
Another circuit monitors the input signal. It maintains the
muted condition until there is sufficient input signal magni-
tude to mask any remaining transient that may occur.
DS200013-56
FIGURE 2. Differential output signal (Trace B) is devoid
of transients. The SHUTDOWN pin is driven by a
shutdown signal (Trace A). The inverting output (Trace
C) and the non-inverting output (Trace D) are applied
across an 8Ω BTL load.
9
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Application Information (Continued)
The LM4867’s pin configuration simplifies the process of
upgrading systems that use the LM4863. Except for its four
MUX function pins, the LM4867’s pin configuration matches
the LM4863’s pin configuration. If the LM4867’s MUX func-
tionality is not needed when replacing an LM4863, connect
the MUX CTRL pin to either VDD or ground. To ensure
correct amplifier operation, unused MUX inputs must be
tied to GND. As shown in Table 1, grounding the MUX CTRL
pin selects stereo input 1 (−IN A1 and −IN B1), whereas
applying VDD to the MUX CTRL pin selects stereo input 2
(−IN A2 and −IN B2).
The LM4867’s unique headphone sense circuit requires a
dual switch headphone jack. Replace the four-terminal head-
phone jack used with the LM4863 and LM4873 with the
five-terminal headphone jack, such as the Switchcraft
35RAPC4BH3, shown in Figure 4. Connect the +OUT A
(Amp2A) pin to the five-terminal headphone jack’s sleeve
pin.
DS200013-57
FIGURE 3. Single-ended output signal (Trace B) is
devoid of transients. The SHUTDOWN pin is driven by
a shutdown signal (Trace A). The inverting output
(Trace C) and the VBYPASS output (Trace D) are applied
across a 32Ω BTL load.
DS200013-31
FIGURE 4. Typical Audio Amplifier Application Circuit
(Pin out shown for the 24-pin Exposed-DAP LLP package. Numbers in ( ) are for the 20-pin MTE and MT packages.)
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10
decreases. This can be used to compensate a small,
full-range speaker’s low frequency response roll-off. Network
2 sets the gain for an alternate load such as headphones.
The circuit in Figure 6 uses Network 1 when driving external
speakers, switching to Network 2 when headphones are
connected. The normally closed control switch in Figure 6’s
headphone jack connects to the MUX CTRL pin. When
headphones are connected, the LM4867’s internal pull-up
that applies VDD to the HP-IN and the external 100kΩ resis-
tor applies VDD to MUX CTRL pin. Simultaneously applying
these control voltages automatically selects the amplifier
(headphone or bridge) and switches the gain (MUX channel
selection). Alternatively, leaving the MUX CTRL pin indepen-
dently accessible allows a user to select bass boost as
needed. This alternative user-selectable bass-boost scheme
requires connecting equal ratio resistor feedback networks
to each MUX input channel. The value of the resistor in the
RC network is chosen to give a gain that is necessary to
achieve the desired bass-boost.
Application Information (Continued)
DS200013-70
FIGURE 5. Input MUX Example
Switching between the MUX channels may change the input
signal source or the feedback resistor network. During the
channel switching transition, the average voltage level
present on the internal amplifier’s input may change. This
change can slew at a rate that may produce audible voltage
transients or clicks in the amplifier’s output signal. Using the
MUX to select between two vastly dissimilar gains is a typical
transient-producing situation. As the MUX is switched, an
audible click may occur as the gain suddenly changes.
STEREO-INPUT MULTIPLEXER (STEREO MUX)
The LM4867 has two stereo inputs. The MUX CTRL Pin
controls which stereo input is active. As shown in the Truth
Table for Logic Inputs, applying 0V to the MUX CTRL input
activates stereo input 1, whereas applying VDD to the MUX
CTRL inputs activates stereo input 2. To ensure correct
amplifier operation, unused MUX inputs must be tied to
GND.
PIN OUT COMPATIBILITY WITH THE LM4863
Typical LM4867 applications use the MUX to switch between
two stereo input signals. Each stereo channel’s gain can be
tailored to produce the required output signal level by choos-
ing the appropriate input and feedback resistor ratio.
The LM4867 pin out was designed to simplify replacing the
LM4863: except for the four Pins(-IN A2, MUX CTRL, -IN B2,
and NC) that implement the LM4867’s extra functionality, the
LM4867MT/MTE and LM4863MT/MTE pin outs match.
(Note 22)
Note 22: If the LM4867 replaces an LM4863 and the input MUX circuitry is
not being used, the LM4867 MUX CTRL pin must be tied to V or GND and
DD
the unused MUX inputs must be connected to GND.
Another configuration uses the MUX to select two different
gains or frequency compensated gains that amplify a single
pair of stereo input signals. Figure 5 shows two different
feedback networks, Network 1 and Network 2. Network 1
produces increasing gain as the input signal’s frequency
DS200013-39
FIGURE 6. As configured, connecting headphones to this jack automatically selects the stereo headphone amplifier
and, with the additional NC switch, changes MUX channels (Network 2 in Figure 2 )
EXPOSED-DAP MOUNTING CONSIDERATIONS
power amplifier that produces 2.4W dissipation in a 4Ω load
at ≤ 1% THD+N and over 3W in a 3Ω load at 10% THD+N.
This high power is achieved through careful consideration of
necessary thermal design. Failing to optimize thermal design
may compromise the LM4867’s high power performance and
activate unwanted, though necessary, thermal shutdown
protection.
The LM4867’s exposed-DAP (die attach paddle) packages
(MTE and LQ) provide a low thermal resistance between the
die and the PCB to which the part is mounted and soldered.
This allows rapid heat transfer from the die to the surround-
ing PCB copper area heatsink, copper traces, ground plane,
and finally, surrounding air. The result is a low voltage audio
11
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BRIDGE CONFIGURATION EXPLANATION
Application Information (Continued)
As shown in Figure 4, the LM4867 consists of two pairs of
operational amplifiers, forming a two-channel (channel A and
channel B) stereo amplifier. (Though the following discusses
channel A, it applies equally to channel B.) External resistors
Rf and Ri set the closed-loop gain of Amp1A, whereas two
internal 20kΩ resistors set Amp2A’s gain at -1. The LM4867
drives a load, such as a speaker, connected between the two
amplifier outputs, -OUTA and +OUTA.
The MTE and LQ packages must have their DAPs soldered
to a copper pad on the PCB. The DAP’s PCB copper pad is
then, ideally, connected to a large plane of continuous un-
broken copper. This plane forms a thermal mass, heat sink,
and radiation area. Place the heat sink area on either outside
plane in the case of a two-sided or multi-layer PCB. (The
heat sink area can also be placed on an inner layer of a
multi-layer board. The thermal resistance, however, will be
higher.) Connect the DAP copper pad to the inner layer or
backside copper heat sink area with 32 (4 X 8) (MTE) or 6 (3
X 2) (LQ) vias. The via diameter should be 0.012in - 0.013in
with a 1.27mm pitch. Ensure efficient thermal conductivity by
plugging and tenting the vias with plating and solder mask,
respectively.
Figure 4 shows that Amp1A’s output serves as Amp2A’s
input. This results in both amplifiers producing signals iden-
tical in magnitude, but 180˚ out of phase. Taking advantage
of this phase difference, a load is placed between -OUTA
and +OUTA and driven differentially (’commonly referred to
as bridge mode’). This results in a differential gain of
Best thermal performance is achieved with the largest prac-
tical copper heat sink area. If the heatsink and amplifier
share the same PCB layer, a nominal 2.5in2 (min) area is
necessary for 5V operation with a 4Ω load. Heatsink areas
not placed on the same PCB layer as the LM4867 should be
5in2 (min) for the same supply voltage and load resistance.
The last two area recommendations apply for 25˚C ambient
temperature. Increase the area to compensate for ambient
temperatures above 25˚C. In systems using cooling fans, the
LM4867MTE can take advantage of forced air cooling. With
an air flow rate of 450 linear-feet per minute and a 2.5in2
exposed copper or 5.0in2 inner layer copper plane heatsink,
the LM4867MTE can continuously drive a 3Ω load to full
power. The LM4867LQ achieves the same output power
level without forced-air cooling. In all circumstances and
under all conditions, the junction temperature must be held
below 150˚C to prevent activating the LM4867’s thermal
shutdown protection. The LM4867’s power de-rating curve in
the Typical Performance Characteristics shows the maxi-
mum power dissipation versus temperature. Example PCB
layouts for the exposed-DAP TSSOP and LQ packages are
shown in the Demonstration Board Layout section. Further
detailed and specific information concerning PCB layout and
fabrication and mounting an LQ (LLP) is found in National
Semiconductor’s AN1187.
*
AVD = 2 (Rf/R )
(1)
i
Bridge mode amplifiers are different from single-ended am-
plifiers that drive loads connected between a single amplifi-
er’s output and ground. For a given supply voltage, bridge
mode has a distinct advantage over the single-ended con-
figuration: its differential output doubles the voltage swing
across the load. This produces four times the output power
when compared to a single-ended amplifier under the same
conditions. This increase in attainable output power as-
sumes that the amplifier is not current limited or that the
output signal is not clipped. To ensure minimum output sig-
nal clipping when choosing an amplifier’s closed-loop gain,
refer to the Audio Power Amplifier Design section.
A bridge amplifier design has a few distinct advantages over
the single-ended configuration, as it provides differential
drive to the load, thus doubling the output swing for a speci-
fied supply voltage. Four times the output power is possible
as compared to a single-ended amplifier under the same
conditions. This increase in attainable output power as-
sumes that the amplifier is not current limited or clipped. In
order to choose an amplifier’s closed-loop gain without caus-
ing excessive clipping, please refer to the Audio Power
Amplifier Design section.
Another advantage of the differential bridge output is no net
DC voltage across the load. This is accomplished by biasing
channel A’s and channel B’s outputs at half-supply. This
eliminates the coupling capacitor that single supply,
single-ended amplifiers require. Eliminating an output cou-
pling capacitor in a single-ended configuration forces a
single-supply amplifier’s half-supply bias voltage across the
load. This increases internal IC power dissipation and may
permanently damage loads such as speakers.
PCB LAYOUT AND SUPPLY REGULATION
CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω LOADS
Power dissipated by a load is a function of the voltage swing
across the load and the load’s impedance. As load imped-
ance decreases, load dissipation becomes increasingly de-
pendent on the interconnect (PCB trace and wire) resistance
between the amplifier output pins and the load’s connec-
tions. Residual trace resistance causes a voltage drop,
which results in power dissipated in the trace and not in the
load as desired. For example, 0.1Ω trace resistance reduces
the output power dissipated by a 4Ω load from 2.1W to 2.0W.
The problem of decreased load dissipation is exacerbated
as load impedance decreases. Therefore, to maintain the
highest load dissipation and widest output voltage swing,
PCB traces that connect the output pins to a load must be as
wide as possible.
POWER DISSIPATION
Power dissipation is a major concern when designing a
successful single-ended or bridged amplifier. Equation (2)
states the maximum power dissipation point for
a
single-ended amplifier operating at a given supply voltage
and driving a specified output load.
Poor power supply regulation adversely affects maximum
output power. A poorly regulated supply’s output voltage
decreases with increasing load current. Reduced supply
voltage causes decreased headroom, output signal clipping,
and reduced output power. Even with tightly regulated sup-
plies, trace resistance creates the same effects as poor
supply regulation. Therefore, making the power supply
traces as wide as possible helps maintain full output voltage
swing.
PDMAX = (VDD)2/(2π2RL): Single-Ended
(2)
However, a direct consequence of the increased power de-
livered to the load by a bridge amplifier is higher internal
power dissipation for the same conditions.
The LM4867 has two operational amplifiers per channel. The
maximum internal power dissipation per channel operating in
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12
junction−to−case thermal impedance, θCS is the
case−to−sink thermal impedance, and θSA is the
sink−to−ambient thermal impedance.) Refer to the Typical
Performance Characteristics curves for power dissipation
information at lower output power levels.
Application Information (Continued)
the bridge mode is four times that of a single-ended ampli-
fier. From Equation (3), assuming a 5V power supply and an
4Ω load, the maximum single channel power dissipation is
1.27W or 2.54W for stereo operation.
POWER SUPPLY BYPASSING
PDMAX = 4 (VDD)2/(2π2RL): Bridge Mode (3)
As with any power amplifier, proper supply bypassing is
critical for low noise performance and high power supply
rejection. Applications that employ a 5V regulator typically
use a 10µF in parallel with a 0.1µF filter capacitors to stabi-
lize the regulator’s output, reduce noise on the supply line,
and improve the supply’s transient response. However, their
presence does not eliminate the need for a local 1.0µF
tantalum bypass capacitance connected between the
LM4867’s supply pins and ground. Do not substitute a ce-
ramic capacitor for the tantalum. Doing so may cause oscil-
lation. Keep the length of leads and traces that connect
capacitors between the LM4867’s power supply pin and
ground as short as possible. Connecting a 1µF capacitor,
CB, between the BYPASS pin and ground improves the
internal bias voltage’s stability and improves the amplifier’s
PSRR. The PSRR improvements increase as the bypass pin
capacitor value increases. Too large, however, increases
turn−on time and can compromise the amplifier’s click and
pop performance. The selection of bypass capacitor values,
especially CB, depends on desired PSRR requirements,
click and pop performance (as explained in the section,
Proper Selection of External Components), system cost,
and size constraints.
*
The LM4867’s power dissipation is twice that given by Equa-
tion (2) or Equation (3) when operating in the single-ended
mode or bridge mode, respectively. Twice the maximum
power dissipation point given by Equation (3) must not ex-
ceed the power dissipation given by Equation (4):
P
DMAX’ = (TJMAX − TA)/θJA
(4)
The LM4867’s TJMAX = 150˚C. In the LQ package soldered
to a DAP pad that expands to a copper area of 5in2 on a
PCB, the LM4867’s θJA is 20˚C/W. In the MTE package
soldered to a DAP pad that expands to a copper area of 2in2
on a PCB, the LM4867’s θJA is 41˚C/W. At any given ambient
temperature TA, use Equation (4) to find the maximum inter-
nal power dissipation supported by the IC packaging. Rear-
ranging Equation (4) and substituting PDMAX for PDMAX’ re-
sults in Equation (5). This equation gives the maximum
ambient temperature that still allows maximum stereo power
dissipation without violating the LM4867’s maximum junction
temperature.
MICRO−POWER SHUTDOWN
TA = TJMAX − 2 X PDMAX θJA
(5)
The voltage applied to the SHUTDOWN pin controls the
LM4867’s shutdown function. Activate micro−power shut-
down by applying VDD to the SHUTDOWN pin. When active,
the LM4867’s micro−power shutdown feature turns off the
amplifier’s bias circuitry, reducing the supply current. The
logic threshold is typically VDD/2. The low 0.7µA typical
shutdown current is achieved by applying a voltage that is as
near as VDD as possible to the SHUTDOWN pin. A voltage
that is less than VDD may increase the shutdown current.
Table 1 shows the logic signal levels that activate and deac-
tivate micro−power shutdown and headphone amplifier op-
eration. To ensure that the output signal remains
transient−free, do not cycle the shutdown function
faster than 1Hz.
For a typical application with a 5V power supply and an 4Ω
load, the maximum ambient temperature that allows maxi-
mum stereo power dissipation without exceeding the maxi-
mum junction temperature is approximately 99˚C for the LQ
package and 45˚C for the MTE package.
TJMAX = PDMAX θJA + TA
(6)
Equation (6) gives the maximum junction temperature
JMAX. If the result violates the LM4867’s 150˚C, reduce the
maximum junction temperature by reducing the power sup-
ply voltage or increasing the load resistance. Further allow-
ance should be made for increased ambient temperatures.
T
There are a few ways to control the micro−power shutdown.
These include using a single−pole, single, throw switch, a
microprocessor, or a microcontroller. When using a switch,
connect an external 100kΩ pull−up resistor between the
SHUTDOWN pin and VDD. Connect the switch between the
SHUTDOWN pin and ground. Select normal amplifier opera-
tion by closing the switch. Opening the switch connects the
SHUTDOWN pin to VDD through the pull−up resistor, acti-
vating micro−power shutdown. The switch and resistor guar-
antee that the SHUTDOWN pin will not float. This prevents
unwanted state changes. In a system with a microprocessor
or a microcontroller, use a digital output to apply the control
voltage to the SHUTDOWN pin. Driving the SHUTDOWN pin
with active circuitry eliminates the pull up resistor.
The above examples assume that a device is a surface
mount part operating around the maximum power dissipation
point. Since internal power dissipation is a function of output
power, higher ambient temperatures are allowed as output
power or duty cycle decreases.
If the result of Equation (2) is greater than that of Equation
(3), then decrease the supply voltage, increase the load
impedance, or reduce the ambient temperature. If these
measures are insufficient, a heat sink can be added to
reduce θJA. The heat sink can be created using additional
copper area around the package, with connections to the
ground pin(s), supply pin and amplifier output pins. External,
solder attached SMT heatsinks such as the Thermalloy
7106D can also improve power dissipation. When adding a
heat sink, the θJA is the sum of θJC, θCS, and θSA. (θJC is the
13
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Application Information (Continued)
Truth Table for Logic Inputs
SHUTDOWN
PIN
HP-IN
PIN
MUX CHANNEL
INPUT SELECT
Logic Low
Logic High
Logic Low
Logic High
X
OPERATIONAL MODE (MUX
INPUTCHANNEL #)
Logic Low
Logic Low
Logic Low
Logic Low
Logic High
= −OUTB signal
= −OUTB signal
Bridged amplifiers (1)
Bridged amplifiers (2)
≠
≠
−OUTB signal
−OUTB signal
X
Single-ended amplifiers (1)
Single-ended amplifiers (2)
Micro−power shutdown
headphones. When a switch shorts the HP−IN pin to GND,
the LM4867 operates in bridge mode. If headphone drive is
not needed, short the HP−IN pin to the −OUTB pin.
HP-IN FUNCTION
Single-Ended Output Power Performance and
Measurement Considerations
An internal pull−up circuit is connected to the HP−IN (pin 20)
headphone amplifier control pin. When this pin is left uncon-
nected, VDD is applied to the HP−IN. This turns off Amp2B
and switches Amp2A’s input signal from an audio signal to
the VDD/2 voltage present on pin 14. The result is muted
bridge-connected loads. Quiescent current consumption is
reduced when the IC is in this single−ended mode.
The LM4867 delivers clean, low distortion SE output power
into loads that are greater than 10Ω. As an example, output
power for 16Ω and 32Ω loads are shown in the Typical
Performance Characteristic curves. For loads less than
10Ω, the LM4876 can typically supply 180mW of low distor-
tion power. However, when higher dissipation is desired in
loads less than 10Ω, a dramatic increase in THD+N may
occur. This is normal operation and does not indicate that
proper functionality has ceased. When a jump from moder-
ate to excessively high distortion is seen, simply reducing
the output voltage swing will restore the clean, low distortion
SE operation.
Figure 7 shows the implementation of the LM4867’s head-
phone control function. An internal comparator with a nomi-
nal 400mV offset monitors the signal present at the −OUTB
output. It compares this signal against the signal applied to
the HP−IN pin. When these signals are equal, as is the case
when a BTL is connected to the amplifier, the comparator
forces the LM4867 to maintain bridged−amplifier operation.
When the HP−IN pin is externally floated, such as when
headphones are connected to the jack shown in Figure 7,
and internal pull−up forces VDD on the internal comparator’s
HP−IN inputs. This changes the comparator’s output state
and enables the headphone function: it turns off Amp2B,
switches Amp2A’s input signal from an audio signal to the
The dramatic jump in distortion for loads less than 10Ω
occurs when current limiting circuitry activates. During SE
operation, AMP2A (refer to Figure 4) drives the headphone
sleeve. An on-board circuit monitors this amplifier’s output
current. The sudden increase in THD+N is caused by the
current limit circuitry forcing AMP2A into a high−impedance
output mode. When this occurs, the output waveform has
discontinuities that produce large amounts of distortion. It
has been observed that as the output power is steadily
increased, the distortion may jump from 5% to greater than
35%. Indeed, 10% THD+N may not actually be achievable.
VDD/2 voltage present on pin 14, and mutes the
bridge-connected loads. Amp1A and Amp1B drive the head-
phones.
Figure 7 also shows the suggested headphone jack electri-
cal connections. The jack is designed to mate with a
three−wire plug. The plug’s tip and ring should each carry
one of the two stereo output signals, whereas the sleeve
provides the return to Amp2A. A headphone jack with one
control pin contact is sufficient to drive the HP−IN pin when
connecting headphones.
Using the Single−Ended Output for Line Level
Applications
Some samples of the LM4867 may exhibit small amplitude,
high frequency oscillation when the SE output is connected
to a line-level input. This oscillation can be eliminated by
connecting a 5%, 300Ω resistor between Amp2A’s output pin
and each amplifier, AMP1A and AMP1B, output.
A switch can replace the headphone jack contact pin. When
a switch shorts the HP−IN pin to VDD, bridge−connected
speakers are muted and Amp1A and Amp2A drive a pair of
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14
Application Information (Continued)
DS200013-24
FIGURE 7. Headphone Circuit
(Pin numbers in ( ) are for the 20-pin MTE and MT packages.)
Input Capacitor Value Selection
sary for the desired bandwidth helps minimize clicks and
pops. CB’s value should be in the range of 5 times to 7 times
the value of Ci. This ensures that output transients are
eliminated when power is first applied or the LM4867 re-
sumes operation after shutdown.
Amplifying the lowest audio frequencies requires high value
input coupling capacitor (Ci in Figure 4). A high value capaci-
tor can be expensive and may compromise space efficiency
in portable designs. In many cases, however, the speakers
used in portable systems, whether internal or external, have
little ability to reproduce signals below 150Hz. Applications
using speakers with this limited frequency response reap
little improvement by using large input capacitor.
OPTIMIZING CLICK AND POP REDUCTION
PERFORMANCE
The LM4867 contains circuitry that eliminates turn-on and
shutdown transients (“clicks and pops“) and transients that
could occur when switching between BTL speakers and
single-ended headphones. For this discussion, turn-on re-
fers to either applying the power supply voltage or when the
shutdown mode is deactivated. While the power supply is
ramping to its final value, the LM4867’s internal amplifiers
are configured as unity gain buffers and are disconnected
from the -OUT and +OUT pins. An internal current source
changes the voltage of the BYPASS pin in a controlled,
linear manner. Ideally, the input and outputs track the voltage
applied to the BYPASS pin. The gain of the internal amplifi-
ers remains unity until the voltage on the bypass pin reaches
1/2 VDD. As soon as the voltage on the bypass pin is stable,
the device becomes fully operational and the amplifier out-
puts are reconnected to the -OUT and +OUT pins. Although
the BYPASS pin current cannot be modified, changing the
size of CB alters the device’s turn-on time. There is a linear
relationship between the size of CB and the turn-on time.
Here are some typical turn-on times for various values of CB:
Besides effecting system cost and size, Ci has an affect on
the LM4867’s click and pop performance. When the supply
voltage is first applied, a transient (pop) is created as the
charge on the input capacitor changes from zero to a quies-
cent state. The magnitude of the pop is directly proportional
to the input capacitor’s size. Higher value capacitors need
more time to reach a quiescent DC voltage (usually VDD/2)
when charged with a fixed current. The amplifier’s output
charges the input capacitor through the feedback resistor,
Rf. Thus, pops can be minimized by selecting an input
capacitor value that is no higher than necessary to meet the
desired −3dB frequency and is between 0.14CB and 0.20CB.
A shown in Figure 4, the input resistor (RI) and the input
capacitor, CI produce a −3dB high pass filter cutoff frequency
that is found using Equation (7).
f−3dB = 1/(2πRINCI)
(7)
As an example when using a speaker with a low frequency
limit of 150Hz, Ci, using Equation (4) is 0.063µF. The 1.0µF
Ci shown in Figure 4 allows the LM4867 to drive high effi-
ciency, full range speaker whose response extends below
30Hz.
CB
TON
3ms
0.01µF
0.1µF
0.22µF
0.47µF
1.0µF
2.2µF
30ms
63ms
Bypass Capacitor Value Selection
134ms
300ms
630ms
Besides minimizing the input capacitor size, careful consid-
eration should be paid to value of CB, the capacitor con-
nected to the BYPASS pin. Since CB determines how fast
the LM4867 settles to quiescent operation, its value is critical
when minimizing turn-on pops. The slower the LM4867’s
outputs ramp to their quiescent DC voltage (nominally 1/2
In order eliminate “clicks and pops“, all capacitors must be
discharged before turn-on. Rapidly switching VDD may not
allow the capacitors to fully discharge, which may cause
“clicks and pops“.
VDD), the smaller the turn-on pop. Choosing CB equal to
1.0µF along with a small value of Ci (in the range of 0.1µF to
0.39µF), produces a click-less and pop-less shutdown func-
tion. As discussed above, choosing Ci no larger than neces-
15
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Application Information (Continued)
Rf/Ri = AVD/2
(11)
NO LOAD STABILITY
The LM4867 may exhibit low level oscillation when the load
resistance is greater than 10kΩ. This oscillation only occurs
as the output signal swings near the supply voltages. Pre-
vent this oscillation by connecting a 5kΩ between the output
pins and ground.
The value of Rf is 30kΩ.
The last step in this design example is setting the amplifier’s
−3dB frequency bandwidth. To achieve the desired 0.25dB
±
pass band magnitude variation limit, the low frequency re-
sponse must extend to at least one-fifth the lower bandwidth
limit and the high frequency response must extend to at least
five times the upper bandwidth limit. The gain variation for
AUDIO POWER AMPLIFIER DESIGN
Audio Amplifier Design: Driving 1W into an 8Ω Load
±
both response limits is 0.17dB, well within the 0.25dB
desired limit. The results are an
The following are the desired operational parameters:
Power Output:
Load Impedance:
Input Level:
1 WRMS
8Ω
fL = 100Hz/5 = 20Hz
(12)
1 VRMS
20 kΩ
and an
Input Impedance:
Bandwidth:
±
100 Hz−20 kHz 0.25 dB
fH = 20kHz x 5 = 100kHz
(13)
The design begins by specifying the minimum supply voltage
necessary to obtain the specified output power. One way to
find the minimum supply voltage is to use the Output Power
vs Supply Voltage curve in the Typical Performance Char-
acteristics section. Another way, using Equation (8), is to
calculate the peak output voltage necessary to achieve the
desired output power for a given load impedance. To ac-
count for the amplifier’s dropout voltage, two additional volt-
ages, based on the Dropout Voltage vs Supply Voltage in the
Typical Performance Characteristics curves, must be
added to the result obtained by Equation (8). The result is
Equation (9).
As mentioned in the Selecting Proper External Compo-
nents section, Ri and Ci create a highpass filter that sets the
amplifier’s lower bandpass frequency limit. Find the coupling
capacitor’s value using Equation (12).
Ci≥ 1/(2πR ifL)
(14)
The result is
*
*
1/(2π 20kΩ 20Hz) = 0.397µF
(15)
Use a 0.39µF capacitor, the closest standard value.
(8)
The product of the desired high frequency cutoff (100kHz in
this example) and the differential gain AVD, determines the
VDD ≥ (VOUTPEAK+ (VOD
+ VODBOT))
(9)
TOP
upper passband response limit. With AVD = 3 and fH
=
100kHz, the closed-loop gain bandwidth product (GBWP) is
300kHz. This is less than the LM4867’s 3.5MHz GBWP. With
this margin, the amplifier can be used in designs that require
more differential gain while avoiding performance,restricting
bandwidth limitations.
The Output Power vs Supply Voltage graph for an 8Ω load
indicates a minimum supply voltage of 4.6V. This is easily
met by the commonly used 5V supply voltage. The additional
voltage creates the benefit of headroom, allowing the
LM4867 to produce peak output power in excess of 1W
without clipping or other audible distortion. The choice of
supply voltage must also not create a situation that violates
of maximum power dissipation as explained above in the
Power Dissipation section.
RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT
Figures 8 through 12 show the recommended four-layer PC
board layout that is optimized for the 24-pin LQ-packaged
LM4867 and associated external components. Figures 13
through 17 show the recommended two-layer PC board
layout that is optimized for the 24-pin MTE-packaged
LM4867 and associated external components. Figures 18
through 20 show the recommended two-layer PC board
layout that is optimized for the 20-pin MT-packaged LM4867
and associated external components. These circuits are de-
signed for use with an external 5V supply and 4Ω speakers.
After satisfying the LM4867’s power dissipation require-
ments, the minimum differential gain needed to achieve 1W
dissipation in an 8Ω load is found using Equation (10).
(10)
These circuit boards are easy to use. Apply 5V and ground to
the board’s VDD and GND pads, respectively. Connect 4Ω
speakers between the board’s −OUTA and +OUTA and
OUTB and +OUTB pads.
Thus, a minimum gain of 2.83 allows the LM4867’s to reach
full output swing and maintain low noise and THD+N perfor-
mance. For this example, let AVD = 3.
The amplifier’s overall gain is set using the input (Ri) and
feedback (Ri) resistors. With the desired input impedance
set at 20kΩ, the feedback resistor is found using Equation
(11).
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16
Application Information (Continued)
DS200013-40
Figure 8. Recommended LQ PC Board Layout:
Component-Side Silkscreen
DS200013-41
Figure 9. Recommended LQ PC Board Layout:
Component-Side Layout
17
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Application Information (Continued)
DS200013-42
Figure 10. Recommended LQ PC Board Layout:
Upper Inner-Layer Layout
DS200013-43
Figure 11. Recommended LQ PC Board Layout:
Lower Inner-Layer Layout
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18
Application Information (Continued)
DS200013-44
Figure 12. Recommended LQ PC Board Layout:
Bottom-Side Layout
DS200013-45
Figure 13. Recommended MTE PC Board Layout:
Component-Side Silkscreen
19
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Application Information (Continued)
DS200013-46
Figure 14. Recommended MTE PC Board Layout:
Component-Side Layout
DS200013-47
Figure 15. Recommended MTE PC Board Layout:
Upper Inner-Layer Layout
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20
Application Information (Continued)
DS200013-48
Figure 16. Recommended MTE PC Board Layout:
Lower Inner-Layer Layout
DS200013-49
Figure 17. Recommended MTE PC Board Layout:
Bottom-Side Layout
21
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Application Information (Continued)
DS200013-50
Figure 18. Recommended MT PC Board Layout:
Component-Side Silkscreen
DS200013-51
Figure 19. Recommended MT PC Board Layout:
Component-Side Layout
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22
Application Information (Continued)
DS200013-52
Figure 20. Recommended MT PC Board Layout:
Bottom-Side Layout
23
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Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead MOLDED PKG, Leadless Leadframe Package LLP
Order Number LM4867LQ
NS Package Number LQA24A
20-Lead MOLDED PKG, TSSOP, JEDEC, 4.4mm BODY WIDTH
Order Number LM4867MT
NS Package Number MTC20
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24
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead MOLDED TSSOP, EXPOSED PAD, 6.5x4.4x0.9mm
Order Number LM4867MTE
NS Package Number MXA20A
25
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Notes
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
National Semiconductor
Europe
National Semiconductor
Asia Pacific Customer
Response Group
Tel: 65-2544466
Fax: 65-2504466
National Semiconductor
Japan Ltd.
Tel: 81-3-5639-7560
Fax: 81-3-5639-7507
Fax: +49 (0) 180-530 85 86
Email: europe.support@nsc.com
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English Tel: +44 (0) 870 24 0 2171
Français Tel: +33 (0) 1 41 91 8790
Email: ap.support@nsc.com
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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NSC
LM4867MTE/NOPB
3W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO20, 6.50 X 4.40 MM, 0.90 MM HEIGHT, EXPOSED PAD, TSSOP-20
TI
LM4867MTEX/NOPB
3W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO20, 6.50 X 4.40 MM, 0.90 MM HEIGHT, EXPOSED PAD, PLASTIC, TSSOP-20
ROCHESTER
LM4867MTEX/NOPB
3W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO20, 6.50 X 4.40 MM, 0.90 MM HEIGHT, EXPOSED PAD, PLASTIC, TSSOP-20
TI
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