LM4883SQ [NSC]
Dual 2.1W Audio Amplifier Plus Stereo Headphone; 双2.1W音频放大器加上立体声耳机
| 型号： | LM4883SQ |
| 厂家： | 
National Semiconductor |
| 描述： | Dual 2.1W Audio Amplifier Plus Stereo Headphone |
| 文件： | 总23页 (文件大小：1239K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 2004
LM4883
Dual 2.1W Audio Amplifier Plus Stereo Headphone
Function
General Description
Key Specifications
The LM4883 is a dual bridge-connected audio power ampli-
fier which, when connected to a 5V supply, will deliver 2.1W
to a 4Ω load (Note 1) or 2.4W to a 3Ω load (Note 2) with less
than 1.0% THD+N. In addition, the headphone input pin
allows the amplifiers to operate in single-ended mode when
driving stereo headphones. A MUX control pin allows selec-
tion between the two stereo sets of amplifier inputs. The
MUX control can also be used to select two different closed-
loop responses.
j
PO at 1% THD+N
RL = 3Ω
2.4W (typ)
2.1W (typ)
1.3W (typ)
0.01% (typ)
RL = 4Ω
RL = 8Ω
j
Single-ended mode THD+N
at 75mW into 32Ω (5V, 1kHz)
Shutdown current
Supply voltage range
PSRR at 217Hz
j
j
j
0.04µA (typ)
2.4V to 5.5V
85dB (typ)
Boomer audio power amplifiers were designed specifically to
provide high quality output power from a surface mount
package while requiring few external components. To sim-
plify audio system design, the LM4883SQ combines dual
bridge speaker amplifiers and stereo headphone amplifiers
on one chip.
Features
n Input mux control and two separate inputs per channel
n Stereo headphone amplifier mode
The LM4883SQ features an internally controlled, low-power
consumption shutdown mode, a stereo headphone amplifier
mode, and thermal shutdown protection. It also utilizes cir-
cuitry to reduce “clicks and pops” during device turn-on.
Note 1: An LM4883SQ that has been properly mounted to a circuit board
will deliver 2.1W into 4Ω. See the Application Information sections for further
information concerning the LM4883SQ.
n Improved “click and pop” suppression circuitry
n Thermal shutdown protection circuitry
n PCB area-saving SQ package
Applications
Note 2: An LM4883SQ that has been properly mounted to a circuit board
and forced-air cooled will deliver 2.4W into 3Ω.
n Multimedia monitors
n Portable and desktop computers
n Portable audio systems
Connection Diagrams
LM4883SQ
LM4883SQ Top Mark
200887C6
Top View
U = Fab Code
Z = Assembly Plant Code
XY = Date Code
TT = Die Traceability
200887A3
Top View
Order Number LM4883SQ
See NS Package Number SQA24B
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation
DS200887
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Typical Application
200887A1
FIGURE 1. Typical Audio Amplifier Application Circuit
External Components Description
(Refer to Figure 1)
Components
Functional Description
1.
2.
R1, 4, 5, 6
The inverting input resistance R1, along with R3, set the closed-loop gain. R1, along with C1,
form a high pass filter with fc = 1/(2πR1C1).
C1, 2, 3, 4
The input coupling capacitor blocks DC voltage at the amplifier’s input terminals. C1, along with
R1, create a highpass filter with fc = 1/(2πR1C1). Refer to the section, SELECTING PROPER
EXTERNAL COMPONENTS, for an explanation of determining the value of C1.
The feedback resistance, along with R1 sets the closed-loop gain.
3.
4.
R2, 3, 7, 8
C6
The supply bypass capacitor. Refer to the POWER SUPPLY BYPASSING section for
information about properly placing, and selecting the value of, this capacitor.
The capacitor, C5, filters the half-supply voltage present on the BYPASS pin. Refer to the
SELECTING PROPER EXTERNAL COMPONENTS section for information concerning proper
placement and selecting C5’s value.
5.
C5
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2
Absolute Maximum Ratings (Note 3)
Small Outline Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
215˚C
220˚C
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Thermal Resistance
θJC (typ)—SQA24B
θJA (typ)—SQA24B
Supply Voltage
Storage Temperature
Input Voltage
6.0V
−65˚C to +150˚C
−0.3V to VDD
+0.3V
3˚C/W
42˚C/W
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
Supply Voltage
Power Dissipation (Note 4)
ESD Susceptibility (Note 5)
ESD Susceptibility (Note 6)
Junction Temperature
Internally limited
2000V
−40˚C ≤ TA ≤ 85˚C
2.4V ≤ VDD ≤ 5.5V
200V
150˚C
Solder Information
Electrical Characteristics (5V) (Notes 3, 7, 13)
The following specifications apply for VDD = 5V unless otherwise noted. Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4883
Units
(Limits)
Typical
Limit
(Note 9)
2.4
(Note 8)
VDD
IDD
Supply Voltage
V (min)
V (max)
mA (max)
mA (min)
µA (max)
V (min)
V (max)
V (min)
V (max)
ms
5.5
Quiescent Power Supply Current VIN = 0V, IO = 0A (Note 10) , HP-IN = 0V
VIN = 0V, IO = 0A (Note 10) , HP-IN = 4V
6
10
3.0
0.04
3.7
2.6
6
ISD
Shutdown Current
VDD applied to the SHUTDOWN pin
2
VIH
Headphone High Input Voltage
Headphone Low Input Voltage
Shutdown High Input Voltage
Shutdown Low Input Voltage
Turn On Time
4
VIL
0.8
VIHSD
VILSD
TWU
0.7VDD
0.3VDD
1µF Bypass Cap (C5)
140
Electrical Characteristics for Bridged-Mode Operation (5V) (Notes 3, 7, 13)
The following specifications apply for VDD = 5V unless otherwise specified. Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4883
Typical Limit
(Note 8) (Note 9)
Units
(Limits)
VOS
Output Offset Voltage
VIN = 0V
5
45
mV (max)
THD+N = 1%, f = 1kHz (Note 12)
LM4883SQ, RL = 3Ω
2.4
2.1
1.3
W
W
LM4883SQ, RL = 4Ω
LM4883SQ, RL = 8Ω
1.0
W (min)
PO
Output Power (Note 11)
THD+N = 10%, f = 1kHz (Note 12)
LM4883SQ, RL = 3Ω
3.0
2.5
1.7
W
W
W
LM4883SQ, RL = 4Ω
LM4883SQ, RL = 8Ω
1kHz, AVD = 2
THD+N Total Harmonic Distortion+Noise
LM4883SQ, RL = 4Ω, PO = 1W
LM4883SQ, RL = 8Ω, PO = .4W
0.10
0.06
%
%
3
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Electrical Characteristics for Bridged-Mode Operation (5V) (Notes 3, 7,
13) (Continued)
The following specifications apply for VDD = 5V unless otherwise specified. Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4883
Typical Limit
Units
(Limits)
(Note 8) (Note 9)
85
Input Floating, 217Hz
dB
dB
dB
dB
Vripple = 200mVp-p
CB = 1µF, RL = 8Ω
Input Floating, 1kHz
Vripple = 200mVp-p
CB = 1µF, RL = 8Ω
Input grounded, 217Hz
Vripple = 200mVp-p
CB = 1µF, RL = 8Ω
Input grounded, 1kHz
Vripple = 200mVp-p
CB = 1µF, RL = 8Ω
f = 1kHz, CB = 1.0µF
1kHz, A-weighted
80
65
70
PSRR
Power Supply Rejection Ratio
XTALK
VNO
Channel Separation
Output Noise Voltage
82
21
dB
µV
Electrical Characteristics for Single-Ended Operation (5V) (Notes 3, 7, 13)
The following specifications apply for VDD = 5V unless otherwise specified. Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4883
Units
(Limits)
Typical
Limit
(Note 9)
75
(Note 8)
90
PO
Output Power
THD+N = 0.5%, f = 1 kHz, RL = 32Ω
THD+N = 1%, f = 1 kHz, RL = 8Ω
THD+N = 10%, f = 1 kHz, RL = 8Ω
mW (min)
mW
325
400
mW
THD+N Total Harmonic Distortion+Noise PO = 20mW, 1kHz, RL = 32Ω
0.015
70
%
Input Floating, 217Hz
Vripple = 200mVp-p
CB = 1µF, RL = 8Ω
Input Floating, 1kHz
Vripple = 200mVp-p
CB = 1µF, RL = 8Ω
dB
72
65
70
dB
dB
dB
PSRR
Power Supply Rejection Ratio
Input grounded, 217Hz
Vripple = 200mVp-p
CB = 1µF, RL = 8Ω
Input grounded, 1kHz
Vripple = 200mVp-p
CB = 1µF, RL = 8Ω
f = 1kHz, CB = 1.0µF
1kHz, A-weighted
XTALK
VNO
Channel Separation
Output Noise Voltage
80
11
dB
µV
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4
Electrical Characteristics (3V) (Notes 3, 7, 13)
The following specifications apply for VDD = 3V unless otherwise noted. Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4883
Units
(Limits)
Typical
Limit
(Note 8)
4.5
(Note 9)
IDD
Quiescent Power Supply Current VIN = 0V, IO = 0A (Note 10) , HP-IN = 0V
VIN = 0V, IO = 0A (Note 10) , HP-IN = 4V
mA
mA
2.5
ISD
Shutdown Current
VDD applied to the SHUTDOWN pin
0.01
2.2
µA
VIH
Headphone High Input Voltage
Headphone Low Input Voltage
Shutdown High Input Voltage
Shutdown Low Input Voltage
Turn On Time
V
VIL
1.5
V
VIHSD
VILSD
TWU
0.7VDD
0.3VDD
V (min)
V (max)
ms
1µF Bypass Cap (C5)
140
Electrical Characteristics for Bridged-Mode Operation (3V) (Notes 3, 7, 13)
The following specifications apply for VDD = 3V unless otherwise specified. Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4883
Typical Limit
Units
(Limits)
(Note 8) (Note 9)
5
VOS
Output Offset Voltage
VIN = 0V
mV
THD+N = 1%, f = 1kHz (Note 12)
LM4883SQ, RL = 3Ω
LM4883SQ, RL = 4Ω
LM4883SQ, RL = 8Ω
THD+N = 10%, f = 1kHz (Note 12)
LM4883SQ, RL = 3Ω
LM4883SQ, RL = 4Ω
LM4883SQ, RL = 8Ω
1kHz
.82
.70
.43
W
W
W
PO
Output Power (Note 11)
1.0
.85
.53
W
W
W
THD+N Total Harmonic Distortion+Noise
LM4883SQ, RL = 4Ω, PO = 280mW
LM4883SQ, RL = 8Ω, PO = 200mW
Input Floating, 217Hz
Vripple = 200mVp-p
0.1
0.05
90
%
%
dB
CB = 1µF, RL = 8Ω
Input Floating, 1kHz
Vripple = 200mVp-p
80
65
73
dB
dB
dB
CB = 1µF, RL = 8Ω
PSRR
Power Supply Rejection Ratio
Input grounded, 217Hz
Vripple = 200mVp-p
CB = 1µF, RL = 8Ω
Input grounded, 1kHz
Vripple = 200mVp-p
CB = 1µF, RL = 8Ω
XTALK
VNO
Channel Separation
Output Noise Voltage
f = 1kHz, CB = 1.0µF
1kHz, A-weighted
85
21
dB
µV
5
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Electrical Characteristics for Single-Ended Operation (3V) (Notes 3, 7, 13)
The following specifications apply for VDD = 3V unless otherwise specified. Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4883
Units
(Limits)
Typical
Limit
(Note 8)
35
(Note 9)
THD+N = 0.5%, f = 1 kHz, RL = 32Ω
THD+N = 1%, f = 1 kHz, RL = 8Ω
THD+N = 10%, f = 1 kHz, RL = 8Ω
PO = 35mW, 20Hz ≤ f ≤ 20kHz,
RL = 32Ω
mW
mW
mW
PO
Output Power
125
150
THD+N Total Harmonic Distortion+Noise
.015
71
%
Input Floating, 217Hz
Vripple = 200mVp-p
dB
CB = 1µF, RL = 8Ω
Input Floating, 1kHz
79
65
72
dB
dB
dB
Vripple = 200mVp-p
CB = 1µF, RL = 8Ω
PSRR
Power Supply Rejection Ratio
Input grounded, 217Hz
Vripple = 200mVp-p
CB = 1µF, RL = 32Ω
Input grounded, 1kHz
Vripple = 200mVp-p
CB = 1µF, RL = 32Ω
XTALK
VNO
Channel Separation
Output Noise Voltage
f = 1kHz, CB = 1.0µF
1kHz, A-weighted
80
11
dB
µV
Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device operates within the Operating Ratings. Specifications are not guaranteed for parameters where
no limit is given. The typical value however, is a good indication of device performance.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
, θ , and the ambient temperature T . The maximum
JA A
JMAX
allowable power dissipation is P
= (T
− T )/θ . For the LM4883SQ, T
= 150˚C.
DMAX
JMAX
A
JA
JMAX
Note 5: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 6: Machine model, 220 pF–240 pF discharged through all pins.
Note 7: All voltages are measured with respect to the ground (GND) pins, unless otherwise specified.
Note 8: Typicals are specified at 25˚C and represent the parametric norm.
Note 9: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 10: The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier.
Note 11: Output power is measured at the device terminals.
2
Note 12: When driving 3Ω or 4Ω loads and operating on a 5V supply, the LM4883SQ must be mounted to a circuit board that has a minimum of 2.5in of exposed,
uninterrupted copper area connected to the SQ package’s exposed DAP.
Note 13: All measurements taken from Applications Diagram (Figure 3).
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Typical Performance Characteristics
THD+N vs Output Power
THD+N vs Output Power
5V, 8Ω, BTL at 1kHz
5V, 4Ω, BTL at 1kHz
200887B6
200887B5
200887B8
200887B9
THD+N vs Output Power
5V, 3Ω, BTL at 1kHz
THD+N vs Output Power
5V, 32Ω, BTL at 1kHz
200887B4
THD+N vs Output Power
THD+N vs Output Power
5V, 32Ω, SE at 1kHz
5V, 8Ω, SE at 1kHz
200887B7
7
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Typical Performance Characteristics (Continued)
THD+N vs Output Power
THD+N vs Output Power
3V, 8Ω, BTL at 1kHz
3V, 4Ω, BTL at 1kHz
20088780
20088779
20088782
20088783
THD+N vs Output Power
3V, 3Ω, BTL at 1kHz
THD+N vs Output Power
3V, 32Ω, BTL at 1kHz
20088778
THD+N vs Output Power
THD+N vs Output Power
3V, 32Ω, SE at 1kHz
3V, 8Ω, SE at 1kHz
20088781
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8
Typical Performance Characteristics (Continued)
THD+N vs Frequency
THD+N vs Frequency
5V, 8Ω, BTL at 400mW
5V, 4Ω, BTL at 1W
20088776
20088775
20088773
20088774
THD+N vs Frequency
5V, 32Ω, SE at 75mW
THD+N vs Frequency
3V, 8Ω, BTL at 150mW
20088777
THD+N vs Frequency
3V, 4Ω, BTL at 250mW
THD+N vs Frequency
3V, 32Ω, SE at 25mW
20088772
9
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Typical Performance Characteristics (Continued)
PSRR
PSRR
5V, 8Ω, BTL, Input Unterminated
5V, 8Ω, BTL, Input Terminated
20088767
20088768
PSRR
PSRR
5V, 32Ω, SE, Input Unterminated
5V, 32Ω, SE, Input Terminated
20088769
20088771
PSRR
PSRR
3V, 8Ω, BTL, Input Unterminated
3V, 8Ω, BTL, Input Terminated
20088763
20088764
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Typical Performance Characteristics (Continued)
PSRR
PSRR
3V, 32Ω, SE, Input Unterminated
3V, 32Ω, SE, Input Terminated
20088765
20088766
Frequency Response
Frequency Response
5V, 8Ω, BTL
3V, 8Ω, BTL
20088759
20088761
Frequency Response
Frequency Response
5V, 32Ω, SE
3V, 32Ω, SE
20088762
20088760
11
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Typical Performance Characteristics (Continued)
Crosstalk
Crosstalk
5V, 8Ω, BTL
3V, 8Ω, BTL
20088749
20088735
Crosstalk
3V, 32Ω, SE
Dropout Voltage vs
Supply Voltage
20088737
200887C0
Output Power vs
Supply Voltage
Open Loop
Frequency Response
200887C2
200887C1
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Typical Performance Characteristics (Continued)
Power Dissipation vs
Output Power
Power Dissipation vs
Output Power
200887C4
200887C5
Power Dissipation vs
Output Power
Single Channel, f = 1kHz,
Power Derating Curve
<
THD+N ≤ 1.0%, BW 80kHz
200887C7
200887C8
13
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allows rapid heat transfer from the die to the surrounding
PCB copper traces, ground plane and, finally, surrounding
air. The result is a low voltage audio power amplifier that
produces 2.1W at ≤ 1% THD with a 4Ω load. This high power
is achieved through careful consideration of necessary ther-
mal design. Failing to optimize thermal design may compro-
mise the LM4883SQ’s high power performance and activate
unwanted, though necessary, thermal shutdown protection.
Application Information
STEREO-INPUT MULTIPLEXER (STEREO MUX)
Typical LM4883 applications use the MUX to switch between
two stereo input signals. Each stereo channel’s gain can be
tailored to produce the required output signal level. Choos-
ing the input and feedback resistor ratio sets a MUX chan-
nel’s gain. Another configuration uses the MUX to select two
different gains or frequency compensated gains to amplify a
single pair of stereo input signals. Figure 2 shows two differ-
ent feedback networks, Network 1 and Network 2. Network 1
produces increasing gain as the input signal’s frequency
decreases. This can be used to compensate a small, full-
range speaker’s low frequency response roll-off. Network 2
sets the gain for an alternate load such as headphones.
Connecting the MUX CTRL and HP-IN pins together applies
the same control voltage to the MUX pins when connecting
and disconnecting headphones using the headphone jack
shown in Figure 3 or Figure 4. Simultaneously applying the
control voltage automatically selects the amplifier (head-
phone or bridge loads) and switches the gain (MUX channel
selection). Alternatively, leave the control pins independently
accessible. This allows a user to select bass boost as
needed. This alternative user-selectable bass-boost scheme
requires connecting equal ratio resistor feedback networks
to each MUX input channel. The value of the resistor in the
RC network is chosen to give a gain that is necessary to
achieve the desired bass-boost.
The SQ package must have its DAP soldered to a copper
pad on the PCB. The DAP’s PCB copper pad is connected to
a large plane of continuous unbroken copper. This plane
forms a thermal mass and heat sink and radiation area.
Place the heat sink area on either outside plane in the case
of a two-sided PCB, or on an inner layer of a board with more
than two layers. Connect the DAP copper pad to the inner
layer or backside copper heat sink area with 6 (3x2) SQ vias.
The via diameter should be 0.012in–0.013in with a 1.27mm
pitch. Ensure efficient thermal conductivity by plating-
through and solder-filling the vias.
Best thermal performance is achieved with the largest prac-
tical copper heat sink area. If the heatsink and amplifier
share the same PCB layer, a nominal 2.5in2 (min) area is
necessary for 5V operation with a 4Ω load. Heatsink areas
not placed on the same PCB layer as the LM4883SQ should
be 5in2 (min) for the same supply voltage and load resis-
tance. The last two area recommendations apply for 25˚C
ambient temperature. Increase the area to compensate for
ambient temperatures above 25˚C. In all circumstances and
conditions, the junction temperature must be held below
150˚C to prevent activating the LM4883SQ’s thermal shut-
down protection. The LM4883SQ’s power de-rating curve in
the Typical Performance Characteristics shows the maxi-
mum power dissipation versus temperature. Example PCB
layouts for the exposed-Dap SQ package is shown in the
Demonstration Board Layout section. Further detailed and
specific information concerning PCB layout, fabrication, and
mounting an SQ package is available from National Semi-
conductor’s AN1187.
Switching between the MUX channels may change the input
signal source or the feedback resistor network. During the
channel switching transition, the average voltage level
present on the internal amplifier’s input may change. This
change can slew at a rate that may produce audible voltage
transients or clicks in the amplifier’s output signal. Using the
MUX to select between two vastly dissimilar gains is a typical
transient-producing situation. As the MUX is switched, an
audible click may occur as the gain suddenly changes.
PCB LAYOUT AND SUPPLY REGULATION
CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω LOADS
Power dissipated by a load is a function of the voltage swing
across the load and the load’s impedance. As load imped-
ance decreases, load dissipation becomes increasingly de-
pendent on the interconnect (PCB trace and wire) resistance
between the amplifier output pins and the load’s connec-
tions. Residual trace resistance causes a voltage drop,
which results in power dissipated in the trace and not in the
load as desired. For example, 0.1Ω trace resistance reduces
the output power dissipated by a 4Ω load from 2.1W to 2.0W.
This problem of decreased load dissipation is exacerbated
as load impedance decreases. Therefore, to maintain the
highest load dissipation and widest output voltage swing,
PCB traces that connect the output pins to a load must be as
wide as possible.
20088770
Poor power supply regulation adversely affects maximum
output power. A poorly regulated supply’s output voltage
decreases with increasing load current. Reduced supply
voltage causes decreased headroom, output signal clipping,
and reduced output power. Even with tightly regulated sup-
plies, trace resistance creates the same effects as poor
supply regulation. Therefore, making the power supply
traces as wide as possible helps maintain full output voltage
swing.
FIGURE 2. Input MUX Example
EXPOSED-DAP PACKAGE PCB MOUNTING
CONSIDERATIONS
The LM4883’s SQ exposed-DAP (die attach paddle) pack-
age provides a low thermal resistance between the die and
the PCB to which the part is mounted and soldered. This
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14
Application Information (Continued)
200887A4
* Refer to the section Selecting Proper External Components, for a detailed discussion of C5 size.
FIGURE 3. Typical Audio Amplifier Application Circuit
BRIDGE CONFIGURATION EXPLANATION
channel A’s and channel B’s outputs at half-supply. This
eliminates the coupling capacitor that single supply, single-
ended amplifiers require. Eliminating an output coupling ca-
pacitor in a single-ended configuration forces a single-supply
amplifier’s half-supply bias voltage across the load. This
increases internal IC power dissipation and may perma-
nently damage loads such as speakers.
As shown in Figure 3, the LM4883 consists of two pairs of
operational amplifiers, forming a two-channel (channel A and
channel B) stereo amplifier. External feedback resistors
R3,2,7,8 and input resistors R1,4,5,6 set the closed-loop gain
of Amp A (-out) and Amp B (-out) whereas two internal 20kΩ
resistors set Amp A’s (+out) and Amp B’s (+out) gain at 1.
The LM4883 drives a load, such as a speaker, connected
between the two amplifier outputs, −OUTA and +OUTA.
POWER DISSIPATION
Power dissipation is a major concern when designing a
successful single-ended or bridged amplifier. Equation (2)
states the maximum power dissipation point for a single-
ended amplifier operating at a given supply voltage and
driving a specified output load.
Figure 3 shows that Amp A’s (-out) output serves as Amp A’s
(+out) input. This results in both amplifiers producing signals
identical in magnitude, but 180˚ out of phase. Taking advan-
tage of this phase difference, a load is placed between
−OUTA and +OUTA and driven differentially (commonly re-
ferred to as “bridge mode”). This results in a differential gain
of
PDMAX = (VDD)2/(2π2RL) Single-Ended
(2)
However, a direct consequence of the increased power de-
livered to the load by a bridge amplifier is higher internal
power dissipation for the same conditions.
AVD = 2 * (Rf/R )
(1)
i
or
The LM4883 has two operational amplifiers per channel. The
maximum internal power dissipation per channel operating in
the bridge mode is four times that of a single-ended ampli-
fier. From Equation (3), assuming a 5V power supply and a
4Ω load, the maximum single channel power dissipation is
1.27W or 2.54W for stereo operation.
AVD = 2 * (R3/R1)
Bridge mode amplifiers are different from single-ended am-
plifiers that drive loads connected between a single amplifi-
er’s output and ground. For a given supply voltage, bridge
mode has a distinct advantage over the single-ended con-
figuration: its differential output doubles the voltage swing
across the load. This produces four times the output power
when compared to a single-ended amplifier under the same
conditions. This increase in attainable output power as-
sumes that the amplifier is not current limited or that the
output signal is not clipped. To ensure minimum output sig-
nal clipping when choosing an amplifier’s closed-loop gain,
refer to the Audio Power Amplifier Design section.
PDMAX = 4 * (VDD)2/(2π2RL) Bridge Mode
(3)
The LM4883SQ’s power dissipation is twice that given by
Equation (2) or Equation (3) when operating in the single-
ended mode or bridge mode, respectively. Twice the maxi-
mum power dissipation point given by Equation (3) must not
exceed the power dissipation given by Equation (4):
PDMAX' = (TJMAX − TA)/θJA
(4)
Another advantage of the differential bridge output is no net
DC voltage across the load. This is accomplished by biasing
The LM4883’s TJMAX = 150˚C. In the SQ package soldered
to a DAP pad that expands to a copper area of 5in2 on a
15
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use a 10 µF in parallel with a 0.1 µF filter capacitor to
stabilize the regulator’s output, reduce noise on the supply
line, and improve the supply’s transient response. However,
their presence does not eliminate the need for a local 1.0 µF
tantalum bypass capacitance connected between the
LM4883’s supply pins and ground. Do not substitute a ce-
ramic capacitor for the tantalum. Doing so may cause oscil-
lation. Keep the length of leads and traces that connect
capacitors between the LM4883SQ’s power supply pin and
ground as short as possible. Connecting a 1µF capacitor, C5,
between the BYPASS pin and ground improves the internal
bias voltage’s stability and improves the amplifier’s PSRR.
The PSRR improvements increase as the bypass pin ca-
pacitor value increases. Too large, however, increases
turn-on time and can compromise amplifier’s click and pop
performance. The selection of bypass capacitor values, es-
pecially C5, depends on desired PSRR requirements, click
and pop performance (as explained in the section, Selecting
Proper External Components), system cost, and size con-
straints.
Application Information (Continued)
PCB, the LM4883SQ’s θJA is 20˚C/W. At any given ambient
temperature TA, use Equation (4) to find the maximum inter-
nal power dissipation supported by the IC packaging. Rear-
ranging Equation (4) and substituting PDMAX for PDMAX' re-
sults in Equation (5). This equation gives the maximum
ambient temperature that still allows maximum stereo power
dissipation without violating the LM4883’s maximum junction
temperature.
TA = TJMAX – 2*PDMAX θJA
(5)
For a typical application with a 5V power supply and an 4Ω
load, the maximum ambient temperature that allows maxi-
mum stereo power dissipation without exceeding the maxi-
mum junction temperature is approximately 99˚C for the SQ
package.
TJMAX = PDMAX θJA + TA
(6)
Equation (6) gives the maximum junction temperature
TJMAX. If the result violates the LM4883’s 150˚C, reduce the
maximum junction temperature by reducing the power sup-
ply voltage or increasing the load resistance. Further allow-
ance should be made for increased ambient temperatures.
MICRO-POWER SHUTDOWN
The voltage applied to the SHUTDOWN pin controls the
LM4883’s shutdown function. Activate micro-power shut-
down by applying VDD to the SHUTDOWN pin. When active,
the LM4883’s micro-power shutdown feature turns off the
amplifier’s bias circuitry, reducing the supply current. The
logic threshold is typically VDD/2. The low 0.04 µA typical
shutdown current is achieved by applying a voltage that is as
near as VDD as possible to the SHUTDOWN pin. A voltage
that is less than VDD may increase the shutdown current.
Table 1 shows the logic signal levels that activate and deac-
tivate micro-power shutdown and headphone amplifier op-
eration.
The above examples assume that a device is a surface
mount part operating around the maximum power dissipation
point. Since internal power dissipation is a function of output
power, higher ambient temperatures are allowed as output
power or duty cycle decreases.
If the result of Equation (2) is greater than that of Equation
(3), then decrease the supply voltage, increase the load
impedance, or reduce the ambient temperature. If these
measures are insufficient, a heat sink can be added to
reduce θJA. The heat sink can be created using additional
copper area around the package, with connections to the
ground pin(s), supply pin and amplifier output pins. External,
solder attached SMT heatsinks such as the Thermalloy
7106D can also improve power dissipation. When adding a
heat sink, the θJA is the sum of θJC, θCS, and θSA. (θJC is the
junction-to-case thermal impedance, θCS is the case-to-sink
thermal impedance, and θSA is the sink-to-ambient thermal
impedance.) Refer to the Typical Performance Character-
istics curves for power dissipation information at lower out-
put power levels.
There are a few ways to control the micro-power shutdown.
These include using a single-pole, single-throw switch, a
microprocessor, or a microcontroller. When using a switch,
connect an external 10kΩ pull-up resistor between the
SHUTDOWN pin and VDD. Connect the switch between the
SHUTDOWN pin and ground. Select normal amplifier opera-
tion by closing the switch. Opening the switch connects the
SHUTDOWN pin to VDD through the pull-up resistor, activat-
ing micro-power shutdown. The switch and resistor guaran-
tee that the SHUTDOWN pin will not float. This prevents
unwanted state changes. In a system with a microprocessor
or a microcontroller, use a digital output to apply the control
voltage to the SHUTDOWN pin. Driving the SHUTDOWN pin
with active circuitry eliminates the pull up resistor.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is
critical for low noise performance and high power supply
rejection. Applications that employ a 5V regulator typically
TABLE 1. Logic Level Truth Table for SHUTDOWN, HP-IN, and MUX Operation
SHUTDOWN HP-INPIN MUX CHANNEL OPERATIONAL MODE
PIN
SELECT PIN
Logic Low
Logic High
Logic Low
Logic High
X
(MUX INPUT CHANNEL #)
Bridged Amplifiers (1)
Logic Low
Logic Low
Logic Low
Logic Low
Logic High
Logic Low
Logic Low
Logic High
Logic High
X
Bridged Amplifiers (2)
Single-Ended Amplifiers (1)
Single-Ended Amplifiers (2)
Micro-Power Shutdown
HP-IN FUNCTION
Figure 4 shows the implementation of the LM4883’s head-
phone control function. With no headphones connected to
the headphone jack, the R9-R10 voltage divider sets the
voltage applied to the HP-IN pin (pin 20) at approximately
50mV. This 50mV enables Amp A (+out) and Amp B (+out)
Applying a voltage between 4V and VDD to the LM4883’s
HP-IN headphone control pin turns off Amp A (+out) and Amp
B (+out) muting a bridged-connected load. Quiescent current
consumption is reduced when the IC is in this single-ended
mode.
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16
achieve minimum THD+N and maximum signal-to-noise ra-
tio. These parameters are compromised as the closed-loop
gain increases. However, low gain demands input signals
with greater voltage swings to achieve maximum output
power. Fortunately, many signal sources such as audio
CODECs have outputs of 1VRMS (2.83VP-P). Please refer to
the Audio Power Amplifier Design section for more infor-
mation on selecting the proper gain.
Application Information (Continued)
placing the LM4883 in bridged mode operation. The output
coupling capacitor blocks the amplifier’s half supply DC volt-
age, protecting the headphones.
The HP-IN threshold is set at 4V. While the LM4883 operates
in bridged mode, the DC potential across the load is essen-
tially 0V. Therefore, even in an ideal situation, the output
swing cannot cause a false single-ended trigger. Connecting
headphones to the headphone jack disconnects the head-
phone jack contact pin from −OUTA and allows R1 to pull the
HP Sense pin up to VDD. This enables the headphone func-
tion, turns off Amp A (+out) and Amp B (+out) which mutes
the bridged speaker. The amplifier then drives the head-
phones, whose impedance is in parallel with resistors R11
and R12. These resistors have negligible effect on the
LM4883’s output drive capability since the typical impedance
of headphones is 32Ω.
Figure 4 also shows the suggested headphone jack electri-
cal connections. The jack is designed to mate with a three-
wire plug. The plug’s tip and ring should each carry one of
the two stereo output signals, whereas the sleeve should
carry the ground return. A headphone jack with one control
pin contact is sufficient to drive the HP-IN pin when connect-
ing headphones.
Input Capacitor Value Selection
Amplifying the lowest audio frequencies requires high value
input coupling capacitors (C1–4) in Figures 1, 3. A high value
capacitor can be expensive and may compromise space
efficiency in portable designs. In many cases, however, the
speakers used in portable systems, whether internal or ex-
ternal, have little ability to reproduce signals below 150 Hz.
Applications using speakers with this limited frequency re-
sponse reap little improvement by using large input capaci-
tor.
Besides effecting system cost and size, C1–4 have an effect
on the LM4883’s click and pop performance. When the
supply voltage is first applied, a transient (pop) is created as
the charge on the input capacitor changes from zero to a
quiescent state. The magnitude of the pop is directly propor-
tional to the input capacitor’s size. Higher value capacitors
need more time to reach a quiescent DC voltage (usually
VDD/2) when charged with a fixed current. The amplifier’s
output charges the input capacitor through the feedback
resistors, R2,3,7,and 8. Thus, pops can be minimized by
selecting an input capacitor value that is no higher than
necessary to meet the desired −3dB frequency.
A microprocessor or a switch can replace the headphone
jack contact pin. When a microprocessor or switch applies a
voltage greater than 4V to the HP-IN pin, a bridge-connected
speaker is muted and Amp A (-out) and Amp B (-out) drive a
pair of headphones.
A shown in Figure 3, the input resistors (R1,4,5, and 6) and
the input capacitors, C1–4 produce a −3dB high pass filter
cutoff frequency that is found using Equation (7).
(7)
As an example when using a speaker with a low frequency
limit of 150Hz, C1, using Equation (7) is 0.053µF. The .33µF
C1 shown in Figure 3 allows the LM4883 to drive high
efficiency, full range speaker whose response extends below
30Hz.
Bypass Capacitor Value Selection
Besides minimizing the input capacitor size, careful consid-
eration should be paid to value of C5, the capacitor con-
nected to the BYPASS pin. Since C5 determines how fast the
LM4883 settles to quiescent operation, its value is critical
when minimizing turn-on pops. The slower the LM4883’s
outputs ramp to their quiescent DC voltage (nominally 1/2
VDD), the smaller the turn-on pop. Choosing C5 equal to
1.0 µF along with a small value of C1 (in the range of 0.1 µF
to 0.39 µF), produces a click-less and pop-less shutdown
function. As discussed above, choosing C1 no larger than
necessary for the desired bandwith helps minimize clicks
and pops.
20088724
FIGURE 4. Headphone Circuit
SELECTING PROPER EXTERNAL COMPONENTS
Optimizing the LM4883’s performance requires properly se-
lecting external components. Though the LM4883 operates
well when using external components with wide tolerances,
best performance is achieved by optimizing component val-
ues.
OPTIMIZING CLICK AND POP REDUCTION
PERFORMANCE
The LM4883 contains circuitry that minimizes turn-on and
shutdown transients or “clicks and pop”. For this discussion,
turn-on refers to either applying the power supply voltage or
when the shutdown mode is deactivated. While the power
supply is ramping to its final value, the LM4883’s internal
amplifiers are configured as unity gain buffers. An internal
The LM4883 is unity-gain stable, giving a designer maximum
design flexibility. The gain should be set to no more than a
given application requires. This allows the amplifier to
17
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Typical Performance Characteristics curves, must be
added to the result obtained by Equation (8). The result in
Equation (9).
Application Information (Continued)
current source changes the voltage of the BYPASS pin in a
controlled, linear manner. Ideally, the input and outputs track
the voltage applied to the BYPASS pin. The gain of the
internal amplifiers remains unity until the voltage on the
bypass pin reaches 1/2 VDD . As soon as the voltage on the
bypass pin is stable, the device becomes fully operational.
Although the BYPASS pin current cannot be modified,
changing the size of C5 alters the device’s turn-on time and
the magnitude of “clicks and pops”. Increasing the value of
C5 reduces the magnitude of turn-on pops. However, this
presents a tradeoff: as the size of C5 increases, the turn-on
time increases. There is a linear relationship between the
size of C5 and the turn-on time. Here are some typical
turn-on times for various values of C5:
(8)
VDD ≥ (VOUTPEAK + (VOD
+ VODBOT))
(9)
TOP
The Output Power vs Supply Voltage graph for an 8Ω load
indicates a minimum supply voltage of 4.6V. This is easily
met by the commonly used 5V supply voltage. The additional
voltage creates the benefit of headroom, allowing the
LM4883 to produce peak output power in excess of 1W
without clipping or other audible distortion. The choice of
supply voltage must also not create a situation that violates
maximum power dissipation as explained above in the
Power Dissipation section.
C5
TON
30ms
After satisfying the LM4883’s power dissipation require-
ments, the minimum differential gain needed to achieve 1W
dissipation in an 8Ω load is found using Equation (10).
0.01µF
0.1µF
0.22µF
0.47µF
1.0µF
40ms
60ms
80ms
(10)
140 ms
Thus, a minimum gain of 2.83 allows the LM4883’s to reach
full output swing and maintain low noise and THD+N perfor-
mance. For this example, let AVD = 3.
In order eliminate “clicks and pops”, all capacitors must be
discharged before turn-on. Rapidly switching VDD may not
allow the capacitors to fully discharge, which may cause
“clicks and pops”. In a single-ended configuration, the output
is coupled to the load by C7,8. These capacitors usually
have a high value. C7,8 discharges through internal 20kΩ
resistors. Depending on the size of C7,8, the discharge time
constant can be relatively large. To reduce transients in
single-ended mode, an external 1kΩ–5kΩ resistor can be
placed in parallel with the internal 20kΩ resistor. The tradeoff
for using this resistor is increased quiescent current.
The amplifier’s overall gain is set using the input (R1) and
feedback (R3) resistors. With the desired input impedance
set at 20kΩ, the feedback resistor is found using Equation
(11).
R3/R1 = AVD/2
The value of Rf is 30kΩ.
(11)
The last step in this design example is setting the amplifier’s
−3dB frequency bandwidth. To achieve the desired 0.25dB
pass band magnitude variation limit, the low frequency re-
sponse must extend to at least one-fifth the lower bandwidth
limit and the high frequency response must extend to at least
five times the upper bandwidth limit. The gain variation for
both response limits is 0.17dB, well within the 0.25dB
desired limit. The results are an
NO LOAD STABILITY
The LM4883 may exhibit low level oscillation when the load
resistance is greater than 10kΩ. This oscillation only occurs
as the output signal swings near the supply voltages. Pre-
vent this oscillation by connecting a 5kΩ between the output
pins and ground.
fL = 100Hz/5 = 20Hz
and an
fH = 20kHz*5 = 100kHz.
AUDIO POWER AMPLIFIER DESIGN
As mentioned in the External Components section, R1 and
C1 create a highpass filter that sets the amplifier’s lower
bandpass frequency limit. Find the coupling capacitor’s
value using Equation (12).
Audio Amplifier Design: Driving 1W into an 8Ω Load
The following are the desired operational parameters:
Power Output:
Load Impedance:
Input Level:
1WRMS
C1 ≥ 1/(2πR1fL)
(12)
8Ω
1Vrms
The result is
1/(2π*20kΩ*20Hz) = 0.398µF.
Use a 0.39µF capacitor, the closest standard value.
Input Impedance:
Bandwidth:
20kΩ
100Hz−20kHz 0.25dB
The product of the desired high frequency cutoff (100kHz in
this example) and the differential gain, AVD, determines the
The design begins by specifying the minimum supply voltage
necessary to obtain the specified output power. One way to
find the minimum supply voltage is to use the Output Power
vs Supply Voltage curve in the Typical Performance Char-
acteristics section. Another way, using Equation (8), is to
calculate the peak output voltage necessary to achieve the
desired output power for a given load impedance. To ac-
count for the amplifier’s dropout voltage, two additional volt-
ages, based on the Dropout Voltage vs Supply Voltage in the
upper passband response limit. With AVD = 3 and fH
=
100kHz, the closed-loop gain bandwidth product (GBWP) is
300kHz. This is less than the LM4883’s 3.5MHz GBWP. With
this margin, the amplifier can be used in designs that require
more differential gain while avoiding performance-restricting
bandwidth limitations.
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18
These circuit boards are easy to use. Apply 5V and ground to
the board’s VDD and GND pads, respectively. Connect the
speakers between the board’s −OUTA and +OUTA and
OUTB and +OUTB pads.
Application Information (Continued)
RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT
Figures 5 through 7 show the recommended two-layer PC
board layout that is optimized for the 24-pin SQ package.
These circuits are designed for use with an external 5V
supply and 8Ω, 4Ω, 3Ω speakers.
19
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Demonstration Board Layout
20088727
FIGURE 5. Top Layer
20088725
FIGURE 6. Bottom Layer
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20
Demonstration Board Layout (Continued)
20088726
FIGURE 7. Silkscreen
21
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Bill of Materials
Analog Audio LM4883SQ Eval Board
Assembly Part Number: 551012279–001
Revision: A
Item
Part Number
Part Description
LM4883SQ Eval Board PCB etch
001
Qty Ref Designator
Remark
1
551012279–001
1
2
3
4
IC LM4883SQ
1
4
2
U1
Tant Cap 0.33µF 50V 10%
Tant Cap 1µF 16V 10% Size = A
3216
C1–C4
C5, C6
5
Tant Cap 100µF 16V 10% Size = D
7343
2
C7, C8
6
7
8
9
Res 1kΩ 1/8W 1% 0805
Res 20kΩ 1/8W 1% 0805
Res 100kΩ 1/8W 1% 0805
RCA Jack
2
8
2
4
R11, R12
R1–R8
R9, R10
–A, –A2, –B,
–B2
Mouser # 16PJ097
Mouser # ME164–6218
Mouser # ME164–6219
10
11
12
Banana Jack, Black
Banana Jack, Red
Jumper Header 3 x 1
3
3
2
–OutA,– OutB,
GND
+OutA,+ OutB,
VDD
SD, MUX
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22
Physical Dimensions inches (millimeters) unless otherwise noted
LLP Package
Order Number LM4883SQ
NS Package Number SQA24B
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
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National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship
Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned
Substances’’ as defined in CSP-9-111S2.
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