LM4925MM [NSC]
2 Cell, Single Ended Output, 40mW Stereo Headphone Audio Amplifier; 2细胞，单端输出，为40mW立体声耳机音频放大器
| 型号： | LM4925MM |
| 厂家： | 
National Semiconductor |
| 描述： | 2 Cell, Single Ended Output, 40mW Stereo Headphone Audio Amplifier |
| 文件： | 总15页 (文件大小：1043K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 2005
LM4925
2 Cell, Single Ended Output, 40mW Stereo Headphone
Audio Amplifier
General Description
Key Specifications
n Mono-BTL Output Power
The unity gain stable LM4925 is both a mono differential
output (for BTL operation) audio amplifier and a Single
Ended (SE) stereo headphone amplifier. Operating on a
single 3V supply, the mono-BTL mode delivers 410mW into
an 8Ω load at 1% THD+N. In Single Ended stereo head-
phone mode, the amplifier delivers 40mW per channel into a
16Ω load at 1% THD+N.
n
(RL = 8Ω, VDD = 3.0V, THD+N = 1%)
n Single Ended Output Power Per Channel
(RL = 16Ω, VDD = 3.0V, THD+N = 1%)
410mW (typ)
n
40mW (typ)
0.1µA (typ)
n Micropower shutdown current
n Supply voltage operating range
n PSRR 100Hz, VDD = 3V, BTL
<
<
1.5V VDD 3.6V
70dB (typ)
With the LM4925 packaged in the MM and LLP packages,
the customer benefits include low profile and small size. This
package minimizes PCB area and maximizes output power.
Features
n BTL mode for mono speaker
n 2-cell 1.5V to 3.6V battery operation
The LM4925 features circuitry that reduces output transients
(“clicks” and “pops”) during device turn-on and turn-off, an
externally controlled, low-power consumption, active-low
shutdown mode, and thermal shutdown. Boomer audio
power amplifiers are designed specifically to use few exter-
nal components and provide high quality output power in a
surface mount package.
n Single ended headphone operation with output coupling
capacitors
n Unity-gain stable
n “Click and pop” suppression circuitry for both Shutdown
and Mute
n Active low micro-power shutdown
n Active-low mute mode
n Thermal shutdown protection circuitry
Applications
n Portable two-cell audio products
n Portable two-cell electronic devices
Typical Application
20121157
FIGURE 1. Block Diagram
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2005 National Semiconductor Corporation
DS201211
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Connection Diagrams
MSOP Package
20121158
Top View
Order Number LM4925MM
See NS Package Number MUB10A for MSOP
LD Package
20121152
Top View
Order Number LM4925SD
See NS Package Number SDA10A
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2
Typical Connections
20121159
FIGURE 2. Typical Capacitive Couple (SE) Output Configuration Circuit
20121167
FIGURE 3. Typical BTL Speaker Configuration Circuit
3
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Infrared (15 sec)
220˚C
See AN-450 “Surface Mounting and their Effects on
Product Reliablilty” for other methods of soldering
surface mount devices.
Supply Voltage
3.8V
−65˚C to +150˚C
−0.3V to VDD +0.3V
Internally limited
2000V
Thermal Resistance
Storage Temperature
Input Voltage
θJA (typ) MUB10A
θJA (typ) LDA10A
175˚C/W
73˚C/W
Power Dissipation (Note 2)
ESD Susceptibility(Note 3)
ESD Susceptibility (Note 4)
Junction Temperature
Solder Information
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
Supply Voltage
200V
150˚C
−40˚C ≤ TA ≤ +85˚C
1.5V ≤ VDD ≤ 3.6V
Small Outline Package Vapor
Phase (60sec)
215˚C
Electrical Characteristics VDD = 3.0V (Notes 1, 5)
The following specifications apply for the circuit shown in Figure 2 for Single Ended Outputs (AV = 2.5V) and Figure 3
for BTL Outputs (AV-BTL = 2), unless otherwise specified. Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4925
Units
(Limits)
Typical
Limit
(Note 7)
1.6
(Note 6)
∞
IDD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, IO = 0A, RL
VSHUTDOWN = GND
=
(Note 8)
1.0
0.1
2
mA (max)
µA (max)
mV (max)
ISD
1
VOS
Output Offset Voltage
10
RL = 8Ω, BTL, Fig. 3,
THD+N = 1%, f = 1kHz
410
350
30
mW (min)
mW (min)
PO
Output Power (Note 9)
RL = 16Ω, Fig. 2, SE per Channel,
THD+N = 1%, f = 1kHz
RL = 8Ω, BTL, PO = 300mW,
Fig. 3, f = 1kHz
40
0.1
THD+N
Total Harmonic Distortion + Noise
Output Voltage Noise
0.5
% (max)
RL = 16Ω, SE, PO = 20mW per channel,
Fig.2, f = 1kHz
0.05
20Hz to 20kHz, A-weighted,
Input Referred,
VNO
10
58
70
µVRMS
dB
Single Ended Output, Fig. 2
RL = 16Ω, Fig. 2
Crosstalk
VRIPPLE = 200mVP-P sine wave
CBYPASS = 4.7µF, RL = 8Ω
f = 100Hz, BTL, Fig. 3
VRIPPLE = 200mVP-P sine wave
CBYPASS = 4.7µF, RL = 16Ω
f = 100Hz, SE, Fig. 2
dB
PSRR
Power Supply Rejection Ratio
68
dB
VIH
Control Logic High
Control Logic Low
1.5V ≤ VDD ≤ 3.6V
0.7VDD
0.3VDD
70
V (min)
V (max)
dB (min)
VIL
1.5V ≤ VDD ≤ 3.6V
Mute
1VPP Reference,
Attenuation
Ri = 20k, Rf = 50k
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4
Electrical Characteristics VDD = 1.8V (Notes 1, 5)
The following specifications apply for the circuit shown in Figure 2 for Single Ended Outputs (AV = 2.5V) and Figure 3
for BTL Outputs (AV-BTL = 2), unless otherwise specified. Limits apply for TA = 25˚C.
Symbol
Parameter
Conditions
LM4925
Units
(Limits)
Typical
Limit
(Note 7)
1.6
(Note 6)
0.9
∞
IDD
Quiescent Power Supply Current
Shutdown Current
VIN = 0V, IO = 0A, RL
VSHUTDOWN = GND
=
(Note 8)
mA (max)
µA (max)
mV (max)
ISD
0.05
2
1
VOS
Output Offset Voltage
10
RL = 8Ω, BTL, Fig. 3,
THD+N = 1%, f = 1kHz
120
90
7
mW (min)
mW (min)
PO
Output Power (Note 9)
RL = 16Ω, Fig. 2, SE per Channel,
THD+N = 1%, f = 1kHz
RL = 8Ω, BTL, PO = 50mW,
Fig. 3, f = 1kHz
10
0.15
THD+N
VNO
Total Harmonic Distortion + Noise
Output Voltage Noise
0.5
% (max)
µVRMS
RL = 16Ω, SE, PO = 5mW per channel,
Fig.2, f = 1kHz
0.1
10
20Hz to 20kHz, A-weighted,
Input Referred,
Single Ended Output, Fig. 2
RL = 16Ω, Fig. 2
Crosstalk
PSRR
58
70
dB
dB
VRIPPLE = 200mVP-P sine wave
CBYPASS = 4.7µF, RL = 8Ω
f = 100Hz, BTL, Fig. 3
VRIPPLE = 200mVP-P sine wave
CBYPASS = 4.7µF, RL = 16Ω
f = 100Hz, SE, Fig. 2
Power Supply Rejection Ratio
68
dB
VIH
Control Logic High
Control Logic Low
1.5V ≤ VDD ≤ 3.6V
0.7VDD
0.3VDD
70
V (min)
V (max)
dB (min)
VIL
1.5V ≤ VDD ≤ 3.6V
Mute
1VPP Reference,
Attenuation
Ri = 20k, Rf = 50k
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit
is given, however, the typical value is a good indication of device performance.
Note 2: The maximum power dissipation is dictated by T
, θ , and the ambient temperature T and must be derated at elevated temperatures. The maximum
JMAX JA
A
allowable power dissipation is P
= (T
− T )/θ . For the LM4925, T
= 150˚C. For the θ s, please see the Application Information section or the
DMAX
JMAX
A
JA
JMAX
JA
Absolute Maximum Ratings section.
Note 3: Human body model, 100pF discharged through a 1.5kΩ resistor.
Note 4: Machine model, 220pF–240pF discharged through all pins.
Note 5: All voltages are measured with respect to the ground (GND) pins unless otherwise specified.
Note 6: Typicals are measured at 25˚C and represent the parametric norm.
Note 7: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 8: The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier.
Note 9: Output power is measured at the device terminals.
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Typical Performance Characteristics
THD+N vs Frequency
VDD = 1.8V, SE, RL = 16Ω
PO = 5mW per channel
THD+N vs Frequency
VDD = 3V, SE, RL = 16Ω
PO = 20mW per channel
20121108
20121110
20121109
20121114
THD+N vs Frequency
VDD = 1.8V, BTL, RL = 8Ω
PO = 50mW
THD+N vs Frequency
VDD = 3V, BTL, RL = 8Ω
PO = 300mW
20121107
THD+N vs Output Power
VDD = 1.8V, SE, RL = 16Ω
f = 1kHz, Both channels
THD+N vs Output Power
VDD = 3V, SE, RL = 16Ω
f = 1kHz, Both channels
20121112
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6
Typical Performance Characteristics (Continued)
THD+N vs Output Power
VDD = 1.8V, BTL, RL = 8Ω
f = 1kHz
THD+N vs Output Power
VDD = 3V, BTL, RL = 8Ω
f = 1kHz
20121111
20121133
Output Power vs Supply Voltage
Output Noise vs Frequency
RL = 8Ω, BTL, f = 1kHz
20121106
20121115
Output Power vs Supply Voltage
Output Power vs Load Resistance
VDD = 1.8V, BTL, f = 1kHz
RL = 16Ω, SE, f = 1kHz
20121117
20121116
7
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Typical Performance Characteristics (Continued)
Output Power vs Load Resistance
VDD = 1.8V, SE, f = 1kHz
Output Power vs Load Resistance
VDD = 3V, BTL, f = 1kHz
20121134
20121119
Output Power vs Load Resistance
VDD = 3V, SE, f = 1kHz
Output Power vs Supply Voltage
RL = 8Ω, BTL, f = 1kHz
20121120
20121121
Power Dissipation vs Output Power
Power Dissipation vs Output Power
VDD = 1.8V, RL = 8Ω, BTL, f = 1kHz
VDD = 1.8V, RL = 16Ω, SE, f = 1kHz
20121123
20121124
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Typical Performance Characteristics (Continued)
Power Dissipation vs Output Power
Power Dissipation vs Output Power
VDD = 3V, RL = 8Ω, BTL, f = 1kHz
VDD = 3V, RL = 16Ω, SE, f = 1kHz
20121125
20121126
Power Supply Rejection vs Frequency
VDD = 1.8V, RL = 8Ω, BTL
VRIPPLE = 200mVp-p, AV-BTL = 2V/V
Power Supply Rejection vs Frequency
VDD = 1.8V, RL = 16Ω, SE
VRIPPLE = 200mVp-p, AV = 2.5V/V
20121130
20121129
Power Supply Rejection vs Frequency
VDD = 3V, RL = 8Ω, BTL
VRIPPLE = 200mVp-p, AV-BTL = 2V/V
Power Supply Rejection vs Frequency
VDD = 3V, RL = 16Ω, SE
VRIPPLE = 200mVp-p, AV = 2.5V/V
20121131
20121132
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A bridge configuration, such as the one used in LM4925,
also creates a second advantage over single-ended amplifi-
ers. Since the differential outputs, VoA and VoB, are biased
at half-supply, no net DC voltage exists across the load. This
eliminates the need for an output coupling capacitor which is
required in a single supply, single-ended amplifier configura-
tion.
Application Information
BRIDGE (BTL) CONFIGURATION EXPLANATION
The LM4925 is a stereo audio power amplifier capable of
operating in bridged (BTL) mode. As shown in Figure 3, the
LM4925 has two internal operational amplifiers. The first
amplifier’s gain is externally configurable, while the second
amplifier should be externally fixed in a unity-gain, inverting
configuration. The closed-loop gain of the first amplifier is set
by selecting the ratio of Rf to Ri while the second amplifier’s
gain is fixed by the two external 20kΩ resistors. Figure 3
shows that the output of amplifier one serves as the input to
amplifier two which results in both amplifiers producing sig-
nals identical in magnitude, but out of phase by 180˚. Con-
sequently, the differential gain for the IC is
MODE SELECT DETAIL
The LM4925 can be configured for either single ended (see
Figure 2 ) or BTL mode (see Figure 3). When the SE/BTL pin
has a logic high (VDD) applied to it, the LM4925 is in BTL
mode. If a logic low (GND) is applied to SE/BTL, the LM4925
operates in single-ended mode. The slew rate of VDD must
be greater than 2.5V/ms to ensure reliable Power on reset
(POR). The circuit shown in Figure 4 presents an applica-
tions solution to the problem of using different supply volt-
ages with different turn-on times in a system with the
LM4925. This circuit shows the LM4925 with a 25-50kΩ.
AVD = 2 * (Rf / Ri)
Pull-up resistor connected from the shutdown pin to VDD
.
By driving the load differentially through outputs VoA and
VoB, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is
different from the classical single-ended amplifier configura-
tion where one side of the load is connected to ground. A
bridge amplifier design has a few distinct advantages over
the single-ended configuration, as it provides differential
drive to the load, thus doubling output swing for a specified
supply voltage. Four times the output power is possible as
compared to a single-ended amplifier under the same con-
ditions. This increase in attainable output power assumes
that the amplifier is not current limited or clipped. In order to
choose an amplifier’s closed-loop gain without causing ex-
cessive clipping, please refer to the Audio Power Amplifier
Design section.
The shutdown pin of the LM4925 is also being driven by an
open drain output of an external microcontroller on a sepa-
rate supply. This circuit ensures that shutdown is disabled
when powering up the LM4925 by either allowing shutdown
to be high before the LM4925 powers on (the microcontroller
powers up first) or allows shutdown to ramp up with VDD (the
LM4925 powers up first). This will ensure the LM4925 pow-
ers up properly and enters the correct mode of operation
(BTL or SE). Please note that the SE/BTL pin should be tied
to GND for single-ended (SE) mode, and to Vdd for BTL
mode.
20121161
FIGURE 4. Recommended Circuit for Different Supply Turn-On Timing
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10
MICRO POWER SHUTDOWN
Application Information (Continued)
The voltage applied to the SHUTDOWN pin controls the
LM4925’s shutdown function. Activate micro-power shut-
down by applying a logic-low voltage to the SHUTDOWN
pin. When active, the LM4925’s micro-power shutdown fea-
ture turns off the amplifier’s bias circuitry, reducing the sup-
ply current. A voltage that is higher than ground may in-
crease the shutdown current. There are a few ways to
control the micro-power shutdown. These include using a
single-pole, single-throw switch, a microprocessor, or a mi-
crocontroller. When using a switch, connect an external
100kΩ pull-up resistor between the SHUTDOWN pin and
VDD. Connect the switch between the SHUTDOWN pin and
ground. Select normal amplifier operation by opening the
switch. Closing the switch connects the SHUTDOWN pin to
ground, activating micro-power shutdown. The switch and
resistor guarantee that the SHUTDOWN pin will not float.
This prevents unwanted state changes. In a system with a
microprocessor or microcontroller, use a digital output to
apply the control voltage to the SHUTDOWN pin. Driving the
SHUTDOWN pin with active circuitry eliminates the pull-up
resistor. Shutdown enable/disable times are controlled by a
combination of Cbypass and VDD. Larger values of Cbypass
results in longer turn on/off times from Shutdown. Longer
shutdown times also improve the LM4925’s resistance to
click and pop upon entering or returning from shutdown. For
a 3.0V supply and Cbypass = 4.7µF, the LM4925 requires
about 2 seconds to enter or return from shutdown. This
longer shutdown time enables the LM4925 to have virtually
zero pop and click transients upon entering or release from
shutdown. Smaller values of Cbypass will decrease turn-on
time, but at the cost of increased pop and click and reduced
PSRR. When the LM4925 is in shutdown, the outputs be-
come very low impedance (less than 5Ω to GND).
POWER DISSIPATION
Power dissipation is a major concern when designing a
successful amplifier, whether the amplifier is bridged (BTL)
or single-ended. A direct consequence of the increased
power delivered to the load by a bridge amplifier is an
increase in internal power dissipation. Since the LM4925 has
two operational amplifiers in one package, the maximum
internal power dissipation in BTL mode is 4 times that of a
single-ended amplifier. The maximum power dissipation for a
given application can be derived from the power dissipation
graphs or from Equation 1.
2
PDMAX = 4 * (VDD
)
/ (2π2RL)
(1)
When operating in single ended mode, Equation 2 states the
maximum power dissipation point for a single-ended ampli-
fier operating at a given supply voltage and driving a speci-
fied output load.
2
PDMAX = (VDD
)
/ (2π2RL)
(2)
Since the LM4925 has two operational amplifiers in one
package, the maximum internal power dissipation point is
twice that of the number that results from Equation 2.
The maximum power dissipation point obtained from either
Equations 1, 2 must not be greater than the power dissipa-
tion that results from Equation 3:
PDMAX = (TJMAX - TA) / θJA
(3)
MUTE
For package MUB10A, θJA = 175˚C/W. TJMAX = 150˚C for
the LM4925. Depending on the ambient temperature, TA, of
the system surroundings, Equation 3 can be used to find the
maximum internal power dissipation supported by the IC
packaging. If the result of Equation 1 or 2 is greater than that
of Equation 3, then either the supply voltage must be de-
creased, the load impedance increased or TA reduced. For
the typical application of a 3.0V power supply, with an 16Ω
load, the maximum ambient temperature possible without
violating the maximum junction temperature is approximately
129˚C provided that device operation is around the maxi-
mum power dissipation point. Thus, for typical applications,
power dissipation is not an issue. Power dissipation is a
function of output power and thus, if typical operation is not
around the maximum power dissipation point, the ambient
temperature may be increased accordingly. Refer to the
Typical Performance Characteristics curves for power dissi-
pation information for lower output powers.
The LM4925 also features a mute function that enables
extremely fast turn-on/turn-off with a minimum of output pop
and click. The mute function leaves the outputs at their bias
level, thus resulting in higher power consumption than shut-
down mode, but also provides much faster turn on/off times.
Providing a logic low signal on the MUTE pin enables mute
mode. Threshold voltages and activation techniques match
those given for the shutdown function as well.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications us-
ing integrated power amplifiers is critical to optimize device
and system performance. While the LM4925 is tolerant of
external component combinations, consideration to compo-
nent values must be used to maximize overall system qual-
ity. The LM4925 is unity-gain stable that gives the designer
maximum system flexibility. The LM4925 should be used in
low gain configurations to minimize THD+N values, and
maximize the signal to noise ratio. Low gain configurations
require large input signals to obtain a given output power.
Input signals equal to or greater than 1Vrms are available
from sources such as audio codecs. Very large values
should not be used for the gain-setting resistors. Values for
Ri and Rf should be less than 1MΩ. Please refer to the
section, Audio Power Amplifier Design, for a more complete
explanation of proper gain selection. Besides gain, one of
the major considerations is the closed-loop bandwidth of the
amplifier. To a large extent, the bandwidth is dictated by the
choice of external components shown in Figures 2 and 3.
The input coupling capacitor, Ci, forms a first order high pass
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is important
for low noise performance and high power supply rejection.
The capacitor location on the power supply pins should be
as close to the device as possible. Typical applications em-
ploy a battery (or 3.0V regulator) with 10µF tantalum or
electrolytic capacitor and a ceramic bypass capacitor that
aid in supply stability. This does not eliminate the need for
bypassing the supply nodes of the LM4925. A bypass ca-
pacitor value in the range of 0.1µF to 4.7µF is recom-
mended.
11
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that allows the LM4925to reproduce peak in excess of
10mW without producing audible distortion. At this time, the
designer must make sure that the power supply choice along
with the output impedance does not violate the conditions
explained in the Power Dissipation section. Once the power
dissipation equations have been addressed, the required
gain can be determined from Equation 2.
Application Information (Continued)
filter that limits low frequency response. This value should be
chosen based on needed frequency response and turn-on
time.
SELECTION OF INPUT CAPACITOR SIZE
Amplifying the lowest audio frequencies requires a high
value input coupling capacitor, Ci. A high value capacitor can
be expensive and may compromise space efficiency in por-
table designs. In many cases, however, the headphones
used in portable systems have little ability to reproduce
signals below 60Hz. Applications using headphones with this
limited frequency response reap little improvement by using
a high value input capacitor. In addition to system cost and
size, turn on time is affected by the size of the input coupling
capacitor Ci. A larger input coupling capacitor requires more
charge to reach its quiescent DC voltage. This charge
comes from the output via the feedback. Thus, by minimizing
the capacitor size based on necessary low frequency re-
sponse, turn-on time can be minimized. A small value of Ci
(in the range of 0.1µF to 0.47µF), is recommended.
(4)
From Equation 4, the minimum AV is 1; use AV = 1. Since the
desired input impedance is 20k, and with a AV gain of 1, a
ratio of 1:1 results from Equation 1 for Rf to R. The values
are chosen with Ri = 20k and Rf = 20k. The final design step
is to address the bandwidth requirements which must be
stated as a pair of -3dB frequency points. Five times away
from a -3dB point is 0.17dB down from passband response
which is better than the required 0.25dB specified.
fL = 100Hz/5 = 20Hz
AUDIO POWER AMPLIFIER DESIGN
fH = 20kHz * 5 = 100kHz
A 25mW/32Ω Audio Amplifier
Given:
As stated in the External Components section, Ri in con-
junction with Ci creates a
Power Output
Load Impedance
Input Level
10mWrms
16Ω
0.4Vrms
20kΩ
Ci ≥ 1 / (2π * 20kΩ * 20Hz) = 0.397µF; use 0.39µF.
Input Impedance
The high frequency pole is determined by the product of the
desired frequency pole, fH, and the differential gain, AV. With
an AVV = 1 and fH = 100kHz, the resulting GBWP = 100kHz
which is much smaller than the LM4925GBWP of 3MHz.
This example displays that if a designer has a need to design
an amplifier with higher differential gain, the LM4925can still
be used without running into bandwidth limitations.
A designer must first choose a mode of operation (SE or
BTL) and determine the minimum supply rail to obtain the
specified output power. By extrapolating from the Output
Power vs. Supply Voltage graphs in the Typical Performance
Characteristics section, the supply rail can be easily found.
3.0V is a standard voltage in most applications, it is chosen
for the supply rail. Extra supply voltage creates headroom
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Application Information (Continued)
LM4925 BOARD ARTWORK
Composite View
Silk Screen
20121164
20121165
Top Layer
Bottom Layer
20121163
20121166
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Physical Dimensions inches (millimeters) unless otherwise noted
MSOP Package
Order Number LM4925MM
NS Package Number MUB10A
LD Package
Order Number LM4925LD
NS Package Number LDA10A
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14
Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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