概述
规格参数
数据手册
替代型号LMC6042AIM 概述
CMOS Dual Micropower Operational Amplifier CMOS双路微功耗运算放大器 运算放大器
LMC6042AIM 规格参数
| 是否Rohs认证： | 不符合 | 生命周期： | Transferred |
| 零件包装代码： | SOIC | 包装说明： | SOIC-8 |
| 针数： | 8 | Reach Compliance Code： | not_compliant |
| ECCN代码： | EAR99 | HTS代码： | 8542.33.00.01 |
| 风险等级： | 5.08 | 放大器类型： | OPERATIONAL AMPLIFIER |
| 架构： | VOLTAGE-FEEDBACK | 最小共模抑制比： | 68 dB |
| 标称共模抑制比： | 75 dB | 频率补偿： | YES |
| 最大输入失调电压： | 3000 µV | JESD-30 代码： | R-PDSO-G8 |
| JESD-609代码： | e0 | 长度： | 4.9 mm |
| 低-偏置： | YES | 低-失调： | NO |
| 微功率： | YES | 湿度敏感等级： | 1 |
| 负供电电压上限： | 标称负供电电压 (Vsup)： | ||
| 功能数量： | 2 | 端子数量： | 8 |
| 最高工作温度： | 85 °C | 最低工作温度： | -40 °C |
| 封装主体材料： | PLASTIC/EPOXY | 封装代码： | SOP |
| 封装等效代码： | SOP8,.25 | 封装形状： | RECTANGULAR |
| 封装形式： | SMALL OUTLINE | 包装方法： | RAIL |
| 峰值回流温度（摄氏度）： | 235 | 电源： | 5/15 V |
| 认证状态： | Not Qualified | 座面最大高度： | 1.75 mm |
| 最小摆率： | 0.015 V/us | 标称压摆率： | 0.02 V/us |
| 子类别： | Operational Amplifiers | 最大压摆率： | 51 mA |
| 供电电压上限： | 16 V | 标称供电电压 (Vsup)： | 5 V |
| 表面贴装： | YES | 技术： | CMOS |
| 温度等级： | INDUSTRIAL | 端子面层： | Tin/Lead (Sn/Pb) |
| 端子形式： | GULL WING | 端子节距： | 1.27 mm |
| 端子位置： | DUAL | 处于峰值回流温度下的最长时间： | 30 |
| 标称均一增益带宽： | 100 kHz | 最小电压增益： | 100000 |
| 宽度： | 3.9 mm | Base Number Matches： | 1 |
LMC6042AIM 数据手册
通过下载LMC6042AIM数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载August 1999
LMC6042
CMOS Dual Micropower Operational Amplifier
General Description
Features
n Low supply current: 10 µA/Amp (typ)
n Operates from 4.5V to 15V single supply
n Ultra low input current: 2 fA (typ)
n Rail-to-rail output swing
Ultra-low power consumption and low input-leakage current
are the hallmarks of the LMC6042. Providing input currents
of only 2 fA typical, the LMC6042 can operate from a single
supply, has output swing extending to each supply rail, and
an input voltage range that includes ground.
n Input common-mode range includes ground
The LMC6042 is ideal for use in systems requiring ultra-low
power consumption. In addition, the insensitivity to latch-up,
high output drive, and output swing to ground without requir-
ing external pull-down resistors make it ideal for
single-supply battery-powered systems.
Applications
n Battery monitoring and power conditioning
n Photodiode and infrared detector preamplifier
n Silicon based transducer systems
n Hand-held analytic instruments
Other applications for the LMC6042 include bar code reader
amplifiers, magnetic and electric field detectors, and
hand-held electrometers.
n pH probe buffer amplifier
n Fire and smoke detection systems
n Charge amplifier for piezoelectric transducers
This device is built with National’s advanced Double-Poly
Silicon-Gate CMOS process.
See the LMC6041 for a single, and the LMC6044 for a quad
amplifier with these features.
Connection Diagram
8-Pin DIP/SO
DS011137-1
Ordering Information
Temperature
Range
Package
NSC
Transport
Media
Industrial
Drawing
−40˚C to +85˚C
8-Pin
LMC6042AIM
M08A
N08E
Rail
Tape and Reel
Rail
Small Outline LMC6042IM
8-Pin
LMC6042AIN
LMC6042IN
Molded DIP
© 1999 National Semiconductor Corporation
DS011137
www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature Range
Junction Temperature (Note 3)
ESD Tolerance (Note 4)
−65˚C to +150˚C
110˚C
500V
Voltage at Input/Output Pin
(V+) + 0.3V, (V−) − 0.3V
±
Differential Input Voltage
Supply Voltage (V+ − V−)
Output Short Circuit to V+
Output Short Circuit to V−
Lead Temperature
Supply Voltage
16V
Operating Ratings
Temperature Range
LMC6042AI, LMC6042I
Supply Voltage
(Note 12)
(Note 2)
−40˚C ≤ TJ ≤ +85˚C
4.5V ≤ V+ ≤ 15.5V
(Note 10)
(Soldering, 10 seconds)
Current at Input Pin
260˚C
Power Dissipation
Thermal Resistance (θJA), (Note 11)
8-Pin DIP
±
5 mA
±
Current at Output Pin
Current at Power Supply Pin
Power Dissipation
18 mA
35 mA
101˚C/W
165˚C/W
8-Pin SO
(Note 3)
Electrical Characteristics
+
=
=
=
Unless otherwise spec ified, all limits guaranteed for TA TJ 25˚C. Boldface limits apply at the temperature extremes. V
+
5V, V− 0V, VCM 1.5V, VO V /2 and RL 1M unless otherwise specified.
Typical LMC6042AI LMC6042I
=
=
=
>
Units
Symbol
Parameter
Conditions
(Note 5)
Limit
(Note 6)
3
Limit
(Note 6)
6
(Limit)
VOS
Input Offset Voltage
1
mV
Max
3.3
6.3
TCVOS
Input Offset Voltage
Average Drift
1.3
µV/˚C
IB
Input Bias Current
Input Offset Current
Input Resistance
Common Mode
0.002
0.001
4
2
4
2
pA (Max)
pA (Max)
TeraΩ
dB
IOS
>
10
75
RIN
CMRR
0V ≤ VCM ≤ 12.0V
68
66
62
60
V+ 15V
Min
=
Rejection Ratio
+PSRR
−PSRR
CMR
Positive Power Supply
Rejection Ratio
5V ≤ V+ ≤ 15V
75
94
68
62
dB
=
VO 2.5V
66
60
Min
Negative Power Supply
Rejection Ratio
0V ≤ V− ≤ −10V
84
74
dB
=
VO 2.5V
83
73
Min
V+ 5V and 15V
−0.4
V+−1.9V
1000
500
−0.1
0
−0.1
0
V
=
Input Common-Mode
Voltage Range
For CMRR ≥ 50 dB
Max
V
V+− 2.3V
V+− 2.5V
400
300
180
120
200
160
100
60
V+− 2.3V
V+− 2.4V
300
200
90
Min
=
AV
Large Signal
Voltage Gain
RL 100 kΩ (Note 7)
Sourcing
Sinking
V/mV
Min
V/mV
Min
70
=
RL 25 kΩ (Note 7)
Sourcing
Sinking
1000
250
100
80
V/mV
Min
50
V/mV
Min
40
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2
Electrical Characteristics (Continued)
+
=
=
=
Unless otherwise spec ified, all limits guaranteed for TA TJ 25˚C. Boldface limits apply at the temperature extremes. V
+
5V, V− 0V, VCM 1.5V, VO V /2 and RL 1M unless otherwise specified.
=
=
=
>
Typical LMC6042AI LMC6042I
Units
Symbol
Parameter
Output Swing
Conditions
(Note 5)
4.987
0.004
4.980
0.010
14.970
0.007
14.950
0.022
22
Limit
(Note 6)
4.970
4.950
0.030
0.050
4.920
4.870
0.080
0.130
14.920
14.880
0.030
0.050
14.900
14.850
0.100
0.150
16
Limit
(Note 6)
4.940
4.910
0.060
0.090
4.870
4.820
0.130
0.180
14.880
14.820
0.060
0.090
14.850
14.800
0.150
0.200
13
(Limit)
V+ 5V
V
Min
V
=
VO
+
=
RL 100 kΩ to V /2
Max
V
V+ 5V
=
+
=
RL 25 kΩ to V /2
Min
V
Max
V
V+ 15V
=
+
=
RL 100 kΩ to V /2
Min
V
Max
V
V+ 15V
=
+
=
RL 25 kΩ to V /2
Min
V
Max
mA
Min
mA
Min
mA
Min
mA
Min
µA
=
Sourcing, VO 0V
ISC
ISC
IS
Output Current
V+ 5V
10
8
=
=
Sinking, VO 5V
21
16
13
8
8
=
Output Current
Sourcing, VO 0V
40
15
15
V+ 15V
10
10
=
=
Sinking, VO 13V
39
24
21
(Note 12)
8
8
Supply Current
Both Amplifiers
20
34
45
=
VO 1.5V
39
50
Max
µA
Both Amplifiers
26
44
56
V+ 15V
51
65
Max
=
AC Electrical Characteristics
+
=
=
=
Unless otherwise specified, all limits guaranteed for TA TJ 25˚C. Boldface limits apply at the temperature extremes. V
+
5V, V− 0V, VCM 1.5V, VO V /2 and RL 1M unless otherwise specified.
Typ
=
=
=
>
LMC6042AI
Limit
LMC6042I
Limit
Units
Symbol
Parameter
Conditions
(Note 8)
(Note 5)
(Limit)
(Note 6)
0.015
(Note 6)
0.010
SR
Slew Rate
0.02
V/µs
Min
kHz
Deg
dB
0.010
0.007
GBW
Gain-Bandwidth Product
Phase Margin
100
60
φm
Amp-to-Amp Isolation
(Note 9)
115
83
=
en
Input-Referred
Voltage Noise
f
1 kHz
=
in
Input-Referred
Current Noise
f
1 kHz
0.0002
3
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AC Electrical Characteristics (Continued)
+
=
=
=
Unless otherwise specified, all limits guaranteed for TA TJ 25˚C. Boldface limits apply at the temperature extremes. V
+
5V, V− 0V, VCM 1.5V, VO V /2 and RL 1M unless otherwise specified.
=
=
=
>
Typ
LMC6042AI
Limit
LMC6042I
Limit
Units
Symbol
Parameter
Conditions
(Note 5)
0.01
(Limit)
(Note 6)
(Note 6)
= =
1 kHz, AV −5
T.H.D.
Total Harmonic Distortion
f
=
=
RL 100 kΩ, VO 2 VPP
%
±
5V Supply
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Conditions indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed.
Note 2: Applies to both single-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed
±
junction temperature of 110˚C. Output currents in excess of 30 mA over long term may adversely affect reliability.
=
Note 3: The maximum power dissipation is a function of T , θ , and T . The maximum allowable power dissipation at any ambient temperature is P
(T
J(Max)
J(Max) JA
A
D
− T )/θ
.
JA
A
Note 4: Human body model, 1.5 kΩ in series with 100 pF.
Note 5: Typical values represent the most likely parametric norm.
Note 6: All limits are guaranteed at room temperature (standard type face) or at operating temperature extremes (bold face type).
+
=
=
=
7.5V and R connected to 7.5V. For Sourcing tests, 7.5V ≤ V ≤ 11.5V. For Sinking tests, 2.5V ≤ V ≤ 7.5V.
Note 7:
Note 8:
V
V
15V, V
CM
L
O
O
+
15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
+
+
=
=
=
12 V
O PP
Note 9: Input referred V
15V and R
100 kΩ connected to V /2. Each amp excited in turn with 100 Hz to produce V
.
L
=
Note 10: For operating at elevated temperatures the device must be derated based on the thermal resistance θ with P
(T − T )/θ .
J A JA
JA
D
Note 11: All numbers apply for packages soldered directly into a PC board.
+
+
Note 12: Do not connect output to V when V is greater than 13V or reliability may be adversely affected.
=
=
±
Typical Performance Characteristics VS
7.5V, TA 25˚C unless otherwise specified
Supply Current vs
Supply Voltage
Offset Voltage vs
Temperature of Five
Representative Units
Input Bias Current
vs Temperature
DS011137-19
DS011137-21
DS011137-20
Input Bias Current
vs Input Common-Mode
Voltage
Input Common-Mode
Voltage Range
vs Temperature
Output Characteristics
Current Sinking
DS011137-22
DS011137-24
DS011137-23
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4
=
=
±
Typical Performance Characteristics VS
7.5V, TA 25˚C unless otherwise specified (Continued)
Output Characteristics
Current Sourcing
Input Voltage Noise
vs Frequency
Crosstalk Rejection
vs Frequency
DS011137-25
DS011137-26
DS011137-27
CMRR vs Frequency
CMRR vs Temperature
Power Supply Rejection
Ratio vs Frequency
DS011137-29
DS011137-28
DS011137-30
Open-Loop Voltage
Gain vs Temperature
Open-Loop
Frequency Response
Gain and Phase
Responses vs
Load Capacitance
DS011137-31
DS011137-32
DS011137-33
5
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=
=
±
Typical Performance Characteristics VS
7.5V, TA 25˚C unless otherwise specified (Continued)
Gain and Phase
Response vs
Temperature
Gain Error
(VOS vs VOUT
Common-Mode Error vs
Common-Mode Voltage of
3 Representative Units
)
DS011137-35
DS011137-34
DS011137-36
Non-Inverting Slew
Rate vs Temperature
Inverting Slew Rate
vs Temperature
Non-Inverting Large
Signal Pulse Response
=
(AV +1)
DS011137-37
DS011137-38
DS011137-39
Non-Inverting Small
Signal Pulse Response
Inverting Large-Signal
Pulse Response
Inverting Small Signal
Pulse Response
DS011137-41
DS011137-40
DS011137-42
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6
=
=
7.5V, TA 25˚C unless otherwise specified (Continued)
±
Typical Performance Characteristics VS
Stability vs Capacitive Load
Stability vs Capacitive Load
DS011137-43
DS011137-44
Applications Hints
AMPLIFIER TOPOLOGY
The effect of input capacitance can be compensated for by
adding a capacitor. Place a capacitor, Cf, around the feed-
back resistor (as in Figure 1 ) such that:
The LMC6042 incorporates a novel op-amp design topology
that enables it to maintain rail-to-rail output swing even when
driving a large load. Instead of relying on a push-pull unity
gain output buffer stage, the output stage is taken directly
from the internal integrator, which provides both low output
impedance and large gain. Special feed-forward compensa-
tion design techniques are incorporated to maintain stability
over a wider range of operating conditions than traditional
micropower op-amps. These features make the LMC6042
both easier to design with, and provide higher speed than
products typically found in this ultra-low power class.
or
R1 CIN ≤ R2 Cf
Since it is often difficult to know the exact value of CIN, Cf can
be experimentally adjusted so that the desired pulse re-
sponse is achieved. Refer to the LMC660 and the LMC662
for a more detailed discussion on compensating for input ca-
pacitance.
COMPENSATING FOR INPUT CAPACITANCE
It is quite common to use large values of feedback resis-
tance with amplifiers with ultra-low input curent, like the
LMC6042.
CAPACITIVE LOAD TOLERANCE
Direct capacitive loading will reduce the phase margin of
many op-amps. A pole in the feedback loop is created by the
combination of the op-amp’s output impedance and the ca-
pacitive load. This pole induces phase lag at the unity-gain
crossover frequency of the amplifier resulting in either an os-
cillatory or underdamped pulse response. With a few exter-
nal components, op amps can easily indirectly drive capaci-
tive loads, as shown in Figure 2.
Although the LMC6042 is highly stable over a wide range of
operating conditions, certain precautions must be met to
achieve the desired pulse response when a large feedback
resistor is used. Large feedback resistors and even small
values of input capacitance, due to transducers, photo-
diodes, and circuit board parasitics, reduce phase margins.
When high input impedances are demanded, guarding of the
LMC6042 is suggested. Guarding input lines will not only re-
duce leakage, but lowers stray input capacitance as well.
(See Printed-Circuit-Board Layout for High Impedance
Work).
DS011137-6
DS011137-5
FIGURE 2. LMC6042 Noninverting Gain of 10 Amplifier,
Compensated to Handle Capacitive Loads
FIGURE 1. Cancelling the Effect of Input Capacitance
In the circuit of Figure 2, R1 and C1 serve to counteract the
loss of phase margin by feeding the high frequency compo-
7
www.national.com
Applications Hints (Continued)
nent of the output signal back to the amplifier’s inverting in-
put, thereby preserving phase margin in the overall feedback
loop.
Capacitive load driving capability is enhanced by using a
pull up resistor to V+ (Figure 3). Typically a pull up resistor
conducting 10 µA or more will significantly improve capaci-
tive load responses. The value of the pull up resistor must be
determined based on the current sinking capability of the
amplifier with respect to the desired output swing. Open loop
gain of the amplifier can also be affected by the pull up resis-
tor (see Electrical Characteristics).
DS011137-18
DS011137-7
FIGURE 3. Compensating for Large
Capacitive Loads with a Pull Up Resistor
FIGURE 4. Example of Guard Ring
in P.C. Board Layout
PRINTED-CIRCUIT-BOARD LAYOUT FOR
HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC6042, typically less
than 2 fA, it is essential to have an excellent layout. Fortu-
nately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
DS011137-8
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6042’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals etc. connected to the op-amp’s inputs, as in Figure
4. To have a significant effect, guard rings should be placed
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 1012Ω, which is nor-
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 100 times degradation from the LMC6042’s
actual performance. However, if a guard ring is held within 5
mV of the inputs, then even a resistance of 1011Ω would
cause only 0.05 pA of leakage current. See Figure 5 for typi-
cal connections of guard rings for standard op-amp
configurations.
Inverting Amplifier
DS011137-10
Non-Inverting Amplifier
DS011137-9
Follower
FIGURE 5. Typical Connections of Guard Rings
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8
probes, analytic medical instruments, magnetic field detec-
tors, gas detectors, and silicon based pressure transducers.
Applications Hints (Continued)
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an in-
sulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board con-
struction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring. See Figure
6.
The circuit in Figure 7 is recommended for applications
where the common-mode input range is relatively low and
the differential gain will be in the range of 10 to 1000. This
two op-amp instrumentation amplifier features an indepen-
dent adjustment of the gain and common-mode rejection
trim, and a total quiescent supply current of less than 20 µA.
To maintain ultra-high input impedance, it is advisable to use
ground rings and consider PC board layout an important part
of the overall system design (see Printed-Circuit-Board Lay-
out for High Impedance Work). Referring to Figure 7, the in-
put voltages are represented as a common-mode input VCM
plus a differential input VD.
Rejection of the common-mode component of the input is
accomplished by making the ratio of R1/R2 equal to R3/R4.
So that where,
A suggested design guideline is to minimize the difference of
value between R1 through R4. This will often result in im-
proved resistor tempco, amplifier gain, and CMRR over tem-
DS011137-11
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board.)
=
=
=
=
perature. If RN R1 R2 R3 R4 then the gain equation
can be simplified:
FIGURE 6. Air Wiring
Typical Single-Supply Applications
(V+ 5.0 VDC
)
=
The extremely high input impedance, and low power con-
sumption, of the LMC6042 make it ideal for applications that
require battery-powered instrumentation amplifiers. Ex-
amples of these types of applications are hand-held pH
Due to the “zero-in, zero-out” performance of the LMC6042,
and output swing rail-rail, the dynamic range is only limited to
the input common-mode range of 0V to VS − 2.3V, worst
case at room temperature. This feature of the LMC6042
makes it an ideal choice for low-power instrumentation sys-
tems.
A complete instrumentation amplifier designed for a gain of
100 is shown in Figure 8. Provisions have been made for low
sensitivity trimming of CMRR and gain.
DS011137-12
FIGURE 7. Two Op-Amp Instrumentation Amplifier
9
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Typical Single-Supply Applications (V+ 5.0 VDC) (Continued)
=
DS011137-13
FIGURE 8. Low-Power Two-Op-Amp
Instrumentation Amplifier
DS011137-14
FIGURE 9. Low-Leakage Sample and Hold
DS011137-15
FIGURE 10. Instrumentation Amplifier
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10
Typical Single-Supply Applications (V+ 5.0 VDC) (Continued)
=
DS011137-16
FIGURE 11. 1 Hz Square Wave Oscillator
DS011137-17
FIGURE 12. AC Coupled Power Amplifier
11
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Physical Dimensions inches (millimeters) unless otherwise noted
8-Pin Small Outline Package
Order Number LMC6042AIM or LMC6042IM
NS Package Number M08A
8-Pin Molded Dual-In-Line Package
Order Number LMC6042AIN or LMC6042IN
NS Package Number N08E
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12
Notes
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
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Tel: 1-800-272-9959
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LMC6042AIM 替代型号
| 型号 | 制造商 | 描述 | 替代类型 | 文档 |
| LMC6482AIM | NSC | CMOS Dual Rail-To-Rail Input and Output Operational Amplifier | 功能相似 |
|
LMC6042AIM 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| LMC6042AIM/NOPB | NSC | IC DUAL OP-AMP, 3000 uV OFFSET-MAX, 0.1 MHz BAND WIDTH, PDSO8, SOIC-8, Operational Amplifier | 获取价格 |
|
| LMC6042AIM/NOPB | TI | CMOS Dual Micropower Operational Amplifier | 获取价格 |
|
| LMC6042AIMX | TI | LMC6042 CMOS Dual Micropower Operational Amplifier | 获取价格 |
|
| LMC6042AIMX/NOPB | TI | CMOS Dual Micropower Operational Amplifier 8-SOIC -40 to 85 | 获取价格 |
|
| LMC6042AIN | NSC | CMOS Dual Micropower Operational Amplifier | 获取价格 |
|
| LMC6042AIN | TI | LMC6042 CMOS Dual Micropower Operational Amplifier | 获取价格 |
|
| LMC6042AIN/NOPB | TI | CMOS Dual Micropower Operational Amplifier 8-PDIP -40 to 85 | 获取价格 |
|
| LMC6042IM | NSC | CMOS Dual Micropower Operational Amplifier | 获取价格 |
|
| LMC6042IM | TI | LMC6042 CMOS Dual Micropower Operational Amplifier | 获取价格 |
|
| LMC6042IM/NOPB | TI | CMOS Dual Micropower Operational Amplifier | 获取价格 |
|
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