LMC660_00 [NSC]
CMOS Quad Operational Amplifier; CMOS四路运算放大器
| 型号： | LMC660_00 |
| 厂家： | 
National Semiconductor |
| 描述： | CMOS Quad Operational Amplifier |
| 文件： | 总12页 (文件大小：442K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 2000
LMC660
CMOS Quad Operational Amplifier
n Ultra low input bias current: 2 fA
General Description
n Input common-mode range includes V−
n Operating range from +5V to +15V supply
n ISS = 375 µA/amplifier; independent of V+
n Low distortion: 0.01% at 10 kHz
n Slew rate: 1.1 V/µs
The LMC660 CMOS Quad operational amplifier is ideal for
operation from a single supply. It operates from +5V to +15V
and features rail-to-rail output swing in addition to an input
common-mode range that includes ground. Performance
limitations that have plagued CMOS amplifiers in the past
are not a problem with this design. Input VOS, drift, and
broadband noise as well as voltage gain into realistic loads
(2 kΩ and 600Ω) are all equal to or better than widely ac-
cepted bipolar equivalents.
n Available in extended temperature range (−40˚C to
+125˚C); ideal for automotive applications
n Available to Standard Military Drawing specification
This chip is built with National’s advanced Double-Poly
Silicon-Gate CMOS process.
Applications
n High-impedance buffer or preamplifier
n Precision current-to-voltage converter
n Long-term integrator
See the LMC662 datasheet for a dual CMOS operational
amplifier with these same features.
n Sample-and-Hold circuit
n Peak detector
n Medical instrumentation
n Industrial controls
Features
n Rail-to-rail output swing
n Specified for 2 kΩ and 600Ω loads
n High voltage gain: 126 dB
n Low input offset voltage: 3 mV
n Low offset voltage drift: 1.3 µV/˚C
n Automotive sensors
Connection Diagram
14-Pin DIP/SO
LMC660 Circuit Topology (Each Amplifier)
DS008767-4
DS008767-1
© 2000 National Semiconductor Corporation
DS008767
www.national.com
Absolute Maximum Ratings (Note 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Power Dissipation
(Note 2)
150˚C
Junction Temperature
ESD tolerance (Note 8)
1000V
Operating Ratings
Temperature Range
LMC660AI
±
Differential Input Voltage
Supply Voltage
Output Short Circuit to V+
Output Short Circuit to V−
Lead Temperature
Supply Voltage
16V
(Note 12)
(Note 1)
−40˚C ≤ TJ ≤ +85˚C
0˚C ≤ TJ ≤ +70˚C
4.75V to 15.5V
(Note 10)
LMC660C
Supply Voltage Range
Power Dissipation
Thermal Resistance (θJA) (Note 11)
14-Pin Molded DIP
14-Pin SO
(Soldering, 10 sec.)
260˚C
Storage Temp. Range
Voltage at Input/Output Pins
Current at Output Pin
Current at Input Pin
−65˚C to +150˚C
(V+) + 0.3V, (V−) − 0.3V
85˚C/W
±
18 mA
115˚C/W
±
5 mA
35 mA
Current at Power Supply Pin
DC Electrical Characteristics
5V, V− = 0V, VCM = 1.5V, VO = 2.5V and RL 1M unless otherwise specified.
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+
=
>
Parameter
Conditions
Typ
(Note 4)
LMC660AI
LMC660C
Units
Limit
(Note 4)
3
Limit
(Note 4)
6
Input Offset Voltage
1
mV
max
3.3
6.3
Input Offset Voltage
Average Drift
1.3
µV/˚C
Input Bias Current
0.002
0.001
pA
max
pA
4
2
2
1
Input Offset Current
max
TeraΩ
dB
>
Input Resistance
Common Mode
1
0V ≤ VCM ≤ 12.0V
V+ = 15V
5V ≤ V+ ≤ 15V
83
70
68
63
62
Rejection Ratio
min
dB
Positive Power Supply
Rejection Ratio
83
70
63
VO = 2.5V
0V ≤ V− ≤ −10V
68
62
min
dB
Negative Power Supply
Rejection Ratio
94
84
74
83
73
min
V
Input Common-Mode
Voltage Range
V+ = 5V & 15V
−0.4
V+ − 1.9
2000
500
−0.1
0
−0.1
0
For CMRR ≥ 50 dB
max
V
V+ − 2.3
V+ − 2.5
440
400
180
120
220
200
100
60
V+ − 2.3
V+ − 2.4
300
200
90
min
V/mV
min
V/mV
min
V/mV
min
V/mV
min
Large Signal
Voltage Gain
RL = 2 kΩ (Note 5)
Sourcing
Sinking
80
RL = 600Ω (Note 5)
Sourcing
1000
250
150
100
50
Sinking
40
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2
DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+
=
5V, V− = 0V, VCM = 1.5V, VO = 2.5V and RL 1M unless otherwise specified.
>
Parameter
Conditions
Typ
(Note 4)
LMC660AI
LMC660C
Units
Limit
(Note 4)
4.82
4.79
0.15
0.17
4.41
4.31
0.50
0.56
14.50
14.44
0.35
0.40
13.35
13.15
1.16
1.32
16
Limit
(Note 4)
4.78
4.76
0.19
0.21
4.27
4.21
0.63
0.69
14.37
14.32
0.44
0.48
12.92
12.76
1.45
1.58
13
Output Swing
V+ = 5V
RL = 2 kΩ to V+/2
4.87
0.10
4.61
0.30
14.63
0.26
13.90
0.79
22
V
min
V
max
V
V+ = 5V
RL = 600Ω to V+/2
min
V
max
V
V+ = 15V
RL = 2 kΩ to V+/2
min
V
max
V
V+ = 15V
RL = 600Ω to V+/2
min
V
max
mA
min
mA
min
mA
min
mA
min
mA
max
Output Current
V+ = 5V
Sourcing, VO = 0V
Sinking, VO = 5V
Sourcing, VO = 0V
14
11
21
16
13
14
11
Output Current
V+ = 15V
40
28
23
25
21
Sinking, VO = 13V
(Note 12)
39
28
23
24
20
Supply Current
All Four Amplifiers
VO = 1.5V
1.5
2.2
2.7
2.6
2.9
AC Electrical Characteristics
5V, V− = 0V, VCM = 1.5V, VO = 2.5V and RL 1M unless otherwise specified.
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+
=
>
Parameter
Conditions
Typ
(Note 4)
LMC660AI
LMC660C
Units
Limit
(Note 4)
0.8
Limit
(Note 4)
0.8
Slew Rate
(Note 6)
1.1
V/µs
min
MHz
Deg
dB
0.6
0.7
Gain-Bandwidth Product
Phase Margin
1.4
50
Gain Margin
17
Amp-to-Amp Isolation
Input Referred Voltage Noise
(Note 7)
130
22
dB
F = 1 kHz
Input Referred Current Noise
F = 1 kHz
0.0002
3
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AC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+
=
5V, V− = 0V, VCM = 1.5V, VO = 2.5V and RL 1M unless otherwise specified.
>
Parameter
Conditions
Typ
(Note 4)
LMC660AI
LMC660C
Units
Limit
Limit
(Note 4)
(Note 4)
Total Harmonic Distortion
F = 10 kHz,
AV = −10
0.01
%
RL = 2 kΩ,
VO = 8 VPP
V+ = 15V
Note 1: Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature and/or multiple Op Amp shorts
±
can result in exceeding the maximum allowed junction temperature of 150˚C. Output currents in excess of 30 mA over long term may adversely affect reliability.
Note 2: The maximum power dissipation is a function of T , θ , and T . The maximum allowable power dissipation at any ambient temperature is P = (T
J(max)
J(max) JA
A
D
− T )/θ
.
JA
A
Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in-
tended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed.
Note 4: Typical values represent the most likely parametric norm. Limits are guaranteed by testing or correlation.
+
Note 5: V = 15V, V
= 7.5V and R connected to 7.5V. For Sourcing tests, 7.5V ≤ V ≤ 11.5V. For Sinking tests, 2.5V ≤ V ≤ 7.5V.
L O O
CM
+
Note 6: V = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
+
+
Note 7: Input referred. V = 15V and R = 10 kΩ connected to V /2. Each amp excited in turn with 1 kHz to produce V = 13 V
.
L
O
PP
Note 8: Human body model, 1.5 kΩ in series with 100 pF.
Note 9: A military RETS electrical test specification is available on request. At the time of printing, the LMC660AMJ/883 RETS spec complied fully with the boldface
limits in this column. The LMC660AMJ/883 may also be procured to a Standard Military Drawing specification.
Note 10: For operating at elevated temperatures the device must be derated based on the thermal resistance θ with P = (T − T )/θ .
JA
JA
D
J
A
Note 11: All numbers apply for packages soldered directly into a PC board.
+
+
Note 12: Do not connect output to V when V is greater than 13V or reliability may be adversely affected.
±
Typical Performance Characteristics VS
=
7.5V, TA = 25˚C unless otherwise specified
Supply Current
Offset Voltage
vs Supply Voltage
Input Bias Current
DS008767-25
DS008767-26
DS008767-24
Output Characteristics
Current Sinking
Output Characteristics
Current Sourcing
Input Voltage Noise
vs Frequency
DS008767-27
DS008767-28
DS008767-29
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±
Typical Performance Characteristics VS
=
7.5V, TA = 25˚C unless otherwise specified (Continued)
CMRR vs Frequency
Open-Loop Frequency
Response
Frequency Response
vs Capacitive Load
DS008767-30
DS008767-31
DS008767-32
Non-Inverting Large Signal
Pulse Response
Stability vs
Capacitive Load
Stability vs
Capacitive Load
DS008767-33
DS008767-34
DS008767-35
Note: Avoid resistive loads of less than 500Ω, as they may cause instability.
Application Hints
Amplifier Topology
The topology chosen for the LMC660, shown in Figure 1, is
unconventional (compared to general-purpose op amps) in
that the traditional unity-gain buffer output stage is not used;
instead, the output is taken directly from the output of the in-
tegrator, to allow rail-to-rail output swing. Since the buffer
traditionally delivers the power to the load, while maintaining
high op amp gain and stability, and must withstand shorts to
either rail, these tasks now fall to the integrator.
As a result of these demands, the integrator is a compound
affair with an embedded gain stage that is doubly fed forward
(via Cf and Cff) by a dedicated unity-gain compensation
driver. In addition, the output portion of the integrator is a
push-pull configuration for delivering heavy loads. While
sinking current the whole amplifier path consists of three
gain stages with one stage fed forward, whereas while
sourcing the path contains four gain stages with two fed
forward.
DS008767-4
FIGURE 1. LMC660 Circuit Topology (Each Amplifier)
The large signal voltage gain while sourcing is comparable
to traditional bipolar op amps, even with a 600Ω load. The
gain while sinking is higher than most CMOS op amps, due
to the additional gain stage; however, under heavy load
(600Ω) the gain will be reduced as indicated in the Electrical
Characteristics.
Compensating Input Capacitance
The high input resistance of the LMC660 op amps allows the
use of large feedback and source resistor values without los-
ing gain accuracy due to loading. However, the circuit will be
especially sensitive to its layout when these large-value re-
sistors are used.
5
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Application Hints (Continued)
Every amplifier has some capacitance between each input
and AC ground, and also some differential capacitance be-
tween the inputs. When the feedback network around an
amplifier is resistive, this input capacitance (along with any
additional capacitance due to circuit board traces, the
socket, etc.) and the feedback resistors create a pole in the
feedback path. In the following General Operational Amplifier
circuit, Figure 2 the frequency of this pole is
the feedback capacitor should be:
Note that these capacitor values are usually significant
smaller than those given by the older, more conservative for-
mula:
where CS is the total capacitance at the inverting input, in-
cluding amplifier input capcitance and any stray capacitance
from the IC socket (if one is used), circuit board traces, etc.,
and RP is the parallel combination of RF and RIN. This for-
mula, as well as all formulae derived below, apply to invert-
ing and non-inverting op-amp configurations.
When the feedback resistors are smaller than a few kΩ, the
frequency of the feedback pole will be quite high, since CS is
generally less than 10 pF. If the frequency of the feedback
pole is much higher than the “ideal” closed-loop bandwidth
(the nominal closed-loop bandwidth in the absence of CS),
the pole will have a negligible effect on stability, as it will add
only a small amount of phase shift.
DS008767-6
However, if the feedback pole is less than approximately 6 to
10 times the “ideal” −3 dB frequency, a feedback capacitor,
CF, should be connected between the output and the invert-
ing input of the op amp. This condition can also be stated in
terms of the amplifier’s low-frequency noise gain: To main-
tain stability a feedback capacitor will probably be needed if
C
consists of the amplifier’s input capacitance plus any stray capacitance
S
from the circuit board and socket. C compensates for the pole caused by
F
C
and the feedback resistors.
S
FIGURE 2. General Operational Amplifier Circuit
Using the smaller capacitors will give much higher band-
width with little degradation of transient response. It may be
necessary in any of the above cases to use a somewhat
larger feedback capacitor to allow for unexpected stray ca-
pacitance, or to tolerate additional phase shifts in the loop, or
excessive capacitive load, or to decrease the noise or band-
width, or simply because the particular circuit implementa-
tion needs more feedback capacitance to be sufficiently
stable. For example, a printed circuit board’s stray capaci-
tance may be larger or smaller than the breadboard’s, so the
actual optimum value for CF may be different from the one
estimated using the breadboard. In most cases, the values
of CF should be checked on the actual circuit, starting with
the computed value.
where
is the amplifier’s low-frequency noise gain and GBW is the
amplifier’s gain bandwidth product. An amplifier’s low-
frequency noise gain is represented by the formula
Capacitive Load Tolerance
Like many other op amps, the LMC660 may oscillate when
its applied load appears capacitive. The threshold of oscilla-
tion varies both with load and circuit gain. The configuration
most sensitive to oscillation is a unity-gain follower. See
Typical Performance Characteristics.
regardless of whether the amplifier is being used in inverting
or non-inverting mode. Note that a feedback capacitor is
more likely to be needed when the noise gain is low and/or
the feedback resistor is large.
The load capacitance interacts with the op amp’s output re-
sistance to create an additional pole. If this pole frequency is
sufficiently low, it will degrade the op amp’s phase margin so
that the amplifier is no longer stable at low gains. As shown
in Figure 3, the addition of a small resistor (50Ω to 100Ω) in
series with the op amp’s output, and a capacitor (5 pF to
10 pF) from inverting input to output pins, returns the phase
margin to a safe value without interfering with lower-
frequency circuit operation. Thus larger values of capaci-
tance can be tolerated without oscillation. Note that in all
cases, the output will ring heavily when the load capacitance
is near the threshold for oscillation.
If the above condition is met (indicating a feedback capacitor
will probably be needed), and the noise gain is large enough
that:
the following value of feedback capacitor is recommended:
If
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6
rings for standard op-amp configurations. If both inputs are
active and at high impedance, the guard can be tied to
ground and still provide some protection; see Figure 6d.
Application Hints (Continued)
DS008767-5
FIGURE 3. Rx, Cx Improve Capacitive Load Tolerance
Capacitive load driving capability is enhanced by using a pull
up resistor to V+ (Figure 4). Typically a pull up resistor con-
ducting 500 µA or more will significantly improve capacitive
load responses. The value of the pull up resistor must be de-
termined based on the current sinking capability of the ampli-
fier with respect to the desired output swing. Open loop gain
of the amplifier can also be affected by the pull up resistor
(see Electrical Characteristics).
DS008767-16
FIGURE 5. Example, using the LMC660,
of Guard Ring in P.C. Board Layout
DS008767-23
FIGURE 4. Compensating for Large Capacitive Loads
with a Pull Up Resistor
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC662, typically less
than 0.04 pA, it is essential to have an excellent layout. For-
tunately, the techniques for obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC660’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs. See Figure
5. To have a significant effect, guard rings should be placed
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 1012Ω, which is nor-
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of an input. This
would cause a 100 times degradation from the LMC660’s ac-
tual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 1011Ω would
cause only 0.05 pA of leakage current, or perhaps a minor
(2:1) degradation of the amplifier’s performance. See Figure
6a, Figure 6b, Figure 6c for typical connections of guard
7
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Application Hints (Continued)
DS008767-21
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board.)
DS008767-17
FIGURE 7. Air Wiring
(a) Inverting Amplifier
BIAS CURRENT TESTING
The test method of Figure 8 is appropriate for bench-testing
bias current with reasonable accuracy. To understand its op-
eration, first close switch S2 momentarily. When S2 is
opened, then
DS008767-18
(b) Non-Inverting Amplifier
DS008767-19
(c) Follower
DS008767-22
FIGURE 8. Simple Input Bias Current Test Circuit
A suitable capacitor for C2 would be a 5 pF or 10 pF silver
mica, NPO ceramic, or air-dielectric. When determining the
magnitude of Ib−, the leakage of the capacitor and socket
must be taken into account. Switch S2 should be left shorted
most of the time, or else the dielectric absorption of the ca-
pacitor C2 could cause errors.
DS008767-20
(d) Howland Current Pump
FIGURE 6. Guard Ring Connections
Similarly, if S1 is shorted momentarily (while leaving S2
shorted)
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an in-
sulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board con-
struction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring. See Figure
7.
where Cx is the stray capacitance at the + input.
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8
Typical Single-Supply Applications (V+ = 5.0 VDC)
Additional single-supply applications ideas can be found in
the LM324 datasheet. The LMC660 is pin-for-pin compatible
with the LM324 and offers greater bandwidth and input resis-
tance over the LM324. These features will improve the per-
formance of many existing single-supply applications. Note,
however, that the supply voltage range of the LMC660 is
smaller than that of the LM324.
Sine-Wave Oscillator
Low-Leakage Sample-and-Hold
DS008767-7
DS008767-9
Instrumentation Amplifier
Oscillator frequency is determined by R1, R2, C1, and C2:
fosc = 1/2πRC, where R = R1 = R2 and
C = C1 = C2.
This circuit, as shown, oscillates at 2.0 kHz with a peak-to-
peak output swing of 4.5V.
1 Hz Square-Wave Oscillator
DS008767-8
If R1 = R5, R3 = R6, and R4 = R7; then
DS008767-10
AV ≈100 for circuit shown.
Power Amplifier
For good CMRR over temperature, low drift resistors should
be used. Matching of R3 to R6 and R4 to R7 affect CMRR.
Gain may be adjusted through R2. CMRR may be adjusted
through R7.
DS008767-11
9
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Typical Single-Supply Applications
1 Hz Low-Pass Filter
(Maximally Flat, Dual Supply Only)
(V+ = 5.0 VDC) (Continued)
10 Hz Bandpass Filter
DS008767-14
f
= 1 Hz
c
DS008767-12
d = 1.414
Gain = 1.57
f
= 10 Hz
O
Q = 2.1
Gain = −8.8
High Gain Amplifier with Offset
Voltage Reduction
10 Hz High-Pass Filter
DS008767-13
f
= 10 Hz
c
d = 0.895
Gain = 1
2 dB passband ripple
DS008767-15
Gain = −46.8
Output offset voltage reduced to the level of the input offset voltage of the
bottom amplifier (typically 1 mV).
Ordering Information
Package
Temperature Range
NSC
Transport
Media
Drawing
Industrial
Commercial
0˚C to +70˚C
LMC660CM
LMC660CMX
LMC660CN
−40˚C to +85˚C
LMC660AIM
LMC660AIMX
LMC660AIN
14-Pin
M14A
N14A
Rail
Tape and Reel
Rail
Small Outline
14-Pin
Molded DIP
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10
Physical Dimensions inches (millimeters) unless otherwise noted
Small Outline Dual-In-Line Pkg. (M)
Order Number LMC660AIM, LMC660CM or LMC660AIMX
NS Package Number M14A
Molded Dual-In-Line Pkg. (N)
Order Number LMC660AIN, LMC660CN or LMC660CNX
NS Package Number N14A
11
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