LMF100AJ/883 [NSC]
IC DUAL SWITCHED CAPACITOR FILTER, RESISTOR PROGRAMMABLE, UNIVERSAL, CDIP20, CERAMIC, DIP-20, Active Filter;
| 型号： | LMF100AJ/883 |
| 厂家： | 
National Semiconductor |
| 描述： | IC DUAL SWITCHED CAPACITOR FILTER, RESISTOR PROGRAMMABLE, UNIVERSAL, CDIP20, CERAMIC, DIP-20, Active Filter LTE CD 有源滤波器 |
| 文件： | 总4页 (文件大小：20K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MILITARY DATA SHEET
Original Creation Date: 08/21/95
Last Update Date: 08/21/95
MNLMF100A-X REV 0AL
Last Major Revision Date: 08/21/95
HIGH PERFORMANCE DUAL SWITCHED CAPACITOR FILTER
Industry Part Number
NS Part Numbers
LMF100A
LMF100AE/883
LMF100AJ/883
Prime Die
LMF100A
Processing
Subgrp Description
Temp (oC)
MIL-STD-883, Method 5004
1
Static tests at
+25
2
Static tests at
+125
-55
3
Static tests at
4
Dynamic tests at
Dynamic tests at
Dynamic tests at
Functional tests at
Functional tests at
Functional tests at
Switching tests at
Switching tests at
Switching tests at
+25
Quality Conformance Inspection
5
+125
-55
6
MIL-STD-883, Method 5005
7
+25
8A
8B
9
+125
-55
+25
10
11
+125
-55
1
MILITARY DATA SHEET
MNLMF100A-X REV 0AL
Electrical Characteristics
DC PARAMETERS
(The following conditions apply to all the following parameters, unless otherwise specified.)
DC: Mode = 1, Q = 10 (R1 = R3 = 100k, R2 = 10k)
PIN-
NAME
SUB-
SYMBOL
Is+
PARAMETER
CONDITIONS
NOTES
MIN
-13
MAX UNIT
GROUPS
Supply Current
fCLK = 250KHz No Input Signal
1, 2
13
mA
uA
1, 2,
3
Iin
Input Current On
Pins 4-6, 9-12,
16, 17
2
-10
10
1, 2,
3
Vos1
DC Offset Voltage fCLK = 250KHz (Sab = V+) A & B
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 3
1, 3
1, 3
1, 3
1, 3
1, 3
1, 3
-15
-15
-80
-70
-60
-60
-12
-15
-15
-60
-60
-30
-30
15
15
80
70
60
60
12
15
15
60
60
30
30
mV
mV
mV
mV
mV
mV
mA
mV
mV
mV
mV
mV
mV
1, 2,
3
fCLK = 250kHz (Sab = V-) A & B
1, 2,
3
Vos2
Vos3
DC Offset Voltage fCLK = 250kHz (Sab = V+) A & B
fCLK = 250kHz (Sab = V-) A & B
1, 2,
3
1, 2,
3
DC Offset Voltage fCLK = 250KHz (Sab = V+) A & B
fCLK = 250KHz (Sab = V-) A & B
1, 2,
3
1, 2,
3
Is+
Supply Current
fCLK = 250KHz No Input Signal
1, 2,
3
Vos1
DC Offset Voltage fCLK = 250KHz (Sab = V+) A & B
fCLK = 250KHz (Sab = V-) A & B
1, 2,
3
1, 2,
3
Vos2
Vos3
DC Offset Voltage fCLK = 250KHz (Sab = V+) A & B
fCLK = 250KHz (Sab = V-) A & B
1, 2,
3
1, 2,
3
DC Offset Voltage fCLK = 250KHz (Sab = V+) A & B
fCLK = 250KHz (Sab = V-) A & B
1, 2,
3
1, 2,
3
2
MILITARY DATA SHEET
MNLMF100A-X REV 0AL
Electrical Characteristics
AC PARAMETERS
(The following conditions apply to all the following parameters, unless otherwise specified.)
AC: Mode = 1, Q = 10 (R1 = R3 = 100K, R2 = 10K) fCLK = 1MHz
PIN-
NAME
SUB-
GROUPS
SYMBOL
PARAMETER
CONDITIONS
NOTES
MIN
MAX UNIT
fCLK/fo
Clock to Center
Frequency Ratio
Deviation
VPIN12 = 5V or 0V (Ratio 50:1) Filter
A & B
2
-0.7
0.7
%
%
%
%
%
%
%
%
7, 8A,
8B
VPIN12 = 5V or 0V (Ratio 100:1) Filter
A & B
2
2
2
3
3
3
3
-0.7
-6
0.7
6
7, 8A,
8B
Delta Q/Q
fCLK/fo
Q Error
VPIN12 = 5V or 0V (Ratio 50:1) Filter
A & B
7, 8A,
8B
VPIN12 = 5V or 0V (Ratio 100:1) Filter
A & B
-6
6
7, 8A,
8B
Clock to Center
Frequency Ratio
Deviation
VPIN12 = 5V or 0V (Ratio 50:1) Filter
A & B
-0.9
-0.9
-7
0.9
0.9
7
7, 8A,
8B
VPIN12 = 5V or 0V (Ratio 100:1) Filter
A & B
7, 8A,
8B
Delta Q/Q Q Error
VPIN12 = 5V or 0V (Ratio 50:1) Filter
A & B
7, 8A,
8B
VPIN12 = 5V or 0V (Ratio 100:1) Filter
A & B
-7
7
7, 8A,
8B
DC: LOGIC INPUT PARAMETERS
(The following conditions apply to all the following parameters, unless otherwise specified.)
DC: V+ = +5V, V- = -5V, VLsh = 0V
CMOS Clock Input (Logical "1" & "0")
Voltage
2, 4
2, 4
2, 4
2, 4
2, 4
2, 4
2, 4
3
-3
V
V
V
V
V
V
V
1, 2,
3
V+ = +10V, V- = 0V, VLsh = 5V
(Logical "1" & "0")
8
2
1, 2,
3
V+ = +2.5V, V- = -2.5V
(Logical "1" & "0")
1.5
4
-1.5
1
1, 2,
3
V+ = +5V, V- = -5V, VLsh = +2.5V
(Logical "1" & "0")
1, 2,
3
TTL Clock Input
Voltage
(Logical "1" & "0")
2
0.8
0.8
0.8
1, 2,
3
V+ = +10V, V- = 0V
(Logical "1" & "0")
2
1, 2,
3
V+ = +5V, V- = 0V, Vd+ = 0V
(Logical "1" & "0")
2
1, 2,
3
3
MILITARY DATA SHEET
MNLMF100A-X REV 0AL
Electrical Characteristics
AC: PARAMETERS
(The following conditions apply to all the following parameters, unless otherwise specified.)
AC: Mode = 1, Q = 10, (R1 = R3 = 100K, R2 = 10K)
PIN-
NAME
SUB-
SYMBOL
Vout
PARAMETER
CONDITIONS
Rl = 5K All Outputs
R1 = R2 = 10K, fCLK = 250KHz, A & B
NOTES
MIN
MAX UNIT
GROUPS
Output Voltage
Swing
2
-3.7
3.7
V
4, 5,
6
HOLP
HOBP
DC Low Passgain
2
2
2
3
3
3
3
-0.3
-0.5
-0.5
-1.4
-0.3
-0.6
-0.6
0.3
0.5
0.5
1.4
0.3
0.6
0.6
dB
dB
dB
V
4, 5,
6
Bandpass Gain at Ratio 50:1, Filter A & B
fo
4, 5,
6
Ratio 100:1, Filter A & B
4, 5,
6
Vout
HOLP
HOBP
Output Voltage
Swing
Rl = 5K All Outputs
4, 5,
6
DC Low Passgain
R1 = R2 = 10K, fCLK = 2500KHZ, A & B
dB
dB
dB
4, 5,
6
Bandpass Gain at Ratio 50:1, Filter A & B
fo
4, 5,
6
Ratio 100:1, Filter A & B
4, 5,
6
Note 1: 1st Test is ratio 100:1; 2nd Test is ratio 50:1.
Note 2: V+ = +5V, V- = -5V.
Note 3: V+ = +2.5V, V- = -2.5V.
Note 4: Functional test, go-no-go. The limits shown are used for conditions and tested to Min
= 0.85V, Max = 1.15V limits.
4
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