LMV221 [NSC]

50 MHz to 3.5 GHz 40 dB Logarithmic Power Detector for; 50 MHz至3.5 GHz的40分贝对数功率检测器
LMV221
型号: LMV221
厂家: National Semiconductor    National Semiconductor
描述:

50 MHz to 3.5 GHz 40 dB Logarithmic Power Detector for
50 MHz至3.5 GHz的40分贝对数功率检测器

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中文:  中文翻译
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December 2006  
LMV221  
50 MHz to 3.5 GHz 40 dB Logarithmic Power Detector for  
CDMA and WCDMA  
General Description  
Features  
The LMV221 is a 40 dB RF power detector intended for use  
in CDMA and WCDMA applications. The device has an RF  
frequency range from 50 MHz to 3.5 GHz. It provides an ac-  
curate temperature and supply compensated output voltage  
that relates linearly to the RF input power in dBm. The circuit  
operates with a single supply from 2.7V to 3.3V.  
40 dB linear in dB power detection range  
Output voltage range 0.3 to 2V  
Shutdown  
Multi-band operation from 50 MHz to 3.5 GHz  
0.5 dB accurate temperature compensation  
External configurable output filter bandwidth  
The LMV221 has an RF power detection range from −45 dBm  
to −5 dBm and is ideally suited for direct use in combination  
with a 30 dB directional coupler. Additional low-pass filtering  
of the output signal can be realized by means of an external  
resistor and capacitor. Figure (a) shows a detector with an  
additional output low pass filter. The filter frequency is set with  
RS and CS.  
2.2 mm x 2.5 mm x 0.8 mm LLP 6 package  
Applications  
UMTS/CDMA/WCDMA RF power control  
GSM/GPRS RF power control  
Figure (b) shows a detector with an additional feedback low  
pass filter. Resistor RP is optional and will lower the Trans  
impedance gain (RTRANS). The filter frequency is set with  
PA modules  
IEEE 802.11b, g (WLAN)  
CP//CTRANS and RP//RTRANS  
.
The device is active for Enable = High, otherwise it is in a low  
power consumption shutdown mode. To save power and pre-  
vent discharge of an external filter capacitance, the output  
(OUT) is high-impedance during shutdown.  
The LMV221 power detector is offered in the small 2.2 mm x  
2.5 mm x 0.8 mm LLP package.  
Typical Application  
(a) LMV221 with output RC Low Pass Filter  
(b) LMV221 with feedback (R)C Low Pass Filter  
20173771  
20173704  
© 2007 National Semiconductor Corporation  
201737  
www.national.com  
Junction Temperature  
(Note 3)  
Maximum Lead Temperature  
(Soldering,10 sec)  
Absolute Maximum Ratings (Note 1)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
150°C  
260°C  
Supply Voltage  
VDD - GND  
RF Input  
Input power  
DC Voltage  
Enable Input Voltage  
ESD Tolerance (Note 2)  
Human Body Model  
Machine Model  
Operating Ratings (Note 1)  
3.6V  
Supply Voltage  
2.7V to 3.3V  
−40°C to +85°C  
50 MHz to 3.5 GHz  
−45 dBm to −5 dBm  
−58 dBV to −18 dBV  
Temperature Range  
RF Frequency Range  
RF Input Power Range (Note 5)  
10 dBm  
400 mV  
VSS - 0.4V < V EN < VDD + 0.4V  
Package Thermal Resistance θJA  
(Note 3)  
2000V  
200V  
86.6°C/W  
Charge Device Model  
2000V  
Storage Temperature  
Range  
−65°C to 150°C  
2.7 V DC and AC Electrical Characteristics  
Unless otherwise specified, all limits are guaranteed to; TA = 25°C, VDD = 2.7V, RF input frequency f = 1855 MHz CW (Continuous  
Wave, unmodulated). Boldface limits apply at the temperature extremes (Note 4).  
Symbol  
Parameter  
Condition  
Min  
Typ  
Max  
Units  
(Note 6)  
(Note 7)  
(Note 6)  
Supply Interface  
IDD  
Supply Current  
Active mode: EN = High, no Signal  
present at RFIN.  
6.5  
5
7.2  
0.5  
8.5  
10  
mA  
Shutdown: EN = Low, no Signal present  
at RFIN.  
3
4
μA  
EN = Low: PIN = 0 dBm (Note 8)  
10  
Logic Enable Interface  
VLOW  
EN Logic Low Input Level  
(Shutdown mode)  
0.6  
V
VHIGH  
IEN  
EN Logic High Input Level  
Current into EN Pin  
1.1  
V
1
μA  
RF Input Interface  
RIN  
Input Resistance  
40  
47.1  
60  
Output Interface  
VOUT  
Output Voltage Swing  
From Positive Rail, Sourcing,  
VREF = 0V, IOUT = 1 mA  
16  
14  
40  
50  
mV  
From Negative Rail, Sinking,  
VREF = 2.7V, IOUT = 1 mA  
40  
50  
IOUT  
Output Short Circuit Current  
Small Signal Bandwidth  
Sourcing, VREF = 0V, VOUT = 2.6V  
3
2.7  
5.4  
5.7  
450  
42.7  
4.1  
4.2  
0.6  
mA  
Sinking, VREF = 2.7V, VOUT = 0.1V  
3
2.7  
BW  
No RF input signal. Measured from REF  
input current to VOUT  
kHz  
RTRANS  
SR  
Output Amp Transimpedance  
Gain  
No RF Input Signal, from IREF to VOUT  
,
35  
55  
kΩ  
DC  
Slew Rate  
Positive, VREF from 2.7V to 0V  
3
2.7  
V/µs  
Negative, VREF from 0V to 2.7V  
3
2.7  
ROUT  
Output Impedance  
(Note 8)  
No RF Input Signal, EN = High. DC  
measurement  
5
6
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2
Symbol  
Parameter  
Condition  
Min  
Typ  
Max  
Units  
(Note 6)  
(Note 7)  
(Note 6)  
IOUT,SD  
Output Leakage Current in  
Shutdown mode  
EN = Low, VOUT = 2.0V  
21  
300  
500  
nA  
RF Detector Transfer  
VOUT,MAX  
Maximum Output Voltage  
PIN= −5 dBm  
(Note 8)  
f = 50 MHz  
1.67  
1.67  
1.53  
1.42  
1.33  
1.21  
1.76  
1.75  
1.61  
1.49  
1.40  
1.28  
250  
1.83  
1.82  
1.68  
1.57  
1.48  
1.36  
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
No input Signal  
V
VOUT,MIN  
ΔVOUT,MIN  
ΔVOUT  
Minimum Output Voltage  
(Pedestal)  
175  
142  
350  
388  
mV  
mV  
Pedestal Variation over  
temperature  
No Input Signal, Relative to 25°C  
−20  
20  
Output Voltage Range  
PIN from −45 dBm to −5 dBm  
(Note 8)  
f = 50 MHz  
1.37  
1.34  
1.24  
1.14  
1.07  
0.96  
39  
1.44  
1.40  
1.30  
1.20  
1.12  
1.01  
40.5  
38.5  
35.7  
33.8  
32.5  
31.9  
−49.4  
−52.8  
−51.7  
−50  
1.52  
1.47  
1.37  
1.30  
1.20  
1.09  
42  
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
f = 50 MHz  
V
KSLOPE  
Logarithmic Slope  
(Note 8)  
f = 900 MHz  
36.7  
34.4  
32.6  
31  
40  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
f = 50 MHz  
37.1  
35.2  
34  
mV/dB  
30  
33.5  
−48.3  
−51.6  
−50.2  
−48.3  
−46.6  
−44.1  
PINT  
Logarithmic Intercept  
(Note 8)  
−50.4  
−54.1  
−53.2  
−51.8  
−51.1  
−49.6  
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
No signal at PIN, Low-High transition  
EN. VOUT to 90%  
dBm  
−48.9  
−46.8  
8
tON  
Turn-on Time  
(Note 8)  
10  
12  
µs  
µs  
tR  
Rise Time (Note 9)  
PIN = No signal to 0 dBm, VOUT from 10%  
to 90%  
2
2
12  
tF  
Fall Time (Note 9)  
PIN = 0 dBm to no signal, VOUT from 90%  
to 10%  
12  
µs  
en  
Output Referred Noise  
(Note 9)  
PIN = −10 dBm, at 10 kHz  
1.5  
100  
60  
µV/  
vN  
Output referred Noise  
(Note 8)  
Integrated over frequency band  
1 kHz - 6.5 kHz  
150  
µVRMS  
dB  
PSRR  
Power Supply Rejection Ratio  
(Note 9)  
PIN = −10 dBm, f = 1800 MHz  
55  
3
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Symbol  
Parameter  
Condition  
Min  
Typ  
Max  
Units  
(Note 6)  
(Note 7)  
(Note 6)  
Power Measurement Performance  
ELC  
Log Conformance Error  
(Note 8)  
f = 50 MHz  
−0.60  
−1.10  
0.53  
0.46  
0.48  
0.51  
0.56  
0.84  
0.56  
1.3  
−40 dBm PIN −10 dBm  
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
−0.70  
−1.24  
0.37  
1.1  
−0.40  
−1.1  
0.24  
1.1  
dB  
−0.43  
−1.0  
0.56  
1.1  
−0.87  
−1.2  
1.34  
1.6  
−1.73  
2.72  
−2.0  
2.7  
EVOT  
E1 dB  
E10 dB  
ST  
Variation over Temperature  
(Note 8)  
f = 50 MHz  
−1.1  
−1.0  
0.4  
0.38  
0.44  
0.48  
0.5  
1.4  
1.27  
1.31  
1.15  
0.98  
0.85  
0.069  
0.056  
0.069  
0.084  
0.092  
0.10  
0.57  
0.58  
0.72  
0.75  
0.77  
0.74  
1
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
f = 50 MHz  
−40 dBm PIN −10 dBm  
−1.1  
dB  
dB  
−1.1  
−1.2  
–1.2  
0.62  
Measurement Error for a 1 dB  
input power step (Note 8)  
−0.06  
−0.056  
−0.069  
−0.084  
−0.092  
−0.10  
−0.65  
−0.75  
−0.88  
−0.86  
−0.85  
−0.76  
−15  
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
−40 dBm PIN −10 dBm  
Measurement Error for a 10 dB f = 50 MHz  
input power step (Note 8)  
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
f = 50 MHz  
−40 dBm PIN −10 dBm  
dB  
Temperature Sensitivity  
−7  
−40°C < TA < 25°C (Note 8)  
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
f = 50 MHz  
−13.4  
−14.1  
−13.4  
−11.7  
−10.5  
−12.3  
−13.1  
−14.7  
−15.9  
−18  
−6  
1.5  
−40 dBm PIN −10 dBm  
−5.9  
−4.1  
−1.8  
0.5  
2.3  
mdB/°C  
mdB/°C  
mdB/°C  
5.2  
8
1.2  
ST  
Temperature Sensitivity  
25°C < TA < 85°C (Note 8)  
−6.7  
−6.7  
−7.1  
−7.6  
−8.5  
−9.5  
−8.3  
−6  
−1.1  
−0.2  
0.42  
0.63  
1
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
f = 50 MHz  
−40 dBm PIN −10 dBm  
−21.2  
−15.8  
−14.2  
−14.9  
−14.5  
−13  
2.5  
ST  
Temperature Sensitivity  
−40°C < TA < 25°C, (Note 8)  
PIN = −10 dBm  
−0.75  
2.2  
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
−7.4  
−6.6  
−4.9  
−3.4  
2
1.3  
3.3  
−12  
5.3  
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4
Symbol  
ST  
Parameter  
Condition  
Min  
(Note 6)  
Typ  
(Note 7)  
Max  
(Note 6)  
Units  
Temperature Sensitivity  
25°C < TA < 85°C, (Note 8)  
PIN = −10 dBm  
f = 50 MHz  
−12.4  
−13.7  
−14.6  
−15.2  
−16.5  
−18.1  
−8.85  
−9.3  
−8.9  
−9.4  
−5.3  
−5  
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
f = 50 MHz  
−10  
−5.6  
−6.5  
−7.9  
−9  
mdB/°C  
−10.8  
−12.2  
−13.5  
−5.9  
PMAX  
PMIN  
DR  
Maximum Input Power for  
ELC = 1 dB(Note 8)  
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
f = 50 MHz  
−6.1  
−8.3  
−5.5  
dBm  
dBm  
dB  
−6  
−4.2  
−5.4  
−3.7  
−7.2  
−2.7  
Minimum Input Power for  
ELC = 1 dB (Note 8)  
−40.3  
−44.2  
−42.9  
−40.4  
−38.4  
−35.3  
34.5  
−38.9  
−42.9  
−41.2  
−38.6  
−35.8  
−31.9  
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
f = 50 MHz  
Dynamic Range for ELC = 1 dB  
(Note 8)  
31.5  
34.4  
34  
f = 900 MHz  
f = 1855 MHz  
f = 2500 MHz  
f = 3000 MHz  
f = 3500 MHz  
38.1  
37.4  
33.8  
32.4  
26.2  
36.1  
34.8  
32.7  
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is  
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.  
Note 2: Human body model, applicable std. MIL-STD-883, Method 3015.7. Machine model, applicable std. JESD22–A115–A (ESD MM std of JEDEC). Field-  
Induced Charge-Device Model, applicable std. JESD22–C101–C. (ESD FICDM std. of JEDEC)  
Note 3: The maximum power dissipation is a function of TJ(MAX) , θJA. The maximum allowable power dissipation at any ambient temperature is  
PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly into a PC board.  
Note 4: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating  
of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where  
TJ > TA.  
Note 5: Power in dBV = dBm + 13 when the impedance is 50Ω.  
Note 6: All limits are guaranteed by design or statistical analysis.  
Note 7: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will  
also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.  
Note 8: All limits are guaranteed by design and measurements which are performed on a limited number of samples. Limits represent the mean ±3–sigma values.  
The typical value represents the statistical mean value.  
Note 9: This parameter is guaranteed by design and/or characterization and is not tested in production.  
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Connection Diagram  
6-pin LLP  
20173702  
Top View  
Pin Descriptions  
LLP6  
Name  
Description  
Power Supply  
Logic Input  
1
3
4
VDD  
GND  
EN  
Positive Supply Voltage  
Power Ground  
The device is enabled for EN = High, and brought to a low-power shutdown mode for  
EN = Low.  
Analog Input  
Output  
2
5
RFIN  
REF  
RF input signal to the detector, internally terminated with 50 Ω.  
Reference output, for differential output measurement (without pedestal). Connected to  
inverting input of output amplifier.  
6
OUT  
GND  
Ground referenced detector output voltage (linear in dB)  
Ground (needs to be connected)  
DAP  
Ordering Information  
Package  
Part Number  
Package  
Marking  
Transport Media  
NSC Drawing  
Status  
LMV221SD  
1k Units Tape and Reel  
4.5k Units Tape and Reel  
LLP-6  
A96  
SDB06A  
Released  
LMV221SDX  
Block Diagram  
20173703  
LMV221  
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6
Typical Performance Characteristics Unless otherwise specified, VDD = 2.7V,  
TA = 25°C, measured on a limited number of samples.  
Supply Current vs. Supply Voltage  
Supply Current vs. Enable Voltage  
20173705  
20173708  
Output Voltage vs. RF input Power  
Log Slope vs. Frequency  
20173712  
20173746  
Log Intercept vs. Frequency  
Output Voltage vs. Frequency  
20173749  
20173713  
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Mean Output Voltage and Log Conformance Error vs.  
RF Input Power at 50 MHz  
Mean Output Voltage and Log Conformance Error vs.  
RF Input Power at 900 MHz  
20173714  
20173716  
Mean Output Voltage and Log Conformance Error vs.  
RF Input Power at 1855 MHz  
Mean Output Voltage and Log Conformance Error vs.  
RF Input Power at 2500 MHz  
20173715  
20173717  
Mean Output Voltage and Log Conformance Error vs.  
RF Input Power at 3000 MHz  
Mean Output Voltage and Log Conformance Error vs.  
RF Input Power at 3500 MHz  
20173718  
20173719  
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8
Log Conformance Error (Mean ±3 sigma) vs.  
RF Input Power at 50 MHz  
Log Conformance Error (Mean ±3 sigma) vs.  
RF Input Power at 900 MHz  
20173762  
20173763  
Log Conformance Error (Mean ±3 sigma) vs.  
RF Input Power at 1855 MHz  
Log Conformance Error (Mean ±3 sigma) vs.  
RF Input Power at 2500 MHz  
20173764  
20173768  
Log Conformance Error (Mean ±3 sigma) vs.  
RF Input Power at 3000 MHz  
Log Conformance Error (Mean ±3 sigma) vs.  
RF Input Power at 3500 MHz  
20173769  
20173767  
9
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Mean Temperature Drift Error vs.  
RF Input Power at 50 MHz  
Mean Temperature Drift Error vs.  
RF Input Power at 900 MHz  
20173720  
20173721  
Mean Temperature Drift Error vs.  
RF Input Power at 1855 MHz  
Mean Temperature Drift Error vs.  
RF Input Power at 2500 MHz  
20173722  
20173723  
Mean Temperature Drift Error vs.  
RF Input Power at 3000 MHz  
Mean Temperature Drift Error vs.  
RF Input Power at 3500 MHz  
20173724  
20173725  
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10  
Temperature Drift Error (Mean ±3 sigma) vs.  
RF Input Power at 50 MHz  
Temperature Drift Error (Mean ±3 sigma) vs.  
RF Input Power at 900 MHz  
20173750  
20173751  
Temperature Drift Error (Mean ±3 sigma) vs.  
RF Input Power at 1855 MHz  
Temperature Drift Error (Mean ±3 sigma) vs.  
RF Input Power at 2500 MHz  
20173752  
20173753  
Temperature Drift Error (Mean ±3 sigma) vs.  
RF Input Power at 3000 MHz  
Temperature Drift Error (Mean ±3 sigma) vs.  
RF Input Power at 3500 MHz  
20173754  
20173755  
11  
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Error for 1 dB Input Power Step vs.  
RF Input Power at 50 MHz  
Error for 1 dB Input Power Step vs.  
RF Input Power at 900 MHz  
20173727  
20173726  
Error for 1 dB Input Power Step vs.  
RF Input Power at 1855 MHz  
Error for 1 dB Input Power Step vs.  
RF Input Power at 2500 MHz  
20173729  
20173728  
Error for 1 dB Input Power Step vs.  
RF Input Power at 3000 MHz  
Error for 1 dB Input Power Step vs.  
RF Input Power at 3500 MHz  
20173730  
20173731  
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12  
Error for 10 dB Input Power Step vs.  
RF Input Power at 50 MHz  
Error for 10 dB Input Power Step vs.  
RF Input Power at 900 MHz  
20173733  
20173732  
Error for 10 dB Input Power Step vs.  
RF Input Power at 1855 MHz  
Error for 10 dB Input Power Step vs.  
RF Input Power at 2500 MHz  
20173734  
20173735  
Error for 10 dB Input Power Step vs.  
RF Input Power at 3000 MHz  
Error for 10 dB Input Power Step vs.  
RF Input Power at 3500 MHz  
20173736  
20173737  
13  
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Mean Temperature Sensitivity vs.  
RF Input Power at 50 MHz  
Mean Temperature Sensitivity vs.  
RF Input Power at 900 MHz  
20173738  
20173740  
20173742  
20173739  
Mean Temperature Sensitivity vs.  
RF Input Power at 1855 MHz  
Mean Temperature Sensitivity vs.  
RF Input Power at 2500 MHz  
20173741  
Mean Temperature Sensitivity vs.  
RF Input Power at 3000 MHz  
Mean Temperature Sensitivity vs.  
RF Input Power at 3500 MHz  
20173743  
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14  
Temperature Sensitivity (Mean ±3 sigma) vs.  
RF Input Power at 50 MHz  
Temperature Sensitivity (Mean ±3 sigma) vs.  
RF Input Power at 900 MHz  
20173756  
20173757  
Temperature Sensitivity (Mean ±3 sigma) vs.  
RF Input Power at 1855 MHz  
Temperature Sensitivity (Mean ±3 sigma) vs.  
RF Input Power at 2500 MHz  
20173758  
20173759  
Temperature Sensitivity (Mean ±3 sigma) vs.  
RF Input Power at 3000 MHz  
Temperature Sensitivity (Mean ±3 sigma) vs.  
RF Input Power at 3500 MHz  
20173760  
20173761  
15  
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Output Voltage and Log Conformance Error vs.  
Output Voltage and Log Conformance Error vs.  
RF Input Power for various modulation types at 900 MHz RF Input Power for various modulation types at 1855 MHz  
20173772  
20173773  
RF Input Impedance vs. Frequency  
(Resistance & Reactance)  
Output Noise Spectrum vs. Frequency  
20173745  
20173748  
Power Supply Rejection Ratio vs. Frequency  
Output Amplifier Gain & Phase vs. Frequency  
20173747  
20173707  
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16  
Sourcing Output Current vs. Output Voltage  
Sinking Output Current vs. Output Voltage  
20173709  
20173710  
Output Voltage vs. Sourcing Current  
Output Voltage vs. Sinking Current  
20173711  
20173706  
17  
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duces the accuracy of the power measurement, because  
most applications are calibrated at room temperature. In such  
systems, the temperature drift significantly contributes to the  
overall system power measurement error. The temperature  
stability of the transfer function differs for the various types of  
power detectors. Generally, power detectors that contain only  
one or few semiconductor devices (diodes, transistors) oper-  
ating at RF frequencies attain the best temperature stability.  
Application Notes  
The LMV221 is a versatile logarithmic RF power detector  
suitable for use in power measurement systems. The  
LMV221 is particularly well suited for CDMA and UMTS ap-  
plications. It produces a DC voltage that is a measure for the  
applied RF power.  
This application section describes the behavior of the  
LMV221 and explains how accurate measurements can be  
performed. Besides this an overview is given of the interfacing  
options with the connected circuitry as well as the recom-  
mended layout for the LMV221.  
The dynamic range of a power detector is the input power  
range for which it creates an accurately reproducible output  
signal. What is considered accurate is determined by the ap-  
plied criterion for the detector accuracy; the detector dynamic  
range is thus always associated with certain power measure-  
ment accuracy. This accuracy is usually expressed as the  
deviation of its transfer function from a certain predefined re-  
lationship, such as ”linear in dB" for LOG detectors and  
”square-law" transfer (from input RF voltage to DC output  
voltage) for Mean-Square detectors. For LOG-detectors, the  
dynamic range is often specified as the power range for which  
its transfer function follows the ideal linear-in-dB relationship  
with an error smaller than or equal to ±1 dB. Again, the at-  
tainable dynamic range differs considerably for the various  
types of power detectors.  
1. FUNCTIONALITY AND APPLICATION OF RF POWER  
DETECTORS  
This first section describes the functional behavior of RF pow-  
er detectors and their typical application. Based on a number  
of key electrical characteristics of RF power detectors, section  
1.1 discusses the functionality of RF power detectors in gen-  
eral and of the LMV221 LOG detector in particular. Subse-  
quently, section 1.2 describes two important applications of  
the LMV221 detector.  
1.1 Functionality of RF Power Detectors  
According to its definition, the average power is a metric for  
the average energy content of a signal and is not directly a  
function of the shape of the signal in time. In other words, the  
power contained in a 0 dBm sine wave is identical to the pow-  
er contained in a 0 dBm square wave or a 0 dBm WCDMA  
signal; all these signals have the same average power. De-  
pending on the internal detection mechanism, though, power  
detectors may produce a slightly different output signal in re-  
sponse to the aforementioned waveforms, even though their  
average power level is the same. This is due to the fact that  
not all power detectors strictly implement the definition for-  
mula for signal power, being the mean of the square of the  
signal. Most types of detectors perform some mixture of peak  
detection and average power detection. A waveform inde-  
pendent detector response is often desired in applications  
that exhibit a large variety of waveforms, such that separate  
calibration for each waveform becomes impractical.  
An RF power detector is a device that produces a DC output  
voltage in response to the RF power level of the signal applied  
to its input. A wide variety of power detectors can be distin-  
guished, each having certain properties that suit a particular  
application. This section provides an overview of the key  
characteristics of power detectors, and discusses the most  
important types of power detectors. The functional behavior  
of the LMV221 is discussed in detail.  
1.1.1 Key Characteristics of RF Power Detectors.  
Power detectors are used to accurately measure the power  
of a signal inside the application. The attainable accuracy of  
the measurement is therefore dependent upon the accuracy  
and predictability of the detector transfer function from the RF  
input power to the DC output voltage.  
Certain key characteristics determine the accuracy of RF de-  
tectors and they are classified accordingly:  
The shape of the detector transfer function from the RF input  
power to the DC output voltage determines the required res-  
olution of the ADC connected to it. The overall power mea-  
surement error is the combination of the error introduced by  
the detector, and the quantization error contributed by the  
ADC. The impact of the quantization error on the overall  
transfer's accuracy is highly dependent on the detector trans-  
fer shape, as illustrated in Figure 1.  
Temperature Stability  
Dynamic Range  
Waveform Dependency  
Transfer Shape  
Each of these aspects is discussed in further detail below.  
Generally, the transfer function of RF power detectors is  
slightly temperature dependent. This temperature drift re-  
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20173766  
(a)  
(b)  
FIGURE 1. Convex Detector Transfer Function (a) and Linear Transfer Function (b)  
Figure 1 shows two different representations of the detector  
transfer function. In both graphs the input power along the  
horizontal axis is displayed in dBm, since most applications  
specify power accuracy requirements in dBm (or dB). The  
figure on the left shows a convex detector transfer function,  
while the transfer function on the right hand side is linear (in  
dB). The slope of the detector transfer function — i.e. the de-  
tector conversion gain – is of key importance for the impact  
of the quantization error on the total measurement error. If the  
detector transfer function slope is low, a change, ΔP, in the  
input power results only in a small change of the detector out-  
put voltage, such that the quantization error will be relatively  
large. On the other hand, if the detector transfer function slope  
is high, the output voltage change for the same input power  
change will be large, such that the quantization error is small.  
The transfer function on the left has a very low slope at low  
input power levels, resulting in a relatively large quantization  
error. Therefore, to achieve accurate power measurement in  
this region, a high-resolution ADC is required. On the other  
hand, for high input power levels the quantization error will be  
very small due to the steep slope of the curve in this region.  
For accurate power measurement in this region, a much lower  
ADC resolution is sufficient. The curve on the right has a con-  
stant slope over the power range of interest, such that the  
required ADC resolution for a certain measurement accuracy  
is constant. For this reason, the LOG-linear curve on the right  
will generally lead to the lowest ADC resolution requirements  
for certain power measurement accuracy.  
a rectified current. This unidirectional current charges the ca-  
pacitor. The RC time constant of the resistor and the capacitor  
determines the amount of filtering applied to the rectified (de-  
tected) signal.  
20173774  
FIGURE 2. Diode Detector  
The advantages and disadvantages can be summarized as  
follows:  
The temperature stability of the diode detectors is  
generally very good, since they contain only one  
semiconductor device that operates at RF frequencies.  
The dynamic range of diode detectors is poor. The  
conversion gain from the RF input power to the output  
voltage quickly drops to very low levels when the input  
power decreases. Typically a dynamic range of 20 – 25 dB  
can be realized with this type of detector.  
The response of diode detectors is waveform dependent.  
As a consequence of this dependency its output voltage  
for e.g. a 0 dBm WCDMA signal is different than for a  
0 dBm unmodulated carrier. This is due to the fact that the  
diode measures peak power instead of average power.  
The relation between peak power and average power is  
dependent on the wave shape.  
1.1.2 Types of RF Power Detectors  
Three different detector types are distinguished based on the  
four characteristics previously discussed:  
Diode Detector  
(Root) Mean Square Detector  
Logarithmic Detector  
The transfer shape of diode detectors puts high  
requirements on the resolution of the ADC that reads their  
output voltage. Especially at low input power levels a very  
high ADC resolution is required to achieve sufficient power  
measurement accuracy (See Figure 1, left side).  
These three types of detectors are discussed in the following  
sections. Advantages and disadvantages will be presented  
for each type.  
(Root) Mean Square Detector  
This type of detector is particularly suited for the power mea-  
surements of RF modulated signals that exhibits large peak  
to average power ratio variations. This is because its opera-  
Diode Detector  
A diode is one of the simplest types of RF detectors. As de-  
picted in Figure 2, the diode converts the RF input voltage into  
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tion is based on direct determination of the average power  
and not – like the diode detector – of the peak power.  
1.2.1 Transmit Power Control Loop  
The key benefit of a transmit power control loop circuit is that  
it makes the transmit power insensitive to changes in the  
Power Amplifier (PA) gain control function, such as changes  
due to temperature drift. When a control loop is used, the  
transfer function of the PA is eliminated from the overall trans-  
fer function. Instead, the overall transfer function is deter-  
mined by the power detector. The overall transfer function  
accuracy depends thus on the RF detector accuracy. The  
LMV221 is especially suited for this application, due to the  
accurate temperature stability of its transfer function.  
The advantages and disadvantages can be summarized as  
follows:  
The temperature stability of (R)MS detectors is almost as  
good as the temperature stability of the diode detector;  
only a small part of the circuit operates at RF frequencies,  
while the rest of the circuit operates at low frequencies.  
The dynamic range of (R)MS detectors is limited. The  
lower end of the dynamic range is limited by internal device  
offsets.  
The response of (R)MS detectors is highly waveform  
independent. This is a key advantage compared to other  
types of detectors in applications that employ signals with  
high peak-to-average power variations. For example, the  
(R)MS detector response to a 0 dBm WCDMA signal and  
a 0 dBm unmodulated carrier is essentially equal.  
Figure 3 shows a block diagram of a typical transmit power  
control system. The output power of the PA is measured by  
the LMV221 through a directional coupler. The measured  
output voltage of the LMV221 is filtered and subsequently  
digitized by the ADC inside the baseband chip. The baseband  
adjusts the PA output power level by changing the gain control  
signal of the RF VGA accordingly. With an input impedance  
of 50, the LMV221 can be directly connected to a 30 dB  
directional coupler without the need for an additional external  
attenuator. The setup can be adjusted to various PA output  
ranges by selection of a directional coupler with the appropri-  
ate coupling factor.  
The transfer shape of R(MS) detectors has many  
similarities with the diode detector and is therefore subject  
to similar disadvantages with respect to the ADC  
resolution requirements (See Figure 1, left side).  
Logarithmic Detectors  
The transfer function of a logarithmic detector has a linear in  
dB response, which means that the output voltage changes  
linearly with the RF power in dBm. This is convenient since  
most communication standards specify transmit power levels  
in dBm as well.  
The advantages and disadvantages can be summarized as  
follows:  
The temperature stability of the LOG detector transfer  
function is generally not as good as the stability of diode  
and R(MS) detectors. This is because a significant part of  
the circuit operates at RF frequencies.  
The dynamic range of LOG detectors is usually much  
larger than that of other types of detectors.  
Since LOG detectors perform a kind of peak detection their  
response is wave form dependent, similar to diode  
detectors.  
The transfer shape of LOG detectors puts the lowest  
possible requirements on the ADC resolution (See Figure  
1, right side).  
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FIGURE 3. Transmit Power Control System  
1.2.2 Voltage Standing Wave Ratio Measurement  
Transmission in RF systems requires matched termination by  
the proper characteristic impedance at the transmitter and  
receiver side of the link. In wireless transmission systems  
though, matched termination of the antenna can rarely be  
achieved. The part of the transmitted power that is reflected  
at the antenna bounces back toward the PA and may cause  
standing waves in the transmission line between the PA and  
the antenna. These standing waves can attain unacceptable  
levels that may damage the PA. A Voltage Standing Wave  
Ratio (VSWR) measurement is used to detect such an occa-  
sion. It acts as an alarm function to prevent damage to the  
transmitter.  
1.1.3 Characteristics of the LMV221  
The LMV221 is a Logarithmic RF power detector with ap-  
proximately 40 dB dynamic range. This dynamic range plus  
its logarithmic behavior make the LMV221 ideal for various  
applications such as wireless transmit power control for CD-  
MA and UMTS applications. The frequency range of the  
LMV221 is from 50 MHz to 3.5 GHz, which makes it suitable  
for various applications.  
The LMV221 transfer function is accurately temperature com-  
pensated. This makes the measurement accurate for a wide  
temperature range. Furthermore, the LMV221 can easily be  
connected to a directional coupler because of its 50 ohm input  
termination. The output range is adjustable to fit the ADC input  
range. The detector can be switched into a power saving  
shutdown mode for use in pulsed conditions.  
VSWR is defined as the ratio of the maximum voltage divided  
by the minimum voltage at a certain point on the transmission  
line:  
1.2 Applications of RF Power Detectors  
RF power detectors can be used in a wide variety of applica-  
tions. This section discusses two application. The first exam-  
ple shows the LMV221 in a transmit power control loop, the  
second application measures the voltage standing wave ratio  
(VSWR).  
Where Γ = VREFLECTED / VFORWARD denotes the reflection co-  
efficient.  
This means that to determine the VSWR, both the forward  
(transmitted) and the reflected power levels have to be mea-  
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sured. This can be accomplished by using two LMV221 RF  
power detectors according to Figure 4. A directional coupler  
is used to separate the forward and reflected power waves on  
the transmission line between the PA and the antenna. One  
secondary output of the coupler provides a signal proportional  
to the forward power wave, the other secondary output pro-  
vides a signal proportional to the reflected power wave. The  
outputs of both RF detectors that measure these signals are  
connected to a micro-controller or baseband that calculates  
the VSWR from the detector output signals.  
A sketch of this conceptual configuration is depicted in Figure  
5 .  
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FIGURE 5. Generic Concept of a Power Measurement  
System  
The core of the estimator is usually implemented as a soft-  
ware algorithm, receiving a digitized version of the detector  
output voltage. Its transfer FEST from detector output voltage  
to a numerical output should be equal to the inverse of the  
detector transfer FDET from (RF) input power to DC output  
voltage. If the power measurement system is ideal, i.e. if no  
errors are introduced into the measurement result by the de-  
tector or the estimator, the measured power PEST - the output  
of the estimator - and the actual input power PIN should be  
identical. In that case, the measurement error E, the differ-  
ence between the two, should be identically zero:  
20173794  
FIGURE 4. VSWR Application  
2. ACCURATE POWER MEASUREMENT  
The power measurement accuracy achieved with a power  
detector is not only determined by the accuracy of the detector  
itself, but also by the way it is integrated into the application.  
In many applications some form of calibration is employed to  
improve the accuracy of the overall system beyond the intrin-  
sic accuracy provided by the power detector. For example, for  
LOG-detectors calibration can be used to eliminate part to  
part spread of the LOG-slope and LOG-intercept from the  
overall power measurement system, thereby improving its  
power measurement accuracy.  
From the expression above it follows that one would design  
the FEST transfer function to be the inverse of the FDET transfer  
function.  
In practice the power measurement error will not be zero, due  
to the following effects:  
The detector transfer function is subject to various kinds  
of random errors that result in uncertainty in the detector  
output voltage; the detector transfer function is not exactly  
known.  
The detector transfer function might be too complicated to  
be implemented in a practical estimator.  
This section shows how calibration techniques can be used  
to improve the accuracy of a power measurement system be-  
yond the intrinsic accuracy of the power detector itself. The  
main focus of the section is on power measurement systems  
using LOG-detectors, specifically the LMV221, but the more  
generic concepts can also be applied to other power detec-  
tors. Other factors influencing the power measurement accu-  
racy, such as the resolution of the ADC reading the detector  
output signal will not be considered here since they are not  
fundamentally due to the power detector.  
The function of the estimator is then to estimate the input  
power PIN, i.e. to produce an output PEST such that the power  
measurement error is - on average - minimized, based on the  
following information:  
1. Measurement of the not completely accurate detector  
output voltage VOUT  
2. Knowledge about the detector transfer function FDET, for  
example the shape of the transfer function, the types of  
errors present (part-to-part spread, temperature drift) etc.  
2.1 Concept of Power Measurements  
Obviously the total measurement accuracy can be optimized  
by minimizing the uncertainty in the detector output signal (i.e.  
select an accurate power detector), and by incorporating as  
much accurate information about the detector transfer func-  
tion into the estimator as possible.  
Power measurement systems generally consists of two clear-  
ly distinguishable parts with different functions:  
1. A power detector device, that generates a DC output  
signal (voltage) in response to the power level of the (RF)  
signal applied to its input.  
The knowledge about the detector transfer function is con-  
densed into a mathematical model for the detector transfer  
function, consisting of:  
2. An “estimator” that converts the measured detector  
output signal into a (digital) numeric value representing  
the power level of the signal at the detector input.  
A formula for the detector transfer function.  
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Values for the parameters in this formula.  
The values for the parameters in the model can be obtained  
in various ways. They can be based on measurements of the  
detector transfer function in a precisely controlled environ-  
ment (parameter extraction). If the parameter values are sep-  
arately determined for each individual device, errors like part-  
to-part spread are eliminated from the measurement system.  
Obviously, errors may occur when the operating conditions of  
the detector (e.g. the temperature) become significantly dif-  
ferent from the operating conditions during calibration (e.g.  
room temperature). Subsequent sections will discuss exam-  
ples of simple estimators for power measurements that result  
in a number of commonly used metrics for the power mea-  
surement error: the LOG-conformance error, the temperature  
drift error, the temperature sensitivity and differential power  
error.  
2.2 LOG-Conformance Error  
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Probably the simplest power measurement system that can  
be realized is obtained when the LOG-detector transfer func-  
tion is modelled as a perfect linear-in-dB relationship between  
the input power and output voltage:  
FIGURE 6. LOG-Conformance Error and LOG-Detector  
Transfer Function  
In the center of the detector's dynamic range, the LOG-con-  
formance error is small, especially at room temperature; in  
this region the transfer function closely follows the linear-in-  
dB relationship while KSLOPE and PINTERCEPT are determined  
based on room temperature measurements. At the tempera-  
ture extremes the error in the center of the range is slightly  
larger due to the temperature drift of the detector transfer  
function. The error rapidly increases toward the top and bot-  
tom end of the detector's dynamic range; here the detector  
saturates and its transfer function starts to deviate significant-  
ly from the ideal LOG-linear model. The detector dynamic  
range is usually defined as the power range for which the LOG  
conformance error is smaller than a specified amount. Often  
an error of ±1 dB is used as a criterion.  
in which KSLOPE represents the LOG-slope and PINTERCEPT the  
LOG-intercept. The estimator based on this model imple-  
ments the inverse of the model equation, i.e.  
The resulting power measurement error, the LOG-confor-  
mance error, is thus equal to:  
2.3 Temperature Drift Error  
A more accurate power measurement system can be ob-  
tained if the first error contribution, due to the deviation from  
the ideal LOG-linear model, is eliminated. This is achieved if  
the actual measured detector transfer function at room tem-  
perature is used as a model for the detector, instead of the  
ideal LOG-linear transfer function used in the previous sec-  
tion.  
The most important contributions to the LOG-conformance  
error are generally:  
The formula used for such a detector is:  
VOUT,MOD = FDET(PIN,TO)  
The deviation of the actual detector transfer function from  
an ideal Logarithm (the transfer function is nonlinear in  
dB).  
where TO represents the temperature during calibration (room  
temperature). The transfer function of the corresponding es-  
timator is thus the inverse of this:  
Drift of the detector transfer function over various  
environmental conditions, most importantly temperature;  
KSLOPE and PINTERCEPT are usually determined for room  
temperature only.  
Part-to-part spread of the (room temperature) transfer  
function.  
In this expression VOUT(T) represents the measured detector  
output voltage at the operating temperature T.  
The latter component is conveniently removed by means of  
calibration, i.e. if the LOG slope and LOG-intercept are de-  
termined for each individual detector device (at room temper-  
ature). This can be achieved by measurement of the detector  
output voltage - at room temperature - for a series of different  
power levels in the LOG-linear range of the detector transfer  
function. The slope and intercept can then be determined by  
means of linear regression.  
The resulting measurement error is only due to drift of the  
detector transfer function over temperature, and can be ex-  
pressed as:  
An example of this type of error and its relationship to the  
detector transfer function is depicted in Figure 6.  
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22  
Unfortunately, the (numeric) inverse of the detector transfer  
function at different temperatures makes this expression  
rather impractical. However, since the drift error is usually  
small VOUT(T) is only slightly different from VOUT(TO). This  
means that we can apply the following approximation:  
In agreement with the definition, the temperature drift error is  
zero at the calibration temperature. Further, the main differ-  
ence with the LOG-conformance error is observed at the top  
and bottom end of the detection range; instead of a rapid in-  
crease the drift error settles to a small value at high and low  
input power levels due to the fact that the detector saturation  
levels are relatively temperature independent.  
In a practical application it may not be possible to use the  
exact inverse detector transfer function as the algorithm for  
the estimator. For example it may require too much memory  
and/or too much factory calibration time. However, using the  
ideal LOG-linear model in combination with a few extra data  
points at the top and bottom end of the detection range -  
where the deviation is largest - can already significantly re-  
duce the power measurement error.  
This expression is easily simplified by taking the following  
considerations into account:  
The drift error at the calibration temperature E(TO,TO)  
equals zero (by definition).  
The estimator transfer FDET(VOUT,TO) is not a function of  
temperature; the estimator output changes over  
2.4 Temperature Compensation  
A further reduction of the power measurement error is possi-  
ble if the operating temperature is measured in the applica-  
tion. For this purpose, the detector model used by the  
estimator should be extended to cover the temperature de-  
pendency of the detector.  
temperature only due to the temperature dependence of  
VOUT  
.
The actual detector input power PIN is not temperature  
dependent (in the context of this expression).  
The derivative of the estimator transfer function to VOUT  
equals approximately 1/KSLOPE in the LOG-linear region of  
the detector transfer function (the region of interest).  
Since the detector transfer function is generally a smooth  
function of temperature (the output voltage changes gradually  
over temperature), the temperature is in most cases ade-  
quately modeled by a first-order or second-order polynomial,  
i.e.  
Using this, we arrive at:  
The required temperature dependence of the estimator, to  
compensate for the detector temperature dependence can be  
approximated similarly:  
This expression is very similar to the expression of the LOG-  
conformance error determined previously. The only differ-  
ence is that instead of the output of the ideal LOG-linear  
model, the actual detector output voltage at the calibration  
temperature is now subtracted from the detector output volt-  
age at the operating temperature.  
Figure 7 depicts an example of the drift error.  
The last approximation results from the fact that a first-order  
temperature compensation is usually sufficiently accurate.  
The remainder of this section will therefore concentrate on  
first-order compensation. For second and higher-order com-  
pensation a similar approach can be followed.  
Ideally, the temperature drift could be completely eliminated  
if the measurement system is calibrated at various tempera-  
tures and input power levels to determine the Temperature  
Sensitivity S1. In a practical application, however that is usu-  
ally not possible due to the associated high costs. The alter-  
native is to use the average temperature drift in the estimator,  
instead of the temperature sensitivity of each device individ-  
ually. In this way it becomes possible to eliminate the sys-  
tematic (reproducible) component of the temperature drift  
without the need for calibration at different temperatures dur-  
ing manufacturing. What remains is the random temperature  
drift, which differs from device to device. Figure 8 illustrates  
the idea. The graph at the left schematically represents the  
behavior of the drift error versus temperature at a certain input  
power level for a large number of devices.  
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FIGURE 7. Temperature Drift Error of the LMV221  
at f = 1855 MHz  
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20173765  
FIGURE 8. Elimination of the Systematic Component from the Temperature Drift  
The mean drift error represents the reproducible - systematic  
ment temperatures increases. Linear regression to tempera-  
ture can then be used to determine the two parameters of the  
linear model for the temperature drift error: the first order tem-  
perature sensitivity S1 and the best-fit (room temperature)  
value for the power estimate at T0 :FDET[VOUT(T),T0]. Note that  
to achieve an overall - over all temperatures - minimum error,  
the room temperature drift error in the model can be non-zero  
at the calibration temperature (which is not in agreement with  
the strict definition).  
- part of the error, while the mean ± 3 sigma limits represent  
the combined systematic plus random error component. Ob-  
viously the drift error must be zero at calibration temperature  
T0. If the systematic component of the drift error is included  
in the estimator, the total drift error becomes equal to only the  
random component, as illustrated in the graph at the right of  
Figure 8. A significant reduction of the temperature drift error  
can be achieved in this way only if:  
The systematic component is significantly larger than the  
random error component (otherwise the difference is  
negligible).  
The operating temperature is measured with sufficient  
accuracy.  
The second method does not have this drawback but is more  
complex. In fact, segmentation of the temperature range is a  
form of higher-order temperature compensation using only a  
first-order model for the different segments: one for temper-  
atures below 25°C, and one for temperatures above 25°C.  
The mean (or typical) temperature sensitivity is the value to  
be used for compensation of the systematic drift error com-  
ponent. Figure 9 shows the temperature drift error without and  
with temperature compensation using two segments. With  
compensation the systematic component is completely elim-  
inated; the remaining random error component is centered  
around zero. Note that the random component is slightly larg-  
er at −40°C than at 85°C.  
It is essential for the effectiveness of the temperature com-  
pensation to assign the appropriate value to the temperature  
sensitivity S1. Two different approaches can be followed to  
determine this parameter:  
Determination of a single value to be used over the entire  
operating temperature range.  
Division of the operating temperature range in segments  
and use of separate values for each of the segments.  
Also for the first method, the accuracy of the extracted tem-  
perature sensitivity increases when the number of measure-  
20173752  
20173795  
FIGURE 9. Temperature Drift Error without and with Temperature Compensation  
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24  
In a practical power measurement system, temperature com-  
pensation is usually only applied to a small power range  
around the maximum power level for two reasons:  
the differential error equals the difference of the drift error at  
the two involved power levels:  
The various communication standards require the highest  
accuracy in this range to limit interference.  
The temperature sensitivity itself is a function of the power  
level it becomes impractical to store a large number of  
different temperature sensitivity values for different power  
levels.  
It should be noted that the step error increases significantly  
when one (or both) power levels in the above expression are  
outside the detector dynamic range. For E10 dB this occurs  
when PIN is less than 10 dB below the maximum input power  
The table in the datasheet specifies the temperature sensi-  
tivity for the aforementioned two segments at an input power  
level of -10 dBm (near the top-end of the detector dynamic  
range). The typical value represents the mean which is to be  
used for calibration.  
of the dynamic range, PMAX  
.
3. DETECTOR INTERFACING  
For optimal performance of the LMV221, it is important that  
all its pins are connected to the surrounding circuitry in the  
appropriate way. This section discusses guidelines and re-  
quirements for the electrical connection of each pin of the  
LMV221 to ensure proper operation of the device. Starting  
from a block diagram, the function of each pin is elaborated.  
Subsequently, the details of the electrical interfacing are sep-  
arately discussed for each pin. Special attention will be paid  
to the output filtering options and the differences between  
single ended and differential interfacing with an ADC.  
2.5 Differential Power Errors  
Many third generation communication systems contain a  
power control loop through the base station and mobile unit  
that requests both to frequently update the transmit power  
level by a small amount (typically 1 dB). For such applications  
it is important that the actual change of the transmit power is  
sufficiently close to the requested power change.  
The error metrics in the datasheet that describe the accuracy  
of the detector for a change in the input power are E1 dB (for  
a 1 dB change in the input power) and E10 dB (for a 10 dB step,  
or ten consecutive steps of 1 dB). Since it can be assumed  
that the temperature does not change during the power step  
3.1 Block Diagram of the LMV221  
The block diagram of the LMV221 is depicted in Figure 10.  
20173703  
FIGURE 10. Block Diagram of the LMV221  
The core of the LMV221 is a progressive compression LOG-  
detector consisting of four gain stages. Each of these satu-  
rating stages has a gain of approximately 10 dB and therefore  
realizes about 10 dB of the detector dynamic range. The five  
diode cells perform the actual detection and convert the RF  
signal to a DC current. This DC current is subsequently sup-  
plied to the transimpedance amplifier at the output, that con-  
verts it into an output voltage. In addition, the amplifier  
provides buffering of and applies filtering to the detector out-  
put signal. To prevent discharge of filtering capacitors be-  
tween OUT and GND in shutdown, a switch is inserted at the  
amplifier input that opens in shutdown to realize a high  
impedance output of the device.  
respect to the value given in the electrical characteristics ta-  
ble. This intercept shift can be calculated according to the  
following formula: .  
The intercept will shift to higher power levels for  
RSOURCE > 50Ω, and will shift to lower power levels for  
RSOURCE < 50Ω.  
3.3 Shutdown  
To save power, the LMV221 can be brought into a low-power  
shutdown mode. The device is active for EN = HIGH  
(VEN>1.1V) and in the low-power shutdown mode for EN =  
LOW (VEN < 0.6V). In this state the output of the LMV221 is  
switched to a high impedance mode. Using the shutdown  
3.2 RF Input  
RF parts typically use a characteristic impedance of 50. To  
comply with this standard the LMV221 has an input  
impedance of 50. Using a characteristic impedance other  
then 50will cause a shift of the logarithmic intercept with  
25  
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function, care must be taken not to exceed the absolute max-  
imum ratings. Forcing a voltage to the enable input that is 400  
mV higher than VDD or 400 mV lower than GND will damage  
the device and further operations is not guaranteed. The ab-  
solute maximum ratings can also be exceeded when the  
enable EN is switched to HIGH (from shutdown to active  
mode) while the supply voltage is low (off). This should be  
prevented at all times. A possible solution to protect the part  
is to add a resistor of 100 kin series with the enable input.  
In addition two different topologies to connect the LMV221 to  
an ADC are elaborated.  
3.4.1 Filtering  
The output voltage of the LMV221 is a measure for the applied  
RF signal on the RF input pin. Usually, the applied RF signal  
contains AM modulation that causes low frequency ripple in  
the detector output voltage. CDMA signals for instance con-  
tain a large amount of amplitude variations. Filtering of the  
output signal can be used to eliminate this ripple. The filtering  
can either be realized by a low pass output filter or a low pass  
feedback filter. Those two techniques are depicted in Figure  
11.  
3.4 Output and Reference  
This section describes the possible filtering techniques that  
can be applied to reduce ripple in the detector output voltage.  
20173775  
20173776  
FIGURE 11. Low Pass Output Filter and Low Pass Feedback Filter  
Depending on the system requirements one of the these fil-  
tering techniques can be selected. The low pass output filter  
has the advantage that it preserves the output voltage when  
the LMV221 is brought into shutdown. This is elaborated in  
section 3.4.3. In the feedback filter, resistor RP discharges  
capacitor CP in shutdown and therefore changes the output  
voltage of the device.  
then be calculated by: f−3 dB = 1 / 2πRSCS. The bandwidth of  
the low pass feedback filter is determined by external resistor  
RP in parallel with the internal resistor RTRANS, and external  
capacitor CP in parallel with internal capacitor CTRANS (see  
Figure 13). The −3 dB bandwidth of the feedback filter can be  
calculated by f−3 dB = 1 / 2π (RP//RTRANS) (CP+CTRANS). The  
bandwidth set by the internal resistor and capacitor (when no  
external components are connected between OUT and REF)  
equals f−3 dB = 1 / 2π RTRANS CTRANS = 450 kHz.  
A disadvantage of the low pass output filter is that the series  
resistor RS limits the output drive capability. This may cause  
inaccuracies in the voltage read by an ADC when the ADC  
input impedance is not significantly larger than RS. In that  
case, the current flowing through the ADC input induces an  
error voltage across filter resistor RS. The low pass feedback  
filter doesn’t have this disadvantage.  
3.4.2 Interface to the ADC  
The LMV221 can be connected to the ADC with a single end-  
ed or a differential topology. The single ended topology con-  
nects the output of the LMV221 to the input of the ADC and  
the reference pin is not connected. In a differential topology,  
both the output and the reference pins of the LMV221 are  
connected to the ADC. The topologies are depicted in Figure  
12.  
Note that adding an external resistor between OUT and REF  
reduces the transfer gain (LOG-slope and LOG-intercept) of  
the device. The internal feedback resistor sets the gain of the  
transimpedance amplifier.  
The filtering of the low pass output filter is realized by resistor  
RS and capacitor CS. The −3 dB bandwidth of this filter can  
20173776  
20173777  
FIGURE 12. Single Ended and Differential Application  
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26  
The differential topology has the advantage that it is compen-  
sated for temperature drift of the internal reference voltage.  
This can be explained by looking at the transimpedance am-  
plifier of the LMV221 (Figure 13).  
impedance to enable fast settling. During shutdown-mode,  
the capacitor should preserve this voltage. Discharge of CS  
through any current path should therefore be avoided in shut-  
down. The output impedance of the LMV221 becomes high  
in shutdown, such that the discharge current cannot flow from  
the capacitor top plate, through RS, and the LMV221's OUT  
pin to GND. This is realized by the internal shutdown mech-  
anism of the output amplifier and by the switch depicted in  
Figure 13. Additionally, it should be ensured that the ADC in-  
put impedance is high as well, to prevent a possible discharge  
path through the ADC.  
4. BOARD LAYOUT RECOMMENDATIONS  
As with any other RF device, careful attention must me paid  
to the board layout. If the board layout isn’t properly designed,  
unwanted signals can easily be detected or interference will  
be picked up. This section gives guidelines for proper board  
layout for the LMV221.  
Electrical signals (voltages / currents) need a finite time to  
travel through a trace or transmission line. RF voltage levels  
at the generator side and at the detector side can therefore  
be different. This is not only true for the RF strip line, but for  
all traces on the PCB. Signals at different locations or traces  
on the PCB will be in a different phase of the RF frequency  
cycle. Phase differences in, e.g. the voltage across neighbor-  
ing lines, may result in crosstalk between lines, due to para-  
sitic capacitive or inductive coupling. This crosstalk is further  
enhanced by the fact that all traces on the PCB are suscep-  
tible to resonance. The resonance frequency depends on the  
trace geometry. Traces are particularly sensitive to interfer-  
ence when the length of the trace corresponds to a quarter of  
the wavelength of the interfering signal or a multiple thereof.  
20173778  
FIGURE 13. Output Stage of the LMV221  
It can be seen that the output of the amplifier is set by the  
detection current IDET multiplied by the resistor RTRANS plus  
the reference voltage VREF  
:
VOUT = IDET RTRANS + VREF  
IDET represents the detector current that is proportional to the  
RF input power. The equation shows that temperature varia-  
tions in VREF are also present in the output VOUT. In case of a  
single ended topology the output is the only pin that is con-  
nected to the ADC. The ADC voltage for single ended is thus:  
4.1 Supply Lines  
Single ended: VADC = IDET RTRANS + VREF  
Since the PSRR of the LMV221 is finite, variations of the sup-  
ply can result in some variation at the output. This can be  
caused among others by RF injection from other parts of the  
circuitry or the on/off switching of the PA.  
A differential topology also connects the reference pin, which  
is the value of reference voltage VREF. The ADC reads VOUT  
- VREF  
:
Differential: VADC = VOUT - VREF = IDET RTRANS  
4.1.1 Positive Supply (VDD  
)
The resulting equation doesn’t contain the reference voltage  
VREF anymore. Temperature variations in this reference volt-  
age are therefore not measured by the ADC.  
In order to minimize the injection of RF interference into the  
LMV221 through the supply lines, the phase difference be-  
tween the PCB traces connecting to VDD and GND should be  
minimized. A suitable way to achieve this is to short both con-  
nections for RF. This can be done by placing a small decou-  
pling capacitor between the VDD and GND. It should be placed  
as close as possible to the VDD and GND pins of the LMV221.  
Due to the presence of the RF input, the best possible position  
would be to extend the GND plane connecting to the DAP  
slightly beyond the short edge of the package, such that the  
capacitor can be placed directly to the VDD pin (Figure 14). Be  
aware that the resonance frequency of the capacitor itself  
should be above the highest RF frequency used in the appli-  
cation, since the capacitor acts as an inductor above its  
resonance frequency.  
3.4.3 Output Behavior in Shutdown  
In order to save power, the LMV221 can be used in pulsed  
mode, such that it is active to perform the power measure-  
ment only during a fraction of the time. During the remaining  
time the device is in low-power shutdown. Applications using  
this approach usually require that the output value is available  
at all times, also when the LMV221 is in shutdown. The set-  
tling time in active mode, however, should not become ex-  
cessively large. This can be realized by the combination of  
the LMV221 and a low pass output filter (see Figure 11, left  
side), as discussed below.  
In active mode, the filter capacitor CS is charged to the output  
voltage of the LMV221 — which in this mode has a low output  
27  
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20173701  
FIGURE 14. Recommended Board Layout  
Low frequency supply voltage variations due to PA switching  
might result in a ripple at the output voltage. The LMV221 has  
a Power Supply Rejection Ration of 60 dB for low frequencies.  
4.1.2 Ground (GND)  
The LMV221 needs a ground plane free of noise and other  
disturbing signals. It is important to separate the RF ground  
return path from the other grounds. This is due to the fact that  
the RF input handles large voltage swings. A power level of  
0 dBm will cause a voltage swing larger than 0.6 VPP, over the  
internal 50input resistor. This will result in a significant RF  
return current toward the source. It is therefore recommended  
that the RF ground return path not be used for other circuits  
in the design. The RF path should be routed directly back to  
the source without loops.  
20173780  
4.2 RF Input Interface  
FIGURE 15. Microstrip Configuration  
The LMV221 is designed to be used in RF applications, hav-  
ing a characteristic impedance of 50. To achieve this  
impedance, the input of the LMV221 needs to be connected  
via a 50transmission line. Transmission lines can be easily  
created on PCBs using microstrip or (grounded) coplanar  
waveguide (GCPW) configurations. This section will discuss  
both configurations in a general way. For more details about  
designing microstrip or GCPW transmission lines, a mi-  
crowave designer handbook is recommended.  
A conductor (trace) is placed on the topside of a PCB. The  
bottom side of the PCB has a fully copper ground plane. The  
characteristic impedance of the microstrip transmission line  
is a function of the width W, height H, and the dielectric con-  
stant εr.  
Characteristics such as height and the dielectric constant of  
the board have significant impact on transmission line dimen-  
sions. A 50transmission line may result in impractically wide  
traces. A typical 1.6 mm thick FR4 board results in a trace  
width of 2.9 mm, for instance. This is impractical for the  
LMV221, since the pad width of the LLP-6 package is 0.25  
mm. The transmission line has to be tapered from 2.9 mm to  
0.25 mm. Significant reflections and resonances in the fre-  
quency transfer function of the board may occur due to this  
tapering.  
4.2.1 Microstrip Configuration  
One way to create a transmission line is to use a microstrip  
configuration. A cross section of the configuration is shown in  
Figure 15, assuming a two layer PCB.  
4.2.2 GCPW Configuration  
A transmission line in a (grounded) coplanar waveguide  
(GCPW) configuration will give more flexibility in terms of  
trace width. The GCPW configuration is constructed with a  
conductor surrounded by ground at a certain distance, S, on  
the top side. Figure 16 shows a cross section of this configu-  
ration. The bottom side of the PCB is a ground plane. The  
ground planes on both sides of the PCB should be firmly con-  
nected to each other by multiple vias. The characteristic  
impedance of the transmission line is mainly determined by  
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28  
the width W and the distance S. In order to minimize reflec-  
tions, the width W of the center trace should match the size  
of the package pad. The required value for the characteristic  
impedance can subsequently be realized by selection of the  
proper gap width S.  
4.3 Reference REF  
The Reference pin can be used to compensate for tempera-  
ture drift of the internal reference voltage as described in  
Section 3.4.2. The REF pin is directly connected to the in-  
verting input of the transimpedance amplifier. Thus, RF sig-  
nals and other spurious signals couple directly through to the  
output. Introduction of RF signals can be prevented by con-  
necting a small capacitor between the REF pin and ground.  
The capacitor should be placed close to the REF pin as de-  
picted in Figure 14.  
4.4 Output OUT  
The OUT pin is sensitive to crosstalk from the RF input, es-  
pecially at high power levels. The ESD diode between the  
output and VDD may rectify the crosstalk, but may add an un-  
wanted inaccurate DC component to the output voltage.  
The board layout should minimize crosstalk between the de-  
tectors input RFIN and the detectors output. Using an addi-  
tional capacitor connected between the output and the  
positive supply voltage (VDD pin) or GND can prevent this. For  
optimal performance this capacitor should be placed as close  
as possible to the OUT pin of the LMV221; e.g. extend the  
DAP GND plane and place the capacitor next to the OUT pin.  
20173781  
FIGURE 16. GCPW Configuration  
29  
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted  
6-Pin LLP  
NS Package Number SDB06A  
www.national.com  
30  
Notes  
31  
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Notes  
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