LMV422 [NSC]
Dual Rail-to-Rail Output Operational Amplifier with; 双路轨至轨输出运算放大器
| 型号： | LMV422 |
| 厂家： | 
National Semiconductor |
| 描述： | Dual Rail-to-Rail Output Operational Amplifier with |
| 文件： | 总10页 (文件大小：759K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 2005
LMV422
Dual Rail-to-Rail Output Operational Amplifier with
Power Select
General Description
Features
n Supply voltage
2.7V to 5.5V
The LMV422 dual rail-to-rail output amplifier offers a power
select pin (PS) that allows the user to select one of two
power modes depending on the level of performance de-
sired. This is ideal for AC coupled circuits where the circuit
needs to be kept active to maintain a quiescent charge on
the coupling capacitors with minimum power consumption.
n Supply current per channel
— Low power mode
— Full power mode
n Input common mode voltage range
n CMRR
2 µA
400 µA
−0.3V to 3.8V
85 dB
For portable applications, the LMV422 operates in low power
mode consuming only 2 µA of supply current per channel at
a bandwidth of 27 kHz. This allows the user to reduce the
power consumption of an amplifier while maintaining an
active circuit. For additional bandwidth and output current
drive the amplifier can be switched to full power mode with 8
MHz bandwidth while consuming only 400 µA per channel.
n Output voltage swing
n Input offset voltage
n Bandwidth
— Low power mode
— Full power mode
Rail-to-Rail
1 mV
27 kHz
8 MHz
n Stable for AV ≥ +2 or AV ≤ −1
The LMV422 features a rail-to-rail output voltage swing in
addition to an input common mode range that includes
ground. The LMV422 is designed for closed loop gains of
plus two (or minus one) or greater. The LMV422 is offered in
10-Pin MSOP miniature package to ease the adoption in
applications where board area is at a premium.
Applications
n AC coupled circuits
n Portable instrumentation
n Smoke detectors
Typical Application
20109835
AC Coupled Application
© 2005 National Semiconductor Corporation
DS201098
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Soldering Information
Infrared or Convection (20 sec)
Wave Soldering Lead Temp. (10 sec)
235˚C
260˚C
ESD Tolerance(Note 2)
Operating Ratings (Note 1)
Supply Voltage (V+ – V−)
Human Body
2000V
200V
2.7V to 5.5V
Machine Model
Temperature Range
−40˚C to +85˚C
VIN Differential
2V
Package Thermal Resistance (θJA
)
Supply Voltage (V+ - V−)
Storage Temperature Range
Junction Temperature (Note 4)
2.5V to 5.5V
−65˚C to +150˚C
+150˚C
10-Pin MSOP
210˚C/W
5V Full Power Mode Electrical Characteristics
Unless otherwise specified, all limits guaranteed for at TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, PS = V−. Boldface lim-
its apply at the temperature extremes.
Symbol
VOS
Parameter
Conditions
Min
(Note 6)
Typ
(Note 5)
1
Max
(Note 6)
Units
Input Offset Voltage
4
5.5
1
mV
mV
∆VOS
Input Offset Voltage Difference VOS in Full Power Mode −
VOS in Low Power Mode
0.1
TC VOS
IB
Input Offset Average Drift
Input Bias Current
Common Mode Rejection
Ratio
(Note 9)
2
5
µV/C
pA
CMRR
VCM Stepped from 0V to 3.5V
68
60
85
dB
dB
V
PSRR
CMVR
AVOL
Power Supply Rejection Ratio V+ = 2.7V to 5V
66
90
60
Input Common Mode Voltage
Range
CMRR ≥ 50 dB
−0.3
3.8
Large Signal Voltage Gain
VO = 0.75V to 4.25V
RL = 1 MΩ
72
70
100
102
4.97
4.98
33
dB
V
VO = 0.75V to 4.25V
75
RL = 10 kΩ
RL = 10 kΩ to V+/2
70
VO
Output Swing High
4.93
4.88
4.94
4.89
RL = 1 MΩ to V+/2
RL = 10 kΩ to V+/2
RL = 1 MΩ to V+/2
Output Swing Low
180
230
120
170
mV
25
ISC
Output Short Circuit Current
Supply Current Per Channel
Sourcing, VO = 0V
VID = 100 mV
Sinking, VO = 5V
VID = −100 mV
PS ≤ 0.5V
3
9
5
mA
µA
16
IS
400
650
900
SR
Slew Rate
VO = 3V, AV = +2
1.8
3.8
8
V/µs
MHz
GBW
en
Gain Bandwidth Product
Input-Referred Voltage Noise
f = 100 kHz
f = 1 kHz
20
25
nV/
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2
5V Full Power Mode Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for at TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, PS = V−. Boldface lim-
its apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 5)
0.006
Max
(Note 6)
Units
in
Input-Referred Current Noise
f = 1 kHz
pA/
tLF
Time from Low Power Mode
to Full Power Mode
210
ns
THPS
IPS
Full Power Mode Voltage
Threshold
0.5
V
Input Current PS pin(Note 7)
−2
µA
5V Low Power Mode Electrical Characteristics
Unless otherwise specified, all limits guaranteed for at TJ = 25˚C, V+ = 5V, V− = 0V, VCM = VO = V+/2, PS = V+ or Open. Bold-
face limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 5)
1
Max
(Note 6)
Units
VOS
Input Offset Voltage
4
5.5
1
mV
mV
∆VOS
Input Offset Voltage Difference VOS in Full Power Mode −
VOS in Low Power Mode
0.1
TC VOS
IB
Input Offset Average Drift
Input Bias Current
Common Mode Rejection
Ratio
(Note 9)
2
5
µV/C
pA
CMRR
VCM Stepped from 0V to 3.5V
60
55
62
60
0
82
dB
dB
V
PSRR
CMVR
AVOL
VO
Power Supply Rejection Ratio V+ = 2.7V to 5V
90
Input Common-Mode Voltage
Range
CMRR ≥ 50 dB
3.5
Large Signal Voltage Gain
RL = 1 MΩ
VO = 0.75 to 4V
62
54
72
4.98
150
140
130
2
dB
V
Output Swing High
RL = 1 MΩ
4.94
4.89
Output Swing Low
RL = 1 MΩ
200
mV
250
ISC
Output Short Circuit Current
Sourcing, VO = 0V
VID = 200 mV
Sinking, VO = 5V
VID = −200 mV
PS ≥ 4. 5V
40
25
µA
IS
Supply Current per channel
3.5
µA
4.5
SR
Slew Rate
VO = 3V, AV = +2
8
14
27
V/ms
kHz
GBW
en
Gain Bandwidth Product
Input-Referred Voltage Noise
f = 100 kHz
f = 1 kHz
f = 1 kHz
40
nV/
pA/
ns
60
in
Input-Referred Current Noise
0.06
tFL
Time from Full Power Mode to
Low Power Mode
500
THPS
IPS
Low Power Mode Voltage
Threshold
4.5
V
Input Current PS pin (Note 7)
8
nA
3
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Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5 kΩ in series with 100 pF, Machine Model, 0Ω in series with 200 pF.
Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150˚C.
Note 4: The maximum power dissipation is a function of T
, θ , and T . The maximum allowable power dissipation at any ambient temperature is
J(MAX)
JA
A
P
= (T
- T )/ θ . All numbers apply for packages soldered directly onto a PC board.
D
J(MAX) A JA
Note 5: Typical values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: Positive current corresponds to current flowing into the device.
Note 8: Slew rate is the average of the rising and falling slew rates.
Note 9: Offset voltage average drift determined by dividing the change in V
at temperature extremes into the total temperature change.
OS
Connection Diagram
10-Pin MSOP
20109806
Top View
Ordering Information
Package
Part Number
Package Marking
Transport Media
NSC Drawing
LMV422MM
1k Units Tape and Reel
3.5k Units Tape and Reel
10-Pin MSOP 3 x 5 mm
AJ1A
MUB10A
LMV422MMX
Simplified Schematic
20109818
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4
Typical Performance Characteristics Unless otherwise specified, V+ = 5V, TA = 25˚C, PS = V+ for
Full Power Mode, PS = V− for Low Power Mode.
Supply Current vs. Supply Voltage per Channel
(Full Power Mode)
Supply Current vs. Supply Voltage per Channel
(Low Power Mode)
20109801
20109802
Gain and Phase vs. Frequency
Gain and Phase vs. Frequency
20109812
20109813
Gain and Phase vs. Frequency
Gain and Phase vs. Frequency
20109814
20109815
5
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Typical Performance Characteristics Unless otherwise specified, V+ = 5V, TA = 25˚C, PS = V+ for
Full Power Mode, PS = V− for Low Power Mode. (Continued)
Phase Margin vs. Gain for Various Capacitive Load
Phase Margin vs. Gain for Various Capacitive Load
20109823
20109824
Input Offset Voltage vs. Output Voltage
Input Offset Voltage vs. Output Voltage
20109817
20109816
Noise vs. Frequency
PSRR vs. Frequency
20109832
20109833
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6
Typical Performance Characteristics Unless otherwise specified, V+ = 5V, TA = 25˚C, PS = V+ for
Full Power Mode, PS = V− for Low Power Mode. (Continued)
Small Signal Non-Inverting Response
Small Signal Non-Inverting Response
20109820
20109821
Small Signal Non-Inverting Response
Small Signal Non-Inverting Response
20109822
20109836
Large Signal Non-Inverting Response
Large Signal Non-Inverting Response
20109837
20109838
7
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Application Information
The LMV422 is a dual rail-to-rail output amplifier that can be
switched between two active power modes. The power se-
lect pin (PS) provides a method to optimize the power con-
sumption, bandwidth and short circuit current. When the PS
pin is set to greater than 4.5V (Figure 1a) or left open, the
LMV422 is in Low Power Mode operating at a bandwidth of
27 kHz and consuming only 2 µA of supply current per
channel. Setting the PS pin to less than 0.5V, switches the
LMV422 to Full Power Mode with a bandwidth of 8 MHz and
supply current of 400 uA per channel (Figure 2b).. The PS
pin should not exceed the supply voltage. The active power
modes of the two amplifiers can be set independently.
20109808
Figure 1b Full Power Mode
20109807
Figure 1a Low Power Mode
FIGURE 1.
The LMV422 PS pin has an internal pull up and a logic level
control gate that makes it easy for the PS pin to be controlled
by the output of a logic gate or the output pin of a microcon-
troller. The following figures show the three typical output
configurations for logic gates and microcontrollers.
20109811
Figure 2c
20109809
20109810
Figure 2a
Figure 2b
FIGURE 2.
CAPACITIVE LOAD TOLERANCE
too low, it will degrade the amplifier’s phase margin so that
the amplifier is no longer stable.
The LMV422 is optimized for maximum bandwidth when
operating at a minimum closed loop gain of +2 or −1, there-
fore, it is not recommended to be configured as a buffer. Like
many other op amps, the LMV422 may oscillate when the
applied load appears capacitive. The threshold of the oscil-
lation varies both with load and circuit gain (see Phase
Margin vs. Gain for various capacitive loads curves). The
load capacitance interacts with the amplifier’s output resis-
tance to create an additional pole. If this pole frequency is
Figure 3a and 3b show the addition of a small value resistor
RISO or RX (50Ω to 100Ω) in series with the op amps output.
Figure 3b shows the addition of a capacitor CF (5 pF to 10
pF) between the inverting input and the output pin. This
addition capacitor returns the phase margin to a safe value
without interfering with lower frequency circuit operation.
Note that in all cases, the output will ring heavily when the
load capacitance is near the threshold for oscillation.
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8
Application Information (Continued)
20109825
Figure 3a
20109826
Figure 3b
FIGURE 3.
AC COUPLED CIRCUITS
them when placed in the shut down state. When the ampli-
fiers are turned on again, the quiescent DC voltages must
reestablish themselves. During this time, the amplifier’s out-
put is not usable because the output signal is a mixture of the
amplified input signal and the charging voltage on the cou-
pling capacitors. The settling time can range from a several
milliseconds to several seconds depending on the resistor
and capacitor values.
The two power modes makes the LMV422 ideal for AC
coupled circuit where the circuit needs to be kept active to
maintain a quiescent charge on the coupling capacitors with
minimum power consumption.
Figure 4 shows a schematic of an inverting and non-inverting
AC coupled amplifiers using the LMV422 with the PS pins
controlled by I/O ports of a microcontroller.
When the LMV422 is placed into the low power mode the
power consumption is minimal but the amplifier is active to
maintain the quiescent DC voltage on the coupling capaci-
tors and the transition back to the operational high power
mode is fast, within few hundred nanoseconds. The active
low power mode of the LMV422 separates the two critical
aspects of a low power AC amplifier design. The values of
the gain resistors, bias resistors, and coupling capacitors
can be chosen independently of the turn on and stabilization
time.
The advantage of the low power active mode for AC coupled
amplifiers is the elimination of the time needed to re-
establish a quiescent operating point when the amplifier is
switched to a full power mode. When amplifiers without a low
power active mode are used in low power applications, there
are two ways to minimize power consumption. The first is
turning off the amplifiers by switching off power to the op
amps using a transistor switch. The second is using an
amplifier with a shut down pin. Both of these methods have
the problem of allowing the coupling capacitors, C1, C2, C3,
C4, and C5, to discharge the quiescent DC voltage stored on
20109834
FIGURE 4.
RESISTIVE LOAD
The current drive in the low power mode is 140 uA, the
minimum resistive load should be 100 kΩ.
The LMV422 has a minimum current drive of 3 mA in full
power mode. The minimum resistive load should be 10 kΩ
9
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Physical Dimensions inches (millimeters) unless otherwise noted
10-Pin MSOP
NS Package Number MUB10A
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