LMV821M7 [NSC]
Low Voltage, Low Power, R-to-R Output, 5 MHz Op Amps; 低电压，低功耗，R到R输出， 5 MHz的运算放大器
| 型号： | LMV821M7 |
| 厂家： | 
National Semiconductor |
| 描述： | Low Voltage, Low Power, R-to-R Output, 5 MHz Op Amps |
| 文件： | 总24页 (文件大小：1071K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 1999
LMV821 Single/ LMV822 Dual/ LMV824 Quad
Low Voltage, Low Power, R-to-R Output, 5 MHz Op Amps
n Guaranteed 2.5 V, 2.7 V and 5 V Performance
General Description
n Maximum VOS
n VOS Temp. Drift
3.5 mV (Guaranteed)
1 uV/˚ C
The LMV821/LMV822/LMV824 bring performance and
economy to low voltage / low power systems. With a 5 MHz
unity-gain frequency and a guaranteed 1.4 V/µs slew rate,
the quiescent current is only 220 µA/amplifier (2.7 V). They
provide rail-to-rail (R-to-R) output swing into heavy loads
(600 Ω Guarantees). The input common-mode voltage range
includes ground, and the maximum input offset voltage is
3.5mV (Guaranteed). They are also capable of comfortably
driving large capacitive loads (refer to the application notes
section).
@
n GBW product 2.7 V
5 MHz
@
n ISupply 2.7 V
220 µA/Amplifier
1.4 V/us (Guaranteed)
90 dB
n Minimum SR
n CMRR
n PSRR
85 dB
n Rail-to-Rail (R-to-R) Output Swing
@
—
—
600 Ω Load
160 mV from rail
55 mV from rail
-0.3 V to 4.3 V
@
10 kΩ Load
The LMV821 (single) is available in the ultra tiny SC70-5
package, which is about half the size of the previous title
holder, the SOT23-5.
@
n VCM 5 V
n Stable with High Capacitive Loads (Refer to Application
Section)
Overall, the LMV821/LMV822/LMV824 (Single/Dual/Quad)
are low voltage, low power, performance op amps, that can
be designed into a wide range of applications, at an eco-
nomical price.
Applications
n Cordless Phones
n Cellular Phones
n Laptops
n PDAs
n PCMCIA
Features
(For Typical, 5 V Supply Values; Unless Otherwise Noted)
n Ultra Tiny, SC70-5 Package
2.0 x 2.0 x 1.0 mm
Connection Diagrams
5-Pin SC70-5/SOT23-5
14-Pin SO/TSSOP
DS100128-84
Top View
DS100128-85
8-Pin SO/MSOP
Top View
DS100128-63
Top View
© 1999 National Semiconductor Corporation
DS100128
www.national.com
Ordering Information
Temperature Range
Package
5-Pin SC-70-5
5-Pin SOT23-5
8-Pin SO
Industrial
−40˚C to +85˚C
LMV821M7
LMV821M7X
LMV821M5
LMV821M5X
LMV822M
Packaging Marking
Transport Media
NSC Drawing
MAA05
A15
A15
1k Units Tape and Reel
3k Units Tape and Reel
1k UnitsTape and Reel
3k Units Tape and Reel
Rails
A14
MA05B
A14
LMV822M
LMV822M
M08A
LMV822MX
2.5k Units Tape and
Reel
8-Pin MSOP
14-Pin SO
LMV822MM
LMV822
LMV822
1k Units Tape and Reel
MUA08A
M14A
LMV822MMX
3.5k Units Tape and
Reel
LMV824M
LMV824M
LMV824M
Rails
LMV824MX
2.5k Units Tape and
Reel
14-Pin TSSOP
LMV824MT
LMV824MT
LMV824MT
Rails
MTC14
LMV824MTX
2.5k Units Tape and
Reel
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2
Absolute Maximum Ratings (Note 1)
Operating Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
2.5V to 5.5V
Temperature Range
LMV821, LMV822, LMV824
−40˚C ≤T ≤85˚C
J
ESD Tolerance (Note 2)
Thermal Resistance (θ
)
JA
Machine Model
Human Body Model
LMV822/824
100V
Ultra Tiny SC70-5 Package
5-Pin Surface Mount
440 ˚C/W
265 ˚C/W
2000V
1500V
Tiny SOT23-5 Package 5-Pin
Surface Mount
LMV821
±
Differential Input Voltage
−
Supply Voltage
5.5V
SO Package, 8-Pin Surface
Mount
Supply Voltage (V+–V
)
190 ˚C/W
235 ˚C/W
Output Short Circuit to V+ (Note 3)
Output Short Circuit to V− (Note 3)
Soldering Information
MSOP Package, 8-Pin Mini
Surface
Mount
SO Package, 14-Pin Surface
Mount
145 ˚C/W
155 ˚C/W
Infrared or Convection (20 sec)
Storage Temperature Range
Junction Temperature (Note 4)
235˚C
−65˚C to 150˚C
150˚C
TSSOP Package, 14-Pin
2.7V DC Electrical Characteristics
−
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 2.7V, V = 0V, VCM = 1.0V, VO = 1.35V and R
1 MΩ.
>
L
Boldface limits apply at the temperature extremes.
Typ
(Note 5)
LMV821/822/824
Limit (Note 6)
Symbol
Parameter
Condition
Units
VOS
Input Offset Voltage
1
3.5
mV
max
4
TCVOS
IB
Input Offset Voltage Average
Drift
1
µV/˚C
Input Bias Current
30
90
140
30
nA
max
nA
IOS
Input Offset Current
0.5
85
50
max
dB
CMRR
+PSRR
−PSRR
VCM
Common Mode Rejection Ratio 0V ≤ VCM ≤ 1.7V
70
68
min
dB
Positive Power Supply
Rejection Ratio
1.7V ≤ V+ ≤ 4V, V- = 1V, VO
0V, VCM = 0V
=
85
75
70
min
dB
Negative Power Supply
Rejection Ratio
-1.0V ≤ V- ≤ -3.3V, V+ =1.7V,
VO= 0V, VCM = 0V
85
73
70
min
V
Input Common-Mode Voltage
Range
For CMRR ≥ 50dB
-0.3
2.0
100
90
-0.2
max
V
1.9
min
dB
AV
Large Signal Voltage Gain
Sourcing, RL=600Ω to 1.35V,
VO=1.35V to 2.2V
90
85
85
80
95
90
90
85
min
dB
Sinking, RL=600Ω to 1.35V,
VO=1.35V to 0.5V
min
dB
Sourcing, RL=2kΩ to 1.35V,
VO=1.35V to 2.2V
100
95
min
dB
Sinking, RL=2kΩ to 1.35,
VO=1.35 to 0.5V
min
3
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2.7V DC Electrical Characteristics (Continued)
−
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 2.7V, V = 0V, VCM = 1.0V, VO = 1.35V and R
1 MΩ.
>
L
Boldface limits apply at the temperature extremes.
Typ
(Note 5)
LMV821/822/824
Limit (Note 6)
Symbol
Parameter
Output Swing
Condition
Units
V O
V+=2.7V, RL= 600Ω to 1.35V
2.58
0.13
2.66
0.08
16
2.50
2.40
0.20
0.30
2.60
2.50
0.120
0.200
12
V
min
V
max
V
V+=2.7V, RL= 2kΩ to 1.35V
min
V
max
mA
min
mA
min
mA
max
mA
max
mA
max
IO
Output Current
Supply Current
Sourcing, VO=0V
Sinking, VO=2.7V
LMV821 (Single)
LMV822 (Dual)
LMV824 (Quad)
26
12
IS
0.22
0.45
0.72
0.3
0.5
0.6
0.8
1.0
1.2
2.5V DC Electrical Characteristics
−
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 2.5V, V = 0V, VCM = 1.0V, VO = 1.25V and R
1 MΩ.
>
L
Boldface limits apply at the temperature extremes.
Typ
(Note 5)
LMV821/822/824
Limit (Note 6)
Symbol
Parameter
Condition
Units
VOS
Input Offset Voltage
1
3.5
4
mV
max
V
V O
Output Swing
V+=2.5V, RL= 600Ω to 1.25V
2.37
0.13
2.46
0.08
2.30
2.20
0.20
0.30
2.40
2.30
0.12
0.20
min
V
max
V
V+=2.5V, RL= 2kΩ to 1.25V
min
V
max
2.7V AC Electrical Characteristics
−
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 2.7V, V = 0V, VCM = 1.0V, VO = 1.35V and R
1 MΩ.
>
L
Boldface limits apply at the temperature extremes.
Typ
(Note 5)
LMV821/822/824 Limit
(Note 6)
Symbol
Parameter
Conditions
Units
SR
Slew Rate
(Note 7)
1.5
5
V/µs
MHz
Deg.
dB
GBW
Φm
Gain-Bandwdth Product
Phase Margin
61
10
135
28
Gm
Gain Margin
Amp-to-Amp Isolation
Input-Related Voltage Noise
(Note 8)
dB
en
f = 1 kHz, VCM = 1V
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4
2.7V AC Electrical Characteristics (Continued)
−
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 2.7V, V = 0V, VCM = 1.0V, VO = 1.35V and R
1 MΩ.
>
L
Boldface limits apply at the temperature extremes.
Typ
(Note 5)
LMV821/822/824 Limit
(Note 6)
Symbol
in
Parameter
Conditions
Units
Input-Referred Current Noise
f = 1 kHz
0.1
THD
Total Harmonic Distortion
f = 1 kHz, AV = −2,
RL = 10 kΩ, VO = 4.1 VPP
0.01
%
5V DC Electrical Characteristics
−
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 5V, V = 0V, VCM = 2.0V, VO = 2.5V and R
1 MΩ.
>
L
Boldface limits apply at the temperature extremes.
Typ
(Note 5)
LMV821/822/824
Limit (Note 6)
Symbol
Parameter
Condition
Units
VOS
Input Offset Voltage
1
3.5
mV
max
4.0
TCVOS
IB
Input Offset Voltage Average
Drift
1
µV/˚C
Input Bias Current
40
100
150
30
nA
max
nA
IOS
Input Offset Current
0.5
90
50
max
dB
CMRR
+PSRR
−PSRR
VCM
Common Mode Rejection Ratio 0V ≤ VCM ≤ 4.0V
72
70
min
dB
Positive Power Supply
Rejection Ratio
1.7V ≤ V+ ≤ 4V, V- = 1V, VO
0V, VCM = 0V
=
85
75
70
min
dB
Negative Power Supply
Rejection Ratio
-1.0V ≤ V- ≤ -3.3V, V+ =1.7V,
VO = 0V, VCM = 0V
85
73
70
min
V
Input Common-Mode Voltage
Range
For CMRR ≥ 50dB
-0.3
4.3
-0.2
max
V
4.2
min
dB
AV
Large Signal Voltage Gain
Sourcing, RL=600Ω to 2.5V,
VO=2.5 to 4.5V
105
105
105
105
4.84
0.17
4.90
0.10
95
90
min
dB
Sinking, RL=600Ω to 2.5V,
VO=2.5 to 0.5V
95
90
min
dB
Sourcing, RL=2kΩ to 2.5V,
VO=2.5 to 4.5V
95
90
min
dB
Sinking, RL=2kΩ to 2.5,
VO=2.5 to 0.5V
95
90
min
V
V O
Output Swing
V+=5V,RL= 600Ω to 2.5V
V+=5V, RL=2kΩ to 2.5V
4.75
4.70
0.250
.30
min
V
max
V
4.85
4.80
0.15
0.20
min
V
max
5
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5V DC Electrical Characteristics (Continued)
−
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 5V, V = 0V, VCM = 2.0V, VO = 2.5V and R
1 MΩ.
>
L
Boldface limits apply at the temperature extremes.
Typ
(Note 5)
LMV821/822/824
Limit (Note 6)
Symbol
IO
Parameter
Output Current
Condition
Sourcing, VO=0V
Units
45
20
15
mA
min
mA
Sinking, VO=5V
LMV821 (Single)
LMV822 (Dual)
LMV824 (Quad)
40
20
15
min
mA
IS
Supply Current
0.30
0.5
1.0
0.4
0.6
0.7
0.9
1.3
1.5
max
mA
max
mA
max
5V AC Electrical Characteristics
−
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 5V, V = 0V, VCM = 2V, VO = 2.5V and R
1 MΩ.
>
L
Boldface limits apply at the temperature extremes.
Typ
(Note 5)
LMV821/822/824 Limit
Symbol
Parameter
Conditions
Units
(Note 6)
SR
Slew Rate
(Note 7)
2.0
1.4
V/µs
min
GBW
Φm
Gain-Bandwdth Product
Phase Margin
5.6
67
MHz
Deg.
dB
Gm
Gain Margin
15
Amp-to-Amp Isolation
Input-Related Voltage Noise
(Note 8)
135
24
dB
en
f = 1 kHz, VCM = 1V
f = 1 kHz
in
Input-Referred Current Noise
Total Harmonic Distortion
0.25
0.01
THD
f = 1 kHz, AV = −2,
RL = 10 kΩ, VO = 4.1 VPP
%
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in-
tended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5 kΩ in series wth 100 pF. Machine model, 200Ω in series with 100 pF.
Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150˚C. Output currents in excess of 45 mA over long term may adversely affect reliability.
Note 4: The maximum power dissipation is a function of T
J(max)
, θ , and T . The maximum allowable power dissipation at any ambient temperature is P = (T -
JA
J
A
D
(max)–T )/θ . All numbers apply for packages soldered directly into a PC board.
A
JA
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
+
Note 7:
V
= 5V. Connected as voltage follower with 3V step input. Number specified is the slower of the positive and negative slew rates.
+
Note 8: Input referred, V = 5V and R = 100 kΩ connected to 2.5V. Each amp excited in turn with 1 kHz to produce V = 3 V .
PP
L
O
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6
5V AC Electrical Characteristics (Continued)
Typical Performance Characteristics Unless otherwise specified, VS = +5V, single supply, TA = 25˚C.
Supply Current vs Supply Voltage
(LMV821)
Sourcing Current vs Output
Voltage (VS=2.7V)
Input Current vs Temperature
DS100128-2
DS100128-1
DS100128-3
Sourcing Current vs Output
Voltage (VS=5V)
Sinking Current vs Output Voltage
(VS=2.7V)
Sinking Current vs Output Voltage
(VS=5V)
DS100128-4
DS100128-5
DS100128-6
Output Voltage Swing vs Supply
Voltage (RL=10kΩ)
Output Voltage Swing vs Supply
Voltage (RL=2kΩ)
Output Voltage Swing vs Supply
Voltage (RL=600Ω)
DS100128-7
DS100128-86
DS100128-8
7
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Typical Performance Characteristics Unless otherwise specified, VS = +5V, single supply,
TA = 25˚C. (Continued)
Output Voltage Swing vs Load
Resistance
Input Voltage Noise vs Frequency
Input Current Noise vs Frequency
DS100128-18
DS100128-17
DS100128-87
Crosstalk Rejection vs Frequency
+PSRR vs Frequency
-PSRR vs Frequency
DS100128-93
DS100128-9
DS100128-10
CMRR vs Frequency
Input Voltage vs Output Voltage
Gain and Phase Margin vs
Frequency (RL=100kΩ, 2kΩ, 600Ω)
2.7V
DS100128-88
DS100128-47
DS100128-11
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8
Typical Performance Characteristics Unless otherwise specified, VS = +5V, single supply,
TA = 25˚C. (Continued)
Gain and Phase Margin vs
Frequency (RL=100kΩ, 2kΩ, 600Ω)
5V
Gain and Phase Margin vs
Frequency (Temp.=25, -40, 85˚C,
RL= 10kΩ) 2.7V
Gain and Phase Margin vs
Frequency (Temp.=25, -40, 85 ˚C,
RL=10kΩ) 5V
DS100128-12
DS100128-13
DS100128-14
Gain and Phase Margin vs
Frequency (CL=100pF, 200pF, 0pF,
RL=10kΩ)2.7V
Gain and Phase Margin vs
Frequency (CL=100pF,200pF,0pF
RL=10kΩ)5V
Gain and Phase Margin vs
Frequency (CL=100pF,200pF,0pF
RL=600Ω)2.7V
DS100128-15
DS100128-16
DS100128-19
Gain and Phase Margin vs
Frequency (CL=100pF,200pF,0pF
RL=600Ω)5V
Slew Rate vs Supply Voltage
Non-Inverting Large Signal Pulse
Response
DS100128-62
DS100128-21
DS100128-20
9
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Typical Performance Characteristics Unless otherwise specified, VS = +5V, single supply,
TA = 25˚C. (Continued)
Non-Inverting Small Signal Pulse
Response
Inverting Large Signal Pulse
Response
Inverting Small Signal Pulse
Response
DS100128-24
DS100128-27
DS100128-30
THD vs Frequency
DS100128-82
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10
APPLICATION NOTE
This application note is divided into two sections: design
considerations and Application Circuits.
1.0 Design Considerations
This section covers the following design considerations:
1. Frequency and Phase Response Considerations
2. Unity-Gain Pulse Response Considerations
3. Input Bias Current Considerations
1.1 Frequency and Phase Response Considerations
The relationship between open-loop frequency response
and open-loop phase response determines the closed-loop
stability performance (negative feedback). The open-loop
phase response causes the feedback signal to shift towards
becoming positive feedback, thus becoming unstable. The
further the output phase angle is from the input phase angle,
the more stable the negative feedback will operate. Phase
Margin (φm) specifies this output-to-input phase relationship
at the unity-gain crossover point. Zero degrees of phase-
margin means that the input and output are completely in
phase with each other and will sustain oscillation at the unity-
gain frequency.
DS100128-61
FIGURE 2. Unity-Gain Frequency vs Common Mode
Voltage for Various Loads
1.2 Unity Gain Pulse Response Considerations
A pull-up resistor is well suited for increasing unity-gain,
pulse response stability. For example, a 600 Ω pull-up resis-
tor reduces the overshoot voltage by about 50%, when driv-
ing a 220 pF load. Figure 3 shows how to implement the
pull-up resistor for more pulse response stability.
The AC tables show φm for a no load condition. But φm
changes with load. The Gain and Phase margin vs Fre-
quency plots in the curve section can be used to graphically
determine the φm for various loaded conditions. To do this,
examine the phase angle portion of the plot, find the phase
margin point at the unity-gain frequency, and determine how
far this point is from zero degree of phase-margin. The larger
the phase-margin, the more stable the circuit operation.
The bandwidth is also affected by load. The graphs of Figure
1 and Figure 2 provide a quick look at how various loads af-
fect the φm and the bandwidth of the LMV821/822/824 family.
These graphs show capacitive loads reducing both φm and
bandwidth, while resistive loads reduce the bandwidth but in-
crease the φm. Notice how a 600Ω resistor can be added in
parallel with 220 picofarads capacitance, to increase the φm
20˚(approx.), but at the price of about a 100 kHz of band-
width.
DS100128-41
FIGURE 3. Using a Pull-up Resistor at the Output for
Stabilizing Capacitive Loads
Higher capacitances can be driven by decreasing the value
of the pull-up resistor, but its value shouldn’t be reduced be-
yond the sinking capability of the part. An alternate approach
is to use an isolation resistor as illustrated in Figure 4 .
Overall, the LMV821/822/824 family provides good stability
for loaded condition.
Figure 5 shows the resulting pulse response from a LMV824,
while driving a 10,000pF load through a 20 Ω isolation
resistor.
DS100128-43
FIGURE 4. Using an Isolation Resistor to Drive Heavy
Capacitive Loads
DS100128-60
FIGURE 1. Phase Margin vs Common Mode Voltage for
Various Loads
11
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2.1 Telephone-Line Transceiver
The telephone-line transceiver of Figure 7 provides a full-
duplexed connection through a PCMCIA, miniature trans-
former. The differential configuration of receiver portion
(UR), cancels reception from the transmitter portion (UT).
Note that the input signals for the differential configuration of
UR, are the transmit voltage (Vt) and Vt/2. This is because
R
match is chosen to match the coupled telephone-line imped-
>>
ance; therefore dividing Vt by two (assuming R1
Rmatch).
The differential configuration of UR has its resistors chosen
to cancel the Vt and Vt/2 inputs according to the following
equation:
DS100128-54
FIGURE 5. Pulse Response per Figure 4
1.3 Input Bias Current Consideration
Input bias current (IB) can develop a somewhat significant
offset voltage. This offset is primarily due to IB flowing
through the negative feedback resistor, RF. For example, if IB
is 90nA (max room) and RF is 100 kΩ, then an offset of 9 mV
will be developed (VOS=IBx RF).Using a compensation resis-
tor (RC), as shown in Figure 6, cancels out this affect. But the
input offset current (IOS) will still contribute to an offset volt-
age in the same manner - typically 0.05 mV at room temp.
DS100128-33
FIGURE 7. Telephone-line Transceiver for a PCMCIA
Modem Card
Note that Cr is included for canceling out the inadequacies of
the lossy, miniature transformer. Refer to application note
AN-397 for detailed explanation.
2.2“Simple” Mixer (Amplitude Modulator)
The mixer of Figure 8 is simple and provides a unique form
of amplitude modulation. Vi is the modulation frequency
(FM), while a +3V square-wave at the gate of Q1, induces a
carrier frequency (FC). Q1 switches (toggles) U1 between in-
verting and non-inverting unity gain configurations. Offset-
ting a sine wave above ground at Vi results in the oscillo-
scope photo of Figure 9.
The simple mixer can be applied to applications that utilize
the Doppler Effect to measure the velocity of an object. The
difference frequency is one of its output frequency compo-
nents. This difference frequency magnitude (/FM-FC/) is the
key factor for determining an object’s velocity per the Dop-
pler Effect. If a signal is transmitted to a moving object, the
reflected frequency will be a different frequency. This differ-
ence in transmit and receive frequency is directly propor-
tional to an object’s velocity.
DS100128-59
FIGURE 6. Canceling the Voltage Offset Effect of Input
Bias Current
2.0 APPLICATION CIRCUITS
This section covers the following application circuits:
1. Telephone-Line Transceiver
2. “Simple” Mixer (Amplitude Modulator)
3. Dual Amplifier Active Filters (DAAFs)
•
•
a. Low-Pass Filter (LPF)
b. High-Pass Filter (HPF)
5. Tri-level Voltage Detector
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12
DS100128-39
FIGURE 8. Amplitude Modulator Circuit
DS100128-36
FIGURE 10. Dual Amplifier, 3 kHz Low-Pass Active
Filter with a Butterworth Response and a Pass Band
Gain of Times Two
f
mod
f
carrier
DS100128-40
FIGURE 9. Output signal per the Circuit of Figure 8
2.4 Dual Amplifier Active Filters (DAAFs)
The LMV822/24 bring economy and performance to DAAFs.
The low-pass and the high-pass filters of Figure 10 and Fig-
ure 11 (respectively), offer one key feature: excellent sensi-
tivity performance. Good sensitivity is when deviations in
component values cause relatively small deviations in a fil-
ter’s parameter such as cutoff frequency (Fc). Single ampli-
fier active filters like the Sallen-Key provide relatively poor
sensitivity performance that sometimes cause problems for
high production runs; their parameters are much more likely
to deviate out of specification than a DAAF would. The
DAAFs of Figure 10 and Figure 11 are well suited for high
volume production.
DS100128-37
FIGURE 11. Dual Amplifier, 300 Hz High-Pass Active
Filter with a Butterworth Response and a Pass Band
Gain of Times Two
Table 1 provides sensitivity measurements for a 10 MΩ load
condition. The left column shows the passive components
for the 3 kHz low-pass DAAF. The third column shows the
components for the 300 Hz high-pass DAAF. Their respec-
tive sensitivity measurements are shown to the right of each
component column. Their values consists of the percent
change in cutoff frequency (Fc) divided by the percent
change in component value. The lower the sensitivity value,
the better the performance.
Each resistor value was changed by about 10 percent, and
this measured change was divided into the measured
change in Fc. A positive or negative sign in front of the mea-
sured value, represents the direction Fc changes relative to
components’ direction of change. For example, a sensitivity
value of negative 1.2, means that for a 1 percent increase in
component value, Fc decreases by 1.2 percent.
Note that this information provides insight on how to fine
tune the cutoff frequency, if necessary. It should be also
noted that R4 and R5 of each circuit also caused variations in
13
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the pass band gain. Increasing R4 by ten percent, increased
the gain by 0.4 dB, while increasing R5 by ten percent, de-
creased the gain by 0.4 dB.
TABLE 1.
Component (HPF)
Component (LPF)
Sensitivity (LPF)
Sensitivity (HPF)
Ra
C1
R2
R3
C3
R4
R5
-1.2
-0.1
-1.1
+0.7
-1.5
-0.6
+0.6
Ca
Rb
R1
C2
R3
R4
R5
-0.7
-1.0
+0.1
-0.1
+0.1
-0.1
+0.1
Active filters are also sensitive to an op amp’s parameters
-Gain and Bandwidth, in particular. The LMV822/24 provide
a large gain and wide bandwidth. And DAAFs make excel-
lent use of these feature specifications.
To simplify the design process, certain components are set
equal to each other. Refer to Figure 10 and Figure 11. These
equal component values help to simplify the design equa-
tions as follows:
Single Amplifier versions require
a large open-loop to
closed-loop gain ratio - approximately 50 to 1, at the Fc of
the filter response. Figure 12 shows an impressive photo-
graph of a network analyzer measurement (hp3577A). The
measurement was taken from a 300kHz version of Figure
@
10. At 300 kHz, the open-loop to closed-loop gain ratio Fc
is about 5 to 1. This is 10 times lower than the 50 to 1 “rule
of thumb” for Single Amplifier Active Filters.
To illustrate the design process/implementation, a 3 kHz,
Butterworth response, low-pass filter DAAF (Figure 10) is
designed as follows:
1. Choose C1 = C3 = C = 1 nF
2. Choose R4 = R5 = 1 kΩ
3. Calculate Ra and R2 for the desired Fc as follows:
DS100128-92
FIGURE 12. 300 kHz, Low-Pass Filter, Butterworth
Response as Measured by the HP3577A Network
Analyzer
4. Calculate R3 for the desired Q. The desired Q for a Butter-
worth (Maximally Flat) response is 0.707 (45 degrees into
the s-plane). R3 calculates as follows:
In addition to performance, DAAFs are relatively easy to de-
sign and implement. The design equations for the low-pass
and high-pass DAAFs are shown below. The first two equa-
tion calculate the Fc and the circuit Quality Factor (Q) for the
LPF (Figure 10). The second two equations calculate the Fc
and Q for the HPF (Figure 11).
Notice that R3 could also be calculated as 0.707 of Ra or R2.
The circuit was implemented and its cutoff frequency mea-
sured. The cutoff frequency measured at 2.92 kHz.
The circuit also showed good repeatability. Ten different
LMV822 samples were placed in the circuit. The correspond-
ing change in the cutoff frequency was less than a percent.
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14
2.5 Tri-level Voltage Detector
stops and the op amp responds open loop. The design equa-
tion directly preceding Figure 14, shows how to determine
the clamping range. The equation solves for the input volt-
age band on each side GND. The mid-range is twice this
voltage band.
The tri-level voltage detector of Figure 13 provides a type of
window comparator function. It detects three different input
voltage ranges: Min-range, Mid-range, and Max-range. The
output voltage (VO) is at VCC for the Min-range. VO is
clamped at GND for the Mid-range. For the Max-range, VO is
at Vee. Figure 14 shows a VO vs. VI oscilloscope photo per
the circuit of Figure 13.
Its operation is as follows: VI deviating from GND, causes
the diode bridge to absorb IIN to maintain a clamped condi-
tion (VO= 0V). Eventually, IIN reaches the bias limit of the di-
ode bridge. When this limit is reached, the clamping effect
DS100128-89
|
∆v
|
∆v
|
OV
+V
IN
DS100128-35
-V
IN
OV
FIGURE 14. X, Y Oscilloscope Trace showing VOUT vs
DS100128-34
VIN per the Circuit of Figure 13
FIGURE 13. Tri-level Voltage Detector
15
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SC70-5 Tape and Reel Specification
DS100128-96
SOT-23-5 Tape and Reel Specification
Tape Format
Tape Section
Leader
# Cavities
0 (min)
75 (min)
3000
Cavity Status
Empty
Cover Tape Status
Sealed
(Start End)
Carrier
Empty
Sealed
Filled
Sealed
250
Filled
Sealed
Trailer
125 (min)
0 (min)
Empty
Sealed
(Hub End)
Empty
Sealed
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16
Tape Dimensions
DS100128-97
±
±
±
0.315 0.012
8 mm
0.130
(3.3)
0.124
(3.15)
0.130
(3.3)
0.126
(3.2)
0.138 0.002
0.055 0.004
0.157
(4)
±
±
±
(3.5 0.05)
(1.4 0.11)
(8 0.3)
Tape Size
DIM A
DIM Ao
DIM B
DIM Bo
DIM F
DIM Ko
DIM P1
DIM W
17
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Reel Dimensions
DS100128-98
8 mm
7.00 0.059 0.512 0.795 2.165 0.331 + 0.059/−0.000 0.567
W1+ 0.078/−0.039
330.00 1.50 13.00 20.20 55.00
8.40 + 1.50/−0.00
14.40
W1 + 2.00/−1.00
Tape Size
A
B
C
D
N
W1
W2
W3
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18
Physical Dimensions inches (millimeters) unless otherwise noted
SC70-5
Order Number LMV821M7 or LMV821M7X
NS Package Number MAA05
19
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
SOT 23-5
Order Number LMV821M5 or LMV821M5X
NS Package Number MA05B
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20
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Pin Small Outline
Order Number LMV822M or LMV822MX
NS Package Number M08A
21
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Pin MSOP
Order Number LMV822MM or LMV822MMX
NS Package Number MUA08A
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22
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Pin Small Outline
Order Number LMV824M or LMV824MX
NS Package Number M14A
23
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Pin TSSOP
Order Number LMV824MTC or LMV824MTCX
NS Package Number MTC14
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2. A critical component is any component of a life
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