LMX9820 [NSC]
Bluetooth Serial Port Module; 蓝牙串口模块型号: | LMX9820 |
厂家: | National Semiconductor |
描述: | Bluetooth Serial Port Module |
文件: | 总40页 (文件大小:559K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
June 2004
LMX9820
Bluetooth™ Serial Port Module
The firmware supplied within this device offers a complete
Bluetooth (v1.1) stack including profiles and command
interface. This firmware features point-to-point and point-
to-multipoint link management supporting data rates up to
the theoretical maximum over RFComm of 704 kbps. The
internal memory supports up to three active Bluetooth
links.
1.0 General Description
®
The National Semiconductor LMX9820 Bluetooth™ Serial
Port module is a highly integrated radio, baseband control-
ler and memory device implemented on an LTCC (Low
Temperature Co-fired Ceramic) substrate. All hardware
and firmware is included to provide a complete solution
from antenna through the complete lower and upper layers
of the Bluetooth stack, up to the application including the
Generic Access Profile (GAP), the Service Discovery Appli-
cation Profile (SDAP), and the Serial Port Profile (SPP).
The module includes a configurable service database to
fulfil service requests for additional profiles on the host.
The LMX9820 features a small form factor (10.1 x 14.0 x
1.9 mm) design; thus, solving many of the challenges
associated with system integration. Moreover, the
LMX9820 is pre-qualified as a Bluetooth Integrated Com-
ponent. Conformance testing through the Bluetooth qualifi-
cation program enables a short time to market after system
integration by insuring a high probability of compliance and
interoperability.
1.1 APPLICATIONS
■ Personal Digital Assistants
■ POS Terminals
■ Data Logging Systems
™
Based on National’s CompactRISC 16-bit processor
architecture and Digital Smart Radio technology, the
LMX9820 is optimized to handle the data and link manage-
ment processing requirements of a Bluetooth node.
2.0 Functional Block Diagram
UART_RX
UART_TX
FIRMWARE
(INCLUDES
LINK
MGMNT
UART
UART_RTS#
UART_CTS#
PROFILES AND
COMMAND
PROCESSOR
(LMP)
INTERFACE)
IOVCC
TX_SWITCH_P
ENV0
ENV1
AUX
LSTAT_0
LSTAT_1
HOST_WU
RESET_B#
RESET_5100#
LNA
PORTS
DIGITAL
SMART
RADIO
BASEBAND
COMPACTRISC™
CORE
TR
SW
CONTROLLER
PA
ISEL1
ISEL2
INTERFACE
SELECT
FLASH
RAM
JTAG
SYNTHESIZER
VDD_ANA_OUT
ANALOG
DIGITAL
VOLTAGE
VDD_DIG_OUT
REGULATORS
VDD_DIG_PWR_D#
CRYSTAL/OSCILLATOR
VCC
DIG_GND[1:2]
CompactRISC is a trademark of National Semiconductor Corporation.
Bluetooth is a trademark of Bluetooth SIG, Inc. and is used under license by National Semiconductor.
www.national.com
© 2004 National Semiconductor Corporation
■ On-chip application including:
3.0 Features
– Command Interface:
■ Bluetooth version 1.1 qualified
– Link setup and configuration (also Multipoint)
– Configuration of the module
– In system programming
■ Implemented in CMOS technology on LTCC substrate.
■ Temperature Range: -40°C to +85°C
– Service database modifications
– Default connections
– UART Transparent mode
3.1 DIGITAL HARDWARE
■ Baseband and Link Management processors
■ CompactRISC Core
– Different Operation modes:
– Automatic mode
– Command mode
■ Integrated Memory:
– Flash
– RAM
3.3 DIGITAL SMART RADIO
■ Accepts external clock or crystal input:
– 12 MHz
■ UART Command/Data Port:
– Support for up to 921.6k baud rate
■ Auxiliary Host Interface Ports:
– Link Status
– 20 ppm cumulative clock error required for Bluetooth
■ Synthesizer:
– Transceiver Status (Tx or Rx)
– Operating Environment Control:
– Integrated VCO and loop filter
– Provides all clocking for radio and baseband func-
tions
– Default Bluetooth mode
– In System Programming (ISP) mode
■ Advanced Power Management (APM) features
■ Antenna Port (50 Ohms nominal impedance):
– Embedded front-end filter for enhanced out of band
performance
3.2 FIRMWARE
■ Integrated transmit/receive switch (full duplex operation
■ Complete Bluetooth Stack including:
– Baseband and Link Manager
– L2CAP, RFCOMM, SDP
– Profiles:
via antenna port)
■ Embedded Balun
■ Better than -77 dBm input sensitivity
■ 0 dBm typical output power
– GAP
– SDAP
– SPP
3.4 PHYSICAL
■ Compact size - 10.1mm x 14.0mm x 1.9mm
■ Additional Profile support on Host for:
■ Complete system interface provided in Land Grid Array
– Dial Up Networking (DUN)
– Facsimile Profile (FAX)
– File Transfer Protocol (FTP)
– Object Push Profile (OPP)
– Synchronization Profile (SYNC)
on underside for surface mount assembly
■ Metal shield included
Figure 1. Physical Illustration
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2
Table of Contents
1.0
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1 APPLICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
9.0
System Power-Up Sequence . . . . . . . . . . . . . . . . . . . 20
10.0 Integrated Firmware . . . . . . . . . . . . . . . . . . . . . . . . . . 21
10.1 FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
10.1.1 Operation Modes . . . . . . . . . . . . . . . . . . . . . . 21
10.1.2 Default Connections . . . . . . . . . . . . . . . . . . . . 21
10.1.3 Event Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
10.1.4 Default Link Policy . . . . . . . . . . . . . . . . . . . . . 21
11.0 Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
11.1 POWER MODES . . . . . . . . . . . . . . . . . . . . . . . . 23
11.2 ENABLING AND DISABLING UART
2.0
3.0
3.1
3.2
3.3
3.4
DIGITAL HARDWARE . . . . . . . . . . . . . . . . . . . . . . 2
FIRMWARE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
DIGITAL SMART RADIO . . . . . . . . . . . . . . . . . . . . 2
PHYSICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
4.0
5.0
6.0
Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pad Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . .8
TRANSPORT
23
6.1
6.2
6.3
6.4
GENERAL SPECIFICATIONS . . . . . . . . . . . . . . . . 8
DC CHARACTERISTICS . . . . . . . . . . . . . . . . . . . 9
RF PERFORMANCE CHARACTERISTICS . . . .10
PERFORMANCE DATA (TYPICAL) . . . . . . . . . . 12
11.2.1 Hardware Wake up functionality . . . . . . . . . . . 23
11.2.2 Disabling the UART transport layer . . . . . . . . 23
11.2.3 LMX9820 enabling the UART interface . . . . . 23
11.2.4 Enabling the UART transport layer
7.0
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . 14
from the host
23
7.1
BASEBAND AND LINK MANAGEMENT
PROCESSORS
12.0 Command Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
12.1 FRAMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
12.1.1 Start and End Delimiter . . . . . . . . . . . . . . . . . . 24
12.1.2 Packet Type ID . . . . . . . . . . . . . . . . . . . . . . . . 24
12.1.3 Opcode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
12.1.4 Data Length . . . . . . . . . . . . . . . . . . . . . . . . . . 24
12.1.5 Checksum: . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
12.2 COMMAND SET OVERVIEW . . . . . . . . . . . . . . 25
13.0 Usage Scenarios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
13.1 SCENARIO 1: POINT-TO-POINT
14
7.1.1 Bluetooth Lower Link Controller . . . . . . . . . . . . 14
7.1.2 Bluetooth Upper Layer Stack . . . . . . . . . . . . . .14
7.1.3 Profile support . . . . . . . . . . . . . . . . . . . . . . . . .14
7.1.4 Application with command interface . . . . . . . . . 14
7.2
7.3
7.4
MEMORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
CONTROL AND TRANSPORT PORT . . . . . . . . . 15
AUXILIARY PORTS . . . . . . . . . . . . . . . . . . . . . . . 15
7.4.1 Reset_5100 and Reset_b . . . . . . . . . . . . . . . . 15
7.4.2 Operating Environment Pads
CONNECTION
29
(Env0 and Env1)
15
13.2 SCENARIO 2: AUTOMATIC POINT-TO-POINT
CONNECTION
13.3 SCENARIO 3: POINT-TO-MULTIPOINT CONNEC-
7.4.3 Interface Select Inputs (ISEL1, ISEL2) . . . . . .15
7.4.4 Module and LInk Status Outputs . . . . . . . . . . . 15
Digital Smart Radio . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
30
8.0
TION
31
8.1
8.2
8.3
8.4
8.5
8.6
8.7
RADIO RECEIVER . . . . . . . . . . . . . . . . . . . . . . .16
LOW NOISE AMPLIFIER (LNA) . . . . . . . . . . . . . 16
RX MIXER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
CHANNEL SELECT FILTER . . . . . . . . . . . . . . . .16
LIMITER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
FM DISCRIMINATOR . . . . . . . . . . . . . . . . . . . . . 16
RECEIVE SIGNAL STRENGTH INDICATOR
(RSSI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
RADIO TRANSMITTER . . . . . . . . . . . . . . . . . . . .16
MODULATOR . . . . . . . . . . . . . . . . . . . . . . . . . . .16
14.0 Application Information . . . . . . . . . . . . . . . . . . . . . . . 32
14.1 MATCHING NETWORK . . . . . . . . . . . . . . . . . . . 32
14.2 FILTERED POWER SUPPLY . . . . . . . . . . . . . . . 32
14.3 HOST INTERFACE . . . . . . . . . . . . . . . . . . . . . . 32
14.4 CLOCK INPUT . . . . . . . . . . . . . . . . . . . . . . . . . . 32
14.5 SCHEMATIC AND LAYOUT EXAMPLES . . . . . 32
15.0 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
16.0 Datasheet Revision History . . . . . . . . . . . . . . . . . . . . 38
17.0 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.8
8.9
8.10 TRANSMIT FREQUENCY OUTPUT . . . . . . . . . . 16
8.11 FREQUENCY SYNTHESIZERS . . . . . . . . . . . . . 16
8.12 CRYSTAL CIRCUIT . . . . . . . . . . . . . . . . . . . . . . . 16
8.13 EXTERNAL CRYSTAL OSCILLATORS . . . . . . . 16
8.13.1 Crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
8.13.2 TCXO (Temperature Compensated Crystal
Oscillator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Revision 1.0
3
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4.0 Connection Diagram
1
2
3
4
5
6
7
8
9
10
11
12
13
A
B
C
D
E
F
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
PI1_
Tx_rx_
Tx_rx_
synch
CCB_
Clock
BBCLK PI2_TP12
RF_CE_TP11 clock
RF GND RF GND RF GND RF GND RF GND RF GND
RF GND RF GND RF GND RF GND RF GND RF GND
Clk-
Clk+
AAI_srd
Env1
AAI_std
32kHz_CLKI
Tx_rx_
data
Uart_rx
Uart_rts#
AAI_sfs
AAI_sclk 32kHz_CLKO
RF GND RF GND RF GND RF GND RF GND RF GND CCB_data Uart_tx Uart_cts#
Reset_ Dig_gnd_1
5100#
NC
NC
RF GND RF GND RF GND RF GND RF GND RF GND
RF GND RF GND RF GND RF GND RF GND RF GND
Lstat_0
Lstat_1
Env0
Host_wu
J_tms
J_rdy
J_tdi
J_tck
USB_D+ USB_D-
J_tdo
USB_VCC PH3_TP9
G
H
J
RF GND RF GND RF GND RF GND RF GND
NC
Reset_b#
Dig_gnd_2 USB_Gnd PH2_TP8
VCC
TX_
NC
RF GND RF GND RF GND RF_inout RF GND RF GND RF GND
IOVCC
ISEL2
ISEL1
Switch_P
NC
VDD_ANA_OUT
VDD_DIG_OUT NC
VDD_DIG_PWR_D#
NC
NC
NC
NC
CCB_
latch
NC
X-Ray (Top View)
Figure 2. Connection Diagram LMX9820
Table 1. Order Information
Order Number
LMX9820SB
Shipment Method
Tray
LMX9820SBX
Tape & Reel
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4
5.0 Pad Descriptions
Table 2. System Interface Signals
Pad Name
Pad
Direction
Description
Location
Clk-
B8
Input
Input
Xtal g or Negative Clock Input. Typically connected along with
XTAL_D to an external surface mount AT cut crystal. Can also be con-
figured as a frequency input when using an external crystal oscillator.
When configured as a frequency input, typically connected to Ground
with a 10 pF capacitor.
Clk+
B9
Xtal d or Positive Clock Input. Typically connected along with
XTAL_G to an external surface mount AT cut crystal. Can also be con-
figured as a frequency input when using an external crystal oscillator.
When configured as a frequency input, is typically connected to an ex-
ternal Temperature Compensated Crystal Oscillator (TCXO) through
an Alternating Current (AC) coupling capacitor.
32kHz_CLKI
32kHz_CLKO
RF_inout
B13
C13
H8
Input
Output
32 kHz Clock input. Not supported. Place pad and do not connect to
VCC or Ground.
32 kHz Clock Output. Not supported. Place pad and do not connect to
VCC or Ground.
Input/Output
RF Antenna Port. 50Ω nominal impedance. Typically connected to an
antenna through a 6.8pF capacitor.
ISEL2
ISEL1
H13
J13
Input
Input
Module Interface Select Input Bit 1.
Module Interface Select Input Bit 0.
Table 3. USB Interface Signals (Not supported by lmx9820 firmware)
Pad Name
Pad
Location
Direction
Description
1
USB_VCC
USB_D+
USB_D-
F12
E11
E12
G12
Input
USB Transceiver Power Supply +
1
Input/Output
Input/Output
Input
USB Data Positive
1
USB Data Negative
1
USB_Gnd
USB Transceiver Ground
1. Treat as No Connect, Pad required for mechanical stability.
Table 4. UART Interface Signals
Pad Name
Pad
Location
Direction
Description
Uart_tx
D9
C9
Output
Input
UART Host Control Interface Transport, Transmit Data.
UART Host Control Interface Transport, Receive Data.
UART Host Control Interface Transport, Request to Send.
UART Host Control Interface Transport, Clear to Send.
Uart_rx
Uart_rts#
Uart_cts#
C10
D10
Output
Input
Revision 1.0
5
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5.0 Pad Descriptions (Continued)
Table 5. Auxiliary Ports Interface Signals
Pad Name
Pad
Location
Direction
Description
IOVCC
H12
G8
Input
Input
Input
2.85V to 3.6V Logic Threshold Program Input.
Reset_b#
Reset_5100#
Reset Input for Smart Radio. Normally connected to Reset_5100.
D11
Reset for Baseband and Link Management Processors. Active
low.
Lstat_0
Lstat_1
Host_wu
Env0
E8
F8
Output
Output
Output
Input
Link Status Bit 0.
Link Status Bit 1.
F9
Host Wakeup
E9
Module Operating Environment Bit 0.
Module Operating Environment Bit 1.
Transceiver Status, 0 = Receive; 1 = Transmit.
Env1
B11
H3
Input
TX_Switch_P
Output
Table 6. Audio Port Interface Signals (not supported by LMX9820 Firmware)
Pad Name
Pad
Location
Direction
Description
1
AAI_srd
AAI_std
AAI_sfs
AAI_sclk
B10
B12
C11
C12
Input
Advanced Audio Interface Receive Data Input.
1
Output
Advanced Audio Interface Transmit Data Output.
1
Input/Output
Input/Output
Advanced Audio Interface Frame Synchronization.
1
Advanced Audio Interface Clock.
1. Treat as No Connect, Pad required for mechanical stability.
Table 7. Test Interface Signals
Pad Name
Pad
Direction
Description
Location
1
J_rdy
J_tdi
E10
F10
F11
G9
Output
Input
JTAG Ready.
1
1
JTAG Test Data.
J_tdo
J_tms
J_tck
Input/Output
Input/Output
Input
JTAG Test Data.
1
JTAG Test Mode Select.
1
G10
A8
JTAG Test Clock.
1
PI1_RFCE_TP1
1
Testpin
Module Test Point.
1
PI2_TP12
Tx_rx_clock
Tx_rx_data
Tx_rx_synch
CCB_Clock
CCB_data
CCB_latch
BBCLK
A13
A9
Testpin
Testpin
Testpin
Testpin
Testpin
Testpin
Testpin
Testpin
Module Test Point.
1
Module Test Point.
1
C8
Module Test Point.
1
A10
A11
D8
Module Test Point.
1
Module Test Point.
1
Module Test Point.
1
J12
A12
Module Test Point.
1
Module Test Point.
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6
5.0 Pad Descriptions (Continued)
Table 7. Test Interface Signals (Continued)
Pad Name
Pad
Location
Direction
Description
1
1
PH3_TP9
PH2_TP8
F13
G13
Testpin
Testpin
Module Test Point.
Module Test Point.
1. Treat as No Connect, Pad required for mechanical stability.
Table 8. Power, Ground, and No Connect Signals
Pad Name
Pad
Direction
Description
Location
NC
A1, A2, A3, A4, A5,
A6, A7, B1, C1, D1,
D13, E1, E13, F1,
G1, G7, H1, H4, J1,
J3, J6, J7, J9, J10,
J11
not
No Connect. Must have pad for mechanical stability.
connected
Input
1
B2, B3, B4, B5, B6,
B7, C2, C3, C4, C5,
C6, C7, D2, D3, D4,
D5, D6, D7, E2, E3,
E4, E5, E6, E7, F2,
F3, F4, F5, F6, F7,
G2, G3, G4, G5,
G6, H5, H6, H7, H9,
H10, H11
Radio System Ground. Must be connected to RF Ground
plane. Thermal relief required for proper soldering.
RF GND
1
D12
G11
H2
Input
Input
Input
Digital Ground.
Digital Ground.
Dig_gnd_1
1
Dig_gnd_2
VCC
2.85V to 3.6V Input for the Internal Power Supply Reg-
ulators.
VDD_ANA_OUT
VDD_DIG_OUT
J2
J5
J4
Output
Output
Input
Voltage Regulator Output/Power Supply for Analog
Circuitry. If not used, place pad and do not connect to VCC
or Ground.
Voltage Regulator Output/Power Supply for Digital Cir-
cuitry. If not used, place pad and do not connect to VCC or
Ground.
VDD_DIG_PWR
_D#
Power Down for the Internal Power Supply Regulator
for the Digital Circuitry. Place pad and do not connect to
VCC or Ground.
1. Connect RF GND, Dig_gnd_1, and Dig_gnd_2 to single Ground plane.
Revision 1.0
7
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The following conditions are true unless otherwise stated in
the tables below:
6.0 Electrical Specifications
6.1 GENERAL SPECIFICATIONS
•
•
•
T = -40°C to +85°C
A
Absolute Maximum Ratings (see Table 9) indicate limits
beyond which damage to the device may occur. Operating
Ratings (see Table 10) indicate conditions for which the
device is intended to be functional.
VCC = 3.3V
RF system performance specifications are guaranteed
on National Semiconductor Austin Board rev1.0b refer-
ence design platform.
This device is a high performance RF integrated circuit and
is ESD sensitive. Handling and assembly of this device
should be performed at ESD free workstations.
Table 9. Absolute Maximum Ratings
Min
Symbol
VCC
Parameter
Max
Unit
Core Logic Power Supply Voltage
I/O Power Supply Voltage
2.25
2.25
2.97
3.6
V
V
V
IOVCC
3.6
1
USB Power Supply Voltage
3.63
USB_VCC
V
Voltage on any pad with GND = 0V
-0.5
VCC + 0.5
V
I
PinRF
RF Input Power
+15
dBm
o
T
T
Storage Temperature Range
-65
+150
S
L
C
o
Lead Temperature (solder 4 sec)
+260
C
ESD-HBM
ESD-MM
ESD - Human Body Model
ESD - Machine Model
2000
200
V
V
1. USB Interface not supported by LMX9820 firmware. Treat as no connect, place pad for mechanical stability.
1
Table 10. Recommended Operating Conditions
2
Symbol
Parameter
Min
Max
Unit
Typ
3.3
3.3
3.3
VCC
Module Power Supply Voltage
I/O Power Supply Voltage
USB Power Supply Voltage
2.85
2.85
2.97
3.6
3.6
V
V
V
IOVCC
3
3.63
USB_VCC
t
Module Power Supply Rise Time
Operating Temperature Range
50
+85
90
ms
°C
%
R
T
-40
10
O
HUM
Humidity (operating, across operating
temperature range)
OP
o
HUM
5
95
%
NONOP Humidity (non-operating, 38.7 C web bulb
temperature)
1. Maximum voltage difference allowed between VCC and IOVCC is 500 mV.
2. Typical operating conditions are at 3.3V operating voltage and 25°C ambient temperature.
3. USB Interface not supported by LMX9820 firmware. Treat as no connect, place pad for mechanical stability.
Table 11. Power Supply Electrical Specifications: Analog and Digital LDOs
1
Symbol
Parameter
Min
2.20
2.40
Max
2.75
2.75
Unit
Typ
2
VDD_ANA_OUT
VDD_DIG_OUT
2.54
V
V
Analog Voltage Output Range
3
2.60
Digital Voltage Output Range
o
1. Typical operating conditions are at 3.3V operating voltage and 25 C ambient temperature.
2. Set in factory at 2.5V nominal output.
3. Set in factory at 2.6V nominal output.
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8
6.0 Electrical Specifications (Continued)
NOTE: The voltage regulators are optimized for the internal
operation of the LMX9820. As any noise or coupling into
those can have influence on the radio performance, it is
highly recommended to have no additional load on those
outputs.
1,2,3
Table 12. Power Supply Requirements
Min
Symbol
Parameter
Typ
Max
Unit
I
I
I
I
I
I
I
Power supply current for continous transmit
Power supply current for continous receive
56
80
mA
CC-TX
CC-RX
RXSL
RXM
62
33
78
mA
mA
mA
mA
mA
mA
4
Receive Data in SPP Link, Slave
4
27
Receive Data in SPP Link, Master
4
12.3
7
SnM
Sniff Mode, Sniffintervall 1 second
4
SC-TLDIS
Idle
Scanning, No Active Link, TL Disabled
4
5.7
Idle, Scanning Disabled, TL Disabled
1. Power supply requirements based on Class II output power.
2. VCC = 3.0V, IOVCC = 3.3V, Ambient Temperature = +25 °C.
3. Based on UART Baudrate 115.2kbit/s.
4. Average values
6.2 DC CHARACTERISTICS
Table 13. Digital DC Characteristics
Condition
Symbol
VCC
Parameter
Min
Max
3.6
Units
Core Logic Supply Voltage
IO Supply Voltage
Logical 1 Input Voltage
2.85
2.85
V
V
V
IOVCC
3.6
V
V
0.7*IOVCC
IOVCC + 0.5
0.2*IOVCC
0.3*IOVCC
IH
IL
Logical 0 Input Voltage
-0.5
-0.5
V
V
1
32.768kHz Logical 0 Input Voltage
32.768kHz Logical 1 Input Voltage
External 32.768kHz clock
External 32.768kHz clock
V
XL2
1
0.7*IOVCC
IOVCC + 0.5
V
V
V
XH2
2
0.1*IOVCC
-1.6
V
HYS
Hysteresis Loop Width
I
I
I
I
Logical 1 Output Current
Logical 0 Output Current
Weak Pull-up Current
V
= 1.8V,
OH
mA
OH
IOVCC = 2.25V
V
= 0.45V,
1.6
-10
mA
µA
OL
OL
IOVCC = 2.25V
V
= 1.8V,
OHW
IH
OH
IOVCC = 2.25V
High-level Input Current
Low-level Input Current
V
V
= IOVCC = 2.85V
= 0
- 1.0
- 1.0
1.0
1.0
µA
µA
IH
IL
3
I
I
IL
High Impedance Input Leakage
Current
0V ≤ V ≤ IOVCC
-2.0
-2.0
2.0
2.0
µA
µA
L
IN
I
Output Leakage Current (I/O pins in
input mode)
0V ≤ V
≤ VCC
OUT
O(Off)
1. Not supported, please place pad and leave unconnected.
2. Guaranteed by design.
3. Limit for I for the pins Reset_b#, Pl1_RFCE_TP & VDD_DIG_PWR_D# is +/-3uA.
IL
Revision 1.0
9
www.national.com
6.0 Electrical Specifications (Continued)
6.3 RF PERFORMANCE CHARACTERISTICS
•
All tests are measured at antenna port unless otherwise
specified
In the performance characteristics tables the following
applies:
•
•
•
T = -40°C to +85°C
A
VCC = 3.3V unless otherwise specified
•
All tests performed are based on Bluetooth Test Specifi-
cation rev 0.91.
RF system performance specifications are guaranteed
on National Semiconductor Austin Board rev1.0b refer-
ence design platform.
Table 14. Receiver Performance Characteristics
1
Symbol
Parameter
Condition
Min
Max
Unit
Typ
2
Receive Sensitivity
BER < 0.001
2.402 GHz
2.441 GHz
2.480 GHz
-77
-77
-77
0
-74
-74
-74
dBm
dBm
dBm
dBm
dB
RX
sense
PinRF
Maximum Input Level
-20
C/I
Carrier to Interferer Ratio
in the Presence of Co-
channel Interferer
P RF = -60 dBm,
9
11
0
CCI
in
BER < 0.001
C/I
Carrier to Interferer Ratio
in the Presence of Adja-
cent Channel Interferer
∆F
= + 1 MHz,
-3
dB
dB
dB
dB
ACI
ACI
P RF = -60 dBm,
in
BER < 0.001
∆F
= + 2 MHz.
-42
-46
-20
-30
-40
ACI
P RF = -60 dBm,
in
BER < 0.001
∆F
= + 3 MHz,
ACI
P RF = -67 dBm,
in
BER < 0.001
C/I
C/I
Image Frequency
Interference
∆F= - 2 MHz,
-9
IMAGE
P RF = -67 dBm,
in
BER < 0.001
-
Image Frequency
Interference
∆f = -3 MHz,
PinRF = -67 dBm,
BER < 0.001
-32
-31
-20
dB
IMAGE
1MHz
3
Intermodulation
Interference Performance
F = + 3 MHz,
-39
dBm
IMP
1
F = + 6 MHz,
2
P RF = -64 dBm
in
4
Input Impedance of RF
Port (RF_inout)
Single input impedance
= 2.5 GHz
50
Ω
Z
RFIN
F
in
5
Return Loss
-8
dB
Return Loss
OOB
Out Of Band Blocking
Performance
P RF = -10 dBm,
-10
-27
-27
-10
dBm
in
30 MHz < F
BER < 0.00
< 2 GHz,
CWI
P RF = -27 dBm,
dBm
dBm
dBm
in
2000 MHz < F
BER < 0.001
< 2399 MHz,
< 3000 MHz,
< 12.75 GHz,
CWI
OOB
Out Of Band Blocking
Performance
(Continued)
P RF = -27 dBm,
in
2498 MHz < F
BER < 0.001
CWI
P RF = -10 dBm,
in
3000 MHz < F
BER < 0.001
CWI
1. Typical operating conditions are at 3.3V operating voltage and 25°C ambient temperature.
2. The receiver sensitivity is measured at the device interface.
3. The f =-64dBm Bluetooth modulated signal, f =-39dBm sine wave, f =-39dBm Bluetooth modulated signal, f =2f -f ,
0
1
2
0
1 2
and |f -f |=n*1MHz, where n is 3,4 or 5. For the typical case, n = 3.
2
1
4. Reference Smith Chart Figure 8 on page 13.
5. Reference chart Figure 9 on page 14.
www.national.com
10
6.0 Electrical Specifications (Continued)
Table 15. Transmitter Performance Characteristics
1
Symbol
Parameter
Condition
2.402 GHz
Min
Max
Unit
Typ
+1
+1
+1
1
2
Transmit Output Power
-3
-3
+4
+4
+4
2
dBm
dBm
dBm
dBm
kHz
P
RF
OUT
2.441 GHz
2.480 GHz
-3
Power Density
Power Density
-4
MOD ∆F1
Modulation Characteris-
tics
Data = 00001111
Data = 10101010
140
165
175
AVG
3
Modulation Characteris-
tics
115
0.8
125
kHz
MOD ∆F2
MAX
4
Modulation Characteris-
tics
∆F2
∆F1
AVG
5
AVG
/
Adjacent Channel Power
(In-band Spurious)
+ 500 kHz
-20
-20
-40
dBc
dBm
dBm
dB
ACP
| M - N | = 2
-50
-53
-48
-51
-77
| M - N | > 3
6
nd
Maximum gain setting:
P
P
2*f
PA 2 Harmonic
OUT
OUT
o
f = 2402 MHz,
0
Suppression
P
= 4804 MHz
out
3
rd
Maximum gain setting:
f = 2402 MHz,
-98
50
dB
3*f
PA 3 Harmonic
o
Suppression
0
P
= 7206 MHz
out
7
RF Output Impedance/In-
put Impedance of RF Port
(RF_inout)
P
@ 2.5 GHz
Ω
Z
out
RFOUT
8
Return Loss
-8
dB
Return Loss
o
1. Typical operating conditions are at 3.3V operating voltage and 25 C ambient temperature.
2. The output power is measured at the antenna port, including all front end losses for balun, TX/RX switch and filter.
3. ∆F2max > 115 kHz for at least 99.9% of all ∆f2max.
4. Modulation index set between 0.28 and 0.35.
5. Not tested in production.
6. Out-of-Band spurs only exist at 2nd and 3rd harmonics of the CW frequency for each channel. Performance of the
radio is significantly better than BT 1.1 specification.
7. Reference Smith chart Figure 8 on page 13.
8. Reference chart Figure 9 on page 14.
1
Table 16. Synthesizer Performance Characteristics
Symbol
Parameter
Condition
Min
Typ
Max
Unit
f
t
VCO Frequency Range
2402
2480
MHz
VCO
Lock Time
f + 20 kHz
120
0
µs
LOCK
0
∆f offset
Initial Carrier Frequency Tolerance During preamble
-75
75
kHz
0
∆f drift
Initial Carrier Frequency Drift
DH1 data packet
DH3 data packet
DH5 data packet
Drift Rate
-25
-40
-40
-20
0
0
0
0
4
25
40
40
20
kHz
kHz
0
kHz
kHz/50µs
µs
t -Tx
Transmitter Delay Time
From Tx data to anten-
na
D
1. Frequency accuracy dependent on crystal or oscillator chosen. Crystal/oscillator must have cumulative accuracy
specifications of not more than +20 ppm to meet the Bluetooth specification.
Revision 1.0
11
www.national.com
6.0 Electrical Specifications (Continued)
Table 17. Crystal/Oscillator Performance Characteristics
Symbol
Parameter
Condition
Min
Typ
Max
Unit
f
f
Crystal Oscillator Frequency
12
MHz
OSC
1
Frequency Accuracy
Cumulative over operating
temperature range
-20
+20
ppm
ACC
t
Oscillator Turn-On Time
VCC applied, f
= 12 MHz,
OSC
4
ms
OSC-ON
C
= 0.1 µF, settled to within
ext
f
ACC
V
Oscillator Input Voltage
External XO input
0.6
49
2.0
Vpp
OSC
ESR
Equivalent Series Resis-
tance
50
100
Ω
D
Duty Cycle
51
%
CYCLE
P
Phase Noise
100Hz
-105
dBc/H
z
NOISE
1000Hz
-125
dBc/H
z
BBCLK
Baseband Clock Output
Frequency
12
MHz
1. Frequency accuracy dependent on crystal or oscillator chosen. Crystal/oscillator must have cumulative accuracy
specifications of +15 ppm to provide margin for frequency drift with ageing and temperature.
6.4 PERFORMANCE DATA (TYPICAL)
Figure 5. Corresponding Eye Diagram
Figure 3. Modulation
Figure 6. Synthesizer Phase Noise
Figure 4. Transmit Spectrum
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12
6.0 Electrical Specifications (Continued)
Filter Insertion Loss
0
-2
-4
IL(dB)
-6
-8
-10
2.1E+09 2.2E+09 2.3E+09 2.4E+09 2.5E+09 2.6E+09 2.7E+09 2.8E+09
Frequency (Hz)
Figure 7. Front-End Bandpass Filter Response
1.00
2.00
0.50
m1
0.00
0.50
2.00
m2
1.00
m2
freq=2.402ghz
-0.50
S(1.1)=0.093/-29.733
-2.00
impedance = Z0* (1.170 - j0.109)
-1.00
freq(2.400ghz to 2.500ghz)
m1
freq=2.500ghz
S(1.1)=0.035/175.614
impedance = Z0* (0.933 + j0.005)
Figure 8. TX and RX Pin 50Ω Impedance Characteristics
Revision 1.0
13
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0.0
-0.6
-1.6
-2.6
-3.6
-4.6
-5.6
-6.6
-7.6
-8.6
-9.6
m4
freq=2.402GHz
dB(S(1.1))=-8.282
m4
m5
m3
freq=2.483GHz
dB(S(1.1))=-9.227
freq=2.441GHz
dB(S(1.1))=-9.313
m5
m3
freq. ghz
Figure 9. Transceiver Return Loss
7.1.3 Profile support
7.0 Functional Description
The on-chip application of the LMX9820 allows full stand-
alone operation, without any Bluetooth protocol layer nec-
essary outside the module. It supports the Generic Access
Profile (GAP), the Service Discovery Application Profile
(SDAP), and the Serial Port Profile (SPP).
7.1 BASEBAND AND LINK MANAGEMENT
PROCESSORS
Baseband and Lower Link control functions are imple-
mented using a combination of National Semiconductor’s
CompactRISC 16-bit processor and the Bluetooth Lower
Link Controller. These processors operate from integrated
Flash memory and RAM and execute on-board firmware
implementing all Bluetooth functions.
The on-chip profiles can be used as interfaces to additional
profiles executed on the host. The LMX9820 includes a
configurable service database to answer requests with the
profiles supported.
7.1.4 Application with command interface
7.1.1 Bluetooth Lower Link Controller
The module supports automatic slave operation eliminating
the need for an external control unit. The implemented
transparent option enables the chip to handle incoming
data raw, without the need for packaging in a special for-
mat. The device uses a fixed pin to block unallowed con-
nections.
The integrated Bluetooth Lower Link Controller (LLC) com-
plies with the Bluetooth Specification version 1.1 and
implements the following functions:
•
•
•
•
•
Support for 1, 3, and 5 slot packet types
79 Channel hop frequency generation circuitry
Fast frequency hopping at 1600 hops per second
Power management control
Acting as master, the application offers a simple but versa-
tile command interface for standard Bluetooth operation
like inquiry, service discovery, or serial port connection.
The firmware supports up to three slaves. Default Link Pol-
icy settings and a specific master mode allow optimized
configuration for the application specific requirements. See
also Section "Integrated Firmware" on page 21.
Access code correlation and slot timing recovery
7.1.2 Bluetooth Upper Layer Stack
The integrated upper layer stack is prequalified and
includes the following protocol layers:
7.2 MEMORY
•
•
•
L2CAP
RFComm
SDP
The LMX9820 includes 256kB of programmable Flash
memory that can be used for code and constant data. It
allows single cycle read access from the CPU. In addition
www.national.com
14
to storing all algorithms and firmware, the on-board Flash
also contains the IEEE 802 compliant Media Access Con-
troller (MAC) address (BDADDR). The firmware and the
BDADDR are programmed by National Semiconductor or
can be programmed by the customer either before assem-
bly into the host system or in system. Module firmware can
be updated as well during manufacturing or by the con-
sumer using the ISP capabilities of the LMX9820. The
LMX9820 firmware uses the internal RAM for buffers and
program variables.
9.6kbit/s. Default configuration in NVS is 1 Stopbit, 1 Start-
bit and No parity.
Table 19 provides the ISEL1 and ISEL2 selection settings.
Table 19. UART Speed Selection
ISEL1
ISEL2
Interface
UART
Settings
(Pad J13) (Pad H13) Speed (baud)
1
0
1
1
1
0
921.6k
115.2k
9.6k
Check NVS
Check NVS
7.3 CONTROL AND TRANSPORT PORT
1Stop, 1Start,
No Parity
The LMX9820 provides one Universal Asynchronous
Receiver Transmitter (UART). It supports 8-bit data formats
with or without parity and one or two stop bits. The baud
rate is generated by hardware that is programmed at boot
time. Alternatively, the speed and configuration settings
can be read out of internal memory settings. The UART
can operate at baud rates of 2.4k, 4.8k, 7.2k, 9.6k, 19.2k,
38.4k, 57.6k, 115.2k, 230.4k, 460.8k and 921.6k. It imple-
ments flow control logic (RTS, CTS) to provide hardware
handshaking capability. The UART offers wakeup from the
power save modes via the multi-input wakeup module.
UART logic thresholds are set via the IOVCC pin.
0
0
Check NVS
Check NVS
7.4.4 Module and LInk Status Outputs
The LMX9820 provides signals that the host can use to
determine the real-time status of the radio link. The
TX_Switch_P signal (pad H3) is a real-time indication of
the current configuration (direction) of the transceiver. The
link status lines (Lstat_0 and Lstat_1, pads E8 and F8,
respectively) are GPIO lines controlled by the LMX9820
firmware. The Host Wakeup line (Host_wu, pad F9) is
implemented using GPIO and firmware. It is used to bring
the host processor out of Sleep mode when link activity
calls for host processing. Host_wu can also be used by the
host to check if link activity is present. If Host_wu is active,
then link activity is present and the host loses network
awareness if the operating system continues to allow the
host processor to enter the Sleep mode. Table 20 presents
the definitions of the various module and link status out-
puts.
7.4 AUXILIARY PORTS
7.4.1 Reset_5100 and Reset_b
Reset_5100 and Reset_b are active low reset inputs for the
baseband controller and digital smart radio portions of the
LMX9820, respectively. These pins are normally tied
together and are connected to the host system so that the
host can initialize the LMX9820 by asserting the reset
inputs. Upon removal, the status of the module operating
environment (Env) pads are sampled and the LMX9820
enters the corresponding operational mode.
Table 20. Module / Link Status Definitions
Mode
7.4.2 Operating Environment Pads (Env0 and Env1)
The module provides two operating environments (see
Table 18) depending on the state of the Env pads after the
removal of the reset inputs. At power up of the module,
Env0 and Env1 are checked to determine which operating
environment straps are selected and operating.
x
1
x
x
At least 1 SPP link es-
tablished
The ISP mode allows end-of-line or field programming of
the LMX9820 Flash memory by starting the baseband con-
troller from the boot block of memory.
x
x
x
x
x
0
x
x
x
x
x
1
0
x
x
x
x
x
0
1
No SPP link
Transceiver = Transmit
Transceiver = Receive
Host can Sleep
Table 18. Operating Environments
Operating Environment
Env1
(Pad B11)
Env0
(Pad E9)
Wakeup host/host
shouldn’t Sleep
ISP Mode
1
1
0
1
Run (Normal) Mode (De-
fault)
7.4.3 Interface Select Inputs (ISEL1, ISEL2)
The interface selection pads are used for setting the UART
speed and settings. As ISEL1 and ISEL2 are set by internal
weak-pull-ups, the default baudrate is 921.6kbit/s. The set-
tings for Stopbits, Startbit and Parity are stored as internal
NVS parameter. If a baudrate different to the listed needs
to be used, ISEL 1 and ISEL2 have to be set to 0. This
forces the device to get also the UART speed from the
parameter table. The default baudrate value set in NVS is
Revision 1.0
15
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8.8 RADIO TRANSMITTER
8.0 Digital Smart Radio
The signal path of the TX architecture contains an internal
modulator for 1 Mb/s GFSK (Gaussian Frequency Shift
Keying) modulation of the 2.5 GHz VCO. Closed loop ∆Σ
modulation is chosen since it is the most low power solu-
tion. The integrated pre-amplifier provides output levels
sufficient for Class 2 Bluetooth operation.
The LMX9820 Digital Smart Radio includes a high perfor-
mance, monolithic, radio transceiver optimized for Blue-
tooth communications systems.
The radio transceiver is a highly integrated design and
includes the Low Noise Amplifier (LNA), mixer, on-chip fil-
ters, 2.5 GHz ∆Σ PLL, voltage controlled oscillator, Power
Amplifier (PA) driver, and modem functions. Digital modula-
tion and demodulation techniques are utilized for a robust
manufacturable design. Power management includes con-
trol over individual chip functions and internal voltage regu-
lation for optimum performance.
8.9 MODULATOR
An internal digital Gaussian filter provides the FSK modula-
tion waveform. A modulation input to the completely inte-
grated 2.5 GHz ∆Σ PLL provides a consistent modulation
deviation. This eliminates the risks of open loop modulation
such as frequency drift and frequency offset.
8.1 RADIO RECEIVER
The signal path of the RX architecture contains an internal
LNA and quadrature RF downconverting mixer at 2.5 GHz.
A low Intermediate Frequency (IF) receiver provides high
performance at low cost and low current consumption. The
IF demodulator is implemented digitally in combination with
a limiting amplifier.
8.10 TRANSMIT FREQUENCY OUTPUT
The transmit RF output is differential, and is connected to
the antenna through an integrated passive balun.
8.11 FREQUENCY SYNTHESIZERS
The 2.4 to 2.5GHz RF range is provided by an on-chip volt-
age controlled oscillator (VCO). A programmable 2.5 GHz
∆Σ PLL selects the channel frequency. An internal crystal
oscillator can be configured with 12MHz crystal, or for
TCXO frequency input. Internal dividers provide internal
clocks and clock outputs to the baseband controller.
8.2 LOW NOISE AMPLIFIER (LNA)
The on-board LNA is a single-ended structure designed
with a 50Ω input impedance for simple capacitive match-
ing. The LNA is closely integrated with the mixer providing
low noise and good immunity from blocking signals.
8.12 CRYSTAL CIRCUIT
8.3 RX MIXER
Due to the need for clock accuracy, the LMX9820 has a
dedicated crystal oscillator. The LMX9820 uses the crystal
to supply a 12 MHz clock source to the baseband control-
ler. The 12 MHz is buffered, providing a receive data clock
to the baseband controller. It is also possible to configure
the crystal oscillator for input only when another high qual-
ity crystal oscillator is available in the system. The
LMX9820 can accommodate 12 MHz crystal.
The receive mixer is an image reject ring diode type mixer.
An internal low noise gain block is incorporated prior to the
mixer to achieve extremely low noise performance. A dif-
ferential IF output improves noise immunity while maintain-
ing a high intercept point.
8.4 CHANNEL SELECT FILTER
The IF circuitry is followed by an integrated complex active
bandpass filter that provides the required channel selectiv-
ity and image rejection. The I and Q outputs of the filter are
then converted to the digital domain using a limiter, discrim-
inator, and A/D converter.
8.13 EXTERNAL CRYSTAL OSCILLATORS
The LMX9820 contains a crystal driver circuit. This circuit
operates with an external crystal and capacitors to form an
oscillator. See Figure 10 on page 17 and Figure 11 on page
17. The LMX9820 also can operate with an external TCXO
(Temperature Compensated Crystal Oscillator).
8.5 LIMITER
The limiter circuit consists of I and Q limiting amplifiers that
provide the remaining gain in the receiver such that an
acceptable signal level exists at the frequency modulation
(FM) discriminator. Limiting amplification of the downcon-
verted wanted signal minimizes the input range require-
ments of the A/D converter.
8.13.1 Crystal
The crystal appears inductive near its resonant frequency.
It forms a resonant circuit with its load capacitors. The res-
onant frequency may be trimmed with the crystal load
capacitance.
1. Load Capacitance
8.6 FM DISCRIMINATOR
For resonance at the correct frequency, the crystal should
be loaded with its specified load capacitance, which is the
value of capacitance used in conjunction with the crystal
unit. Load capacitance is a parameter specified by the
crystal, typically expressed in pF. The crystal circuit shown
in Figure 11 is composed of:
The limited signal is translated to digital format by using an
analog Frequency Shift Keying (FSK) demodulator and A/D
converter. The A/D converter extracts the RX signal at a
sample rate of 72.0 MHz.
8.7 RECEIVE SIGNAL STRENGTH INDICATOR
(RSSI)
•
•
•
•
C1 (motional capacitance)
R1 (motional resistance)
L1 (motional inductance)
C0 (static or shunt capacitance)
The receive signal strength indicator (RSSI) signal is
derived from the input level to the limiter and covers a
range low detector level = -59dBm and high detector level
= -38dBm. The information is typically fed back to the
baseband controller via the serial interface.
The LMX9820 provides some of the load with internal
capacitors C . The remainder must come from the exter-
int
nal capacitors labeled Ct1 and Ct2 as shown in Figure 10.
Ct1 and Ct2 should have the same value for best noise
www.national.com
16
performance. Crystal load capacitance (C is calculated as
the following:
Figure 12 shows the results are 100 kHz off the center fre-
quency, which is –4 ppm. The pullability of the crystal is 24
ppm/pF, so the load capacitance must be decreased by
about 0.2 pF. By changing Ct1 or Ct2 to 9 pF, the total load
capacitance is increased by 0.26 pF. Figure 13 shows the
frequency offset test resuts. The frequency offset is now
zero with Ct1 = 9 pF, Ct2 = 10 pF.
L)
C = C + Ct1//Ct2
L
int
The C above does not include the crystal internal self-
L
capacitance C0 as shown in Figure 11 on page 17, so the
total capacitance is:
C
= C + C0
5. Kinseki KSS CX-4025S
total
L
The LMX9820 has also been tested with the Kineski KSS
CX-4025S. See Table 22 on page 17.
XTL_G
XTL_D
Table 21. VXE4-1055-12M000
Specification
Package
Frequency
Mode
Value
6.0x3.5x1.1 mm - 4 pads
12.000 MHz
Crystal
Ct2
Ct1
Fundamental
Stability
±18 ppm at -20 to +70°C (in-
clusive of all conditions)
Load Capacitance
ESR
9 pF
40 Ω max, 20 Ω typ
7 pF max
Figure 10. LMX9820 Crystal Recommended
Circuit
Shunt Capacitance
Drive Level
10 to 100 µW
24 ppm/pF min
-40 to +85°C
Pullability
R1
C1
C0
L1
Storage Temperature
Table 22. KSS CX-4025S
Specification
Package
Frequency
Mode
Value
4.0x2.5x0.75 mm - 4 pads
12.000 MHz
Figure 11. Crystal Equivalent Circuit
Fundamental
2. Crystal Pullability
Pullability is another important parameter for a crystal,
which is the change in frequency of a crystal with units of
ppm/pF, either from the natural resonant frequency to a
load resonant frequency, or from one load resonant fre-
quency to another. The frequency can be pulled in a paral-
lel resonant circuit by changing the value of load
capacitance. A decrease in load capacitance causes an
increase in frequency, and an increase in load capacitance
causes a decrease in frequency.
Stability
±20 ppm at -30 to +80°C (in-
clusive of all conditions)
Load Capacitance
ESR
12pF
80 Ω max, 20 Ω typ
3 pF max
Shunt Capacitance
Drive Level
100 µW max
-40 to +85°C
Storage Temperature
3. Frequency Tuning
Frequency Tuning is achieved by adjusting the crystal load
capacitance with external capacitors. It is a Bluetooth
requirement that the frequency is always within ±20 ppm.
Crystal/oscillator must have cumulative accuracy specifica-
tions of +15 ppm to provide margin for frequency drift with
ageing and temperature.
4. Vite Crystal
The VXE4-1055 is a 12 MHz SMT crystal from Vite.
National is using this crystal with the LMX9820. Table 21
on page 17 shows the specification of VXE4-1055.
Since the internal capacitance of the crystal circuit is 4-5 pF
and the load capacitance is 9 pF, 10 pF is a good starting
point for both Ct1 and Ct2. The 2480 MHz RF frequency
offset is then tested. Figure 12 on page 18 shows the RF
frequency offset test results.
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8.0 Digital Smart Radio (Continued)
Figure 12. Frequency Offset with 10 pF // 10 pF Capacitors
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18
8.0 Digital Smart Radio (Continued)
Figure 13. Frequency Offset with 9 pF//10 pF Capacitors
8.13.2 TCXO (Temperature Compensated Crystal
Oscillator)
The LMX9820 has also been tested with the NKG3184A
TCXO. See Table 23 on page 19.
Table 23. TCXO - NKG3184A
The LMX9820 also can operate with an external TCXO
(Temperature Compensated Crystal Oscillator). The TCXO
signal is directly connected to the XTL_G.
Specification
Package
Value
5.0x3.2x1.4 mm - 4 pads
12.000 MHz
Input Impedance
Frequency
Stability
The LMX9820 XTL_G pin has in input impedance of 2pF
capacitance in parallel with >400kΩ resistance.
±18 ppm at -30 to +85°C (in-
clusive of all conditions)
NKG3184A TCXO
Output Load
10kΩ // 13pF
Current Consumption
Output Level
2.0mA
0.3Vp-p to 2.0Vp-p
-40 to +85°C
Storage Temperature
DC Cut Capacitor
Included in VC-TCXO
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The Reset_b# and Reset_5100# of the LMX9820 should
be driven high minimum of 2ms after the LMX9820 voltage
rails are high. The LMX9820 is properly reset.
9.0 System Power-Up Sequence
In order to correctly power-up the LMX9820 the following
sequence must be performed:
Reference Table 24 on page 20.
Apply IOVCC and VCC to the LMX9820.
VCC
tPTOR
IOVCC
Reset_b#
Low
Reset_5100#
Low
BBP_CLOCK
TX_RX_DATA
High
Low
Low
TX_RX_SYNC
CCB_DATA
Low
CCB_CLOCK
CCB_LATCH
High
LMX9820
Oscillator
Start-Up
LMX9820
Standby
Active
Initialization
LMX9820
Initialization
LMX9820 in Normal Mode
LMX9820 in
Power-Up Mode
Figure 14. LMX9820 System Power-Up Sequence Timing
Table 24. LMX9820 System Power-up Sequence Timing
Symbol
Parameter
Power to Reset
Condition
and IO at operating
VCC
Min
Typ
Max
Unit
t
V
2
ms
PTOR
CC
voltage level to valid reset
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Transparent Mode
10.0 Integrated Firmware
The LMX9820 supports transparent data communication
from the UART interface to a bluetooth link.
The LMX9820 includes the full Bluetooth stack up to
RFComm to support the following profiles:
If activated, the module does not interpret the commands
on the UART which normally are used to configure and
control the module. The packages don’t need to be format-
ted as described in Table 27 on page 24. Instead all data
are directly passed through the firmware to the active blue-
tooth link and the remote device.
•
•
•
GAP (Generic Access Profile)
SDAP (Service Discovery Application Profile)
SPP (Serial Port Profile)
Figure 15 shows the Bluetooth protocol stack with com-
mand interpreter interface. The command interpreter offers
a number of different commands to support the functional-
ity given by the different profiles. Execution and interface
timing is handled by the control application.
Transparent mode can only be supported on a point-to-
point connection. To leave Transparent mode, the host
must send a UART_BREAK signal to the module
Force Master Mode
The chip has an internal data area in Flash that includes
the parameters shown in Table 25 on page 22.
In Force Master mode tries to act like an Accesspoint for
multiple connections. For this it will only accept the link if a
Master/slave role switch is accepted by the connecting
device. After successful link establishment the LMX9820
will be Master and available for additional incoming links.
On the first incoming link the LMX9820 will switch to trans-
parent depending on the setting for automatic or command
mode. Additional links will only be possible if the device is
not in transparent mode.
Command Interpreter
Control Application
10.1.2 Default Connections
SPP
SDAP
The LMX9820 supports the storage of up to 3 devices
within its NVS. Those connections can either be connected
after reset or on demand using a specific command.
GAP
RFComm
SDP
10.1.3 Event Filter
The LMX9820 uses events or indicators to notify the host
about successful commands or changes at the bluetooth
interface. Depending on the application the LMX9820 can
be configured. The following levels are defined:
L2CAP
Link Manager
Baseband
•
No Events:
– The LMX9820 is not reporting any events. Optimized
for passive cable replacement solutions.
Figure 15. LMX9820 Software Implementation
10.1 FEATURES
•
•
Standard LMX9820 events:
– only necessary events will be reported
All events:
10.1.1 Operation Modes
– Additional to the standard all changes at the physical
layer will be reported.
On boot-up, the application configures the module follow-
ing the parameters in the data area.
Automatic Mode
10.1.4 Default Link Policy
No Default Connections Stored:
Each Bluetooth Link can be configured to support M/S role
switch, Hold Mode, Sniff Mode and Park Mode. The default
link policy defines the standard setting for incoming and
outgoing connections.
In Automatic mode the module is connectable and discov-
erable and automatically answers to service requests. The
command interpreter listens to commands and links can be
set up. The full command list is supported.
If connected by another device, the module sends an event
back to the host, where the RFComm port has been con-
nected, and switches to transparent mode.
Default Connections Stored:
If default connections were stored on a previous session,
once the LMX9820 is reset, it will attempt to connect each
device stored within the data Flash three times. The host
will be notified about the success of the link setup via a link
status event.
Command Mode
In Command mode, the LMX9820 does not check the
default connections section within the Data Flash. If con-
nected by another device, it will NOT switch to transparent
mode and continue to interpret data sent on the UART.
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Table 25. Operation Parameters Stored in LMX9820
Parameter
Default Value
Description
BDADDR
(Hard coded into Device)
Bluetooth device address
Local Name
Serial port device
PinCode
0000
Bluetooth PinCode
Operation Mode
Default Connections
SDP Database
Automatic
0
Command or Automatic mode
Up to three default devices to connect on default
1 SPP entry:
Name: COM1
Service discovery database, control for supported
profiles
Authentication and encryption enabled
UART Speed
9600
Sets the speed of the physical UART interface to the
host
UART Settings
Ports to Open
Link Keys
1 Stop bit, parity disabled
0000 0001
Parity and stop bits on the hardware UART interface
Defines the RFComm ports to open
Link keys for paired devices
No link keys
2
Security Mode
Page Scan Mode
Inquiry Scan Mode
Security mode
Connectable
Discoverable
Connectable/Not connectable for other devices
Discoverable/NotDiscoverable/LimitedDiscoverable
for other devices
Default Link Policy
All modes allowed
Configures modes allowed for incoming or outgoing
connections (Role switch, Hold mode, Sniff mode,
Park mode)
Default Link Timeout 20 seconds
Default link supervision timeout
Event Filter
Standard LMX9820 events reported
Defines the level of reporting on the UART
- no events
- standard events
- standard including ACL link events
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11.0 Low Power Modes
The LMX9820 supports different Low Power Modes to
reduce power in different operating situations. The modular
structure of the LMX9820 allows the firmware to power
down unused modules.
Host
LMX9820
RTS#
CTS#
TX
RTS#
CTS#
TX
The Low power modes have influence on:
•
UART transport layer
RX
RX
– enabling or disabling the interface
•
Bluetooth Baseband activity
– firmware disables LLC and Radio if possible
GPIO
Host_WU
(optional)
11.1 POWER MODES
Figure 16. UART NULL modem connection
11.2.2 Disabling the UART transport layer
The following LMX9820 power modes, which depend on
the activity level of the UART transport layer and the radio
activity are defined:
The Host can disable the UART transport layer by sending
the “Disable Transport Layer” Command. The LMX9820
will empty its buffers, send the confirmation event and dis-
able its UART interface. Afterwards the UART interface will
be reconfigured to wake up on a falling edge of the CTS
pin.
The radio activity level mainly depends on application
requirements and is defined by standard bluetooth opera-
tions like inquiry/page scanning or an active link.
A remote device establishing or disconnecting a link may
also indirectly change the radio activity level.
11.2.3 LMX9820 enabling the UART interface
The UART transport layer by default is enabled on device
power up. In order to disable the transport layer the com-
mand “Disable Transport Layer” is used. Thus only the
Host side command interface can disable the transport
layer. Enabling the transport layer is controlled by the HW
Wakeup signalling. This can be done from either the Host
and the LMX9820. See also “LMX9820 Software Users
Guide” for detailed information on timing and implementa-
tion requirements.
As the Transport Layer can be disabled in any situation the
LMX9820 must first make sure the transport layer is
enabled before sending data to the host. Possible scenar-
ios can be incoming data or incoming link indicators. If the
UART is not enabled the LMX9820 assumes that the Host
is sleeping and waking it up by activating RTS and setting
HOST_WU to 1. To be able to react on that Wake up, the
host has to monitor the CTS pin.
As soon as the host activates its RTS pin, the LMX9820 will
first send a confirmation event and then start to transmit
the events.
Table 26. Power Mode activity
Power
Mode
UART activity
Radio activity
11.2.4 Enabling the UART transport layer from the host
PM0
PM1
PM2
PM3
PM4
PM5
OFF
ON
OFF
If the host needs to send data or commands to the
LMX9820 while the UART Transport Layer is disabled it
must first assume that the LMX9820 is sleeping and wake
it up using its RTS signal.
OFF
OFF
ON
Scanning
Scanning
SPP Link
SPP Link
When the LMX9820 detects the Wake-Up signal it acti-
vates the UART HW and acknowledges the Wake-Up sig-
nal by settings its RTS and HOST_WU signal. Additionally
the Wake up will be confirmed by a confirmation event.
When the Host has received this “Transport Layer
Enabled” event, the LMX9820 is ready to receive com-
mands.
OFF
ON
11.2 ENABLING AND DISABLING UART
TRANSPORT
.
11.2.1 Hardware Wake up functionality
In certain usage scenarios the host is able to switch off the
transport layer of the LMX9820 in order to reduce power
consumption. Afterwards both devices, host and LMX9820
are able to shut down their UART interfaces.
In order to save system connections the UART interface is
reconfigured to hardware wakeup functionality. For a
detailed timing and command functionality please see also
the “LMX9820 Software Users Guide”.
The interface between host and LMX9820 is defined as
described in Figure 16.
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12.1.2 Packet Type ID
12.0 Command Interface
This byte identifies the type of packet. See Table 28 for
details.
The LMX9820 offers Bluetooth functionality in either a self
contained slave functionality or over a simple command
interface. The interface is listening on the UART interface.
12.1.3 Opcode
The following sections describe the protocol transported on
the UART interface between the LMX9820 and the host in
command mode (see Figure 17). In Transparent mode, no
data framing is necessary and the device does not listen
for commands.
The opcode identifies the command to execute. The
opcode values can be found within the “LMX9820 Software
User’s Guide” included within the LXMX9820 Evaluation
Board.
12.1.4 Data Length
12.1 FRAMING
Number of bytes in the Packet Data field. The maximum
size is defined with 333 data bytes per packet.
The connection is considered “Error free”. But for packet
recognition and synchronization, some framing is used.
All packets sent in both directions are constructed per the
model shown in Table 27.
12.1.5 Checksum:
This is a simple Block Check Character (BCC) checksum
of the bytes “Packet type”, “Opcode” and “Data Length”.
The BCC checksum is calculated as low byte of the sum of
all bytes (e.g., if the sum of all bytes is 0x3724, the check-
sum is 0x24).
12.1.1 Start and End Delimiter
The “STX” char is used as start delimiter: STX = 0x02. ETX
= 0x03 is used as end delimiter.
Existing device
without Bluetooth™
capabilities
LMX9820
UART
UART
Figure 17. Bluetooth Functionality
.
Table 27. Package Framing
Start De-
limiter
Packet
Type ID
Opcode
Data Length
Checksum
Packet Data
End De-
limiter
1 Byte
1 Byte
1 Byte
2 Bytes
1 Byte
<Data Length> Bytes
1 Byte
- - - - - - - - - - - - - Checksum - - - - - - - - - - - - -
Table 28. Packet Type Identification
Description
ID
Direction
0x52
‘R’
REQUEST
(REQ)
A request sent to the Bluetooth module.
All requests are answered by exactly one confirm.
0x43
‘C’
Confirm
(CFM)
The Bluetooth modules confirm to a request.
All requests are answered by exactly one confirm.
0x69
‘i’
Indication
(IND)
Information sent from the Bluetooth module that is not a direct confirm to a request.
Indicating status changes, incoming links, or unrequested events.
0x72
‘r’
Response
(RES)
An optional response to an indication.
This is used to respond to some type of indication message.
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Tables 29 through 38 show the actual command set and
the events coming back from the device. A full documented
description of the commands can be found in the
“LMX9820 Software Users Guide”.
12.2 COMMAND SET OVERVIEW
The LMX9820 has a well defined command set to:
•
Configure the device:
– Hardware settings
NOTE: For standard Bluetooth operation only commands
from Table 29 through Table 31 will be used. Most of the
remaining commands are for configuration purposes only.
– Local Bluetooth parameters
– Service database
.
•
Set up and handle links
Table 29. Device Discovery
Command
Event
Description
Inquiry
Inquiry Complete
Device Found
Search for devices
Lists BDADDR and class of device
Get name of remote device
Remote Device Name
Remote Device Name Confirm
Table 30. SDAP Client Commands
Command
Event
Description
SDAP Connect
SDAP Disconnect
SDAP Connect Confirm
SDAP Disconnect Confirm
Connection Lost
Create an SDP connection to remote device
Disconnect an active SDAP link
Notification for lost SDAP link
SDAP Service Browse
SDAP Service Search
SDAP Attribute Request
Service Browse Confirm
SDAP Service Search Confirm
SDAP Attribute Request Confirm
Get the services of the remote device
Search a specific service on a remote device
Searches for services with specific attributes
Table 31. SPP Link Establishment
Event Description
Command
Establish SPP Link
Establishing SPP Link Confirm
Link Established
Initiates link establishment to a remote device
Link successfully established
Incoming Link
A remote device established a link to the local
device
Release SPP Link
SPP Send Data
Release SPP Link Confirm
SPP Send Data Confirm
Incoming Data
Initiate release of SPP link
Send data to specific SPP port
Incoming data from remote device
Get current Link Supervision timeout
Set Link Supervision timeout
Get Link Timeout
Set Link Timeout
Transparent Mode
Get Link Timeout Confirm
Set Link Timeout Confirm
Transparent Mode Confirm
Switch to Transparent mode on the UART
Table 32. Storing Default Connections
Event Description
Command
Connect Default Connection
Connect Default Connection Confirm
Connects to either one or all stored default
connections
Store Default Connection
Store Default Connection Confirm
Store device as default connection
Get list of Default Connections List of Default Devices
Delete Default Connections Delete Default Connections Confirm
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12.0 Command Interface (Continued)
Table 33. Bluetooth Low Power Modes
Event Description
Command
Set Default Link Policy
Set Default Link Policy Confirm
Defines the link policy used for any incoming
or outgoing link.
Get Default Link Policy
Set Link Policy
Get Default Link Policy Confirm
Set Link Policy Confirm
Returns the stored default link policy
Defines the modes allowed for a specific link
Returns the actual link policy for the link
Get Link Policy
Get Link Policy Confirm
Enter Sniff Mode Confirm
Exit Sniff Mode Confirm
Enter Park Mode Confirm
Enter Hold Mode Confirm
Power Save Mode Changed
Enter Sniff Mode
Exit Sniff Mode
Enter Park Mode
Enter Hold Mode
Remote device changed power save mode
on the link
Table 34. Wake Up Functionality
Command
Event
Transport Layer Enabled
Description
Disable Transport Layer
Disabling the UART Transport Layer and
activates the Hardware Wakeup function
Table 35. SPP Port Configuration and Status
Command
Event
Description
Set Port Config
Set Port Config Confirm
Set port setting for the “virtual” serial port link
over the air
Get Port Config
Get Port Config Confirm
Port Config Changed
Read the actual port settings for a “virtual”
serial port
Notification if port settings were changed
from remote device
SPP Get Port Status
SPP Get Port Status Confirm
Returns status of DTR, RTS (for the active
RFComm link)
SPP Port Set DTR
SPP Port Set RTS
SPP Port BREAK
SPP Port Set DTR Confirm
SPP Port Set RTS Confirm
SPP Port BREAK
Sets the DTR bit on the specified link
Sets the RTS bit on the specified link
Indicates that the host has detected a break
SPP Port Overrun Error
SPP Port Overrun Error Confirm
Used to indicate that the host has detected an
overrun error
SPP Port Parity Error
SPP Port Parity Error Confirm
SPP Port Framing Error Confirm
SPP Port Status Changed
Host has detected a parity error
Host has detected a framing error
SPP Port Framing Error
Indicates that remote device has changed
one of the port status bits
Table 36. Local Bluetooth Settings
Description
Read actual friendly name of the device
Command
Event
Read Local Name Confirm
Read Local Name
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12.0 Command Interface (Continued)
Table 36. Local Bluetooth Settings (Continued)
Command
Event
Description
Write Local Name
Read Local BDADDR
Change Local BDADDR
Write Local Name Confirm
Read Local BDADDR Confirm
Change Local BDADDR Confirm
Set the friendly name of the device
Note: Only use if you have your own
BDADDR pool
Store Class of Device
Set Scan Mode
Store Class of Device Confirm
Set Scan Mode Confirm
Change mode for discoverability and
connectability
Set Scan Mode Indication
Get Fixed Pin Confirm
Reports end of Automatic limited
discoverable mode
Get Fixed Pin
Reads current PinCode stored within the
device
Set Fixed Pin
Set Fixed Pin Confirm
Set the local PinCode
Set Default Link Timeout
Set Default Link Timeout Confirm
Set Default Link Supervision Timeout for all
incoming an outgoing links
Get Default Link Timeout
Get Default Link Timeout Confirm
Read Default Link Supervision Timeout for all
incoming an outgoing links
Get Security Mode
Set Security Mode
Get Security Mode Confirm
Set Security Mode Confirm
Get actual Security mode
Configure Security mode for local device
(default 2)
Remove Pairing
Remove Pairing Confirm
List of Paired Devices
Remove pairing with a remote device
List Paired Devices
Get list of paired devices stored in the
LMX9820 data memory
Force Master Role
Force Master Role Confirm
Enables/Disables the request for Master role
at incoming connections
Table 37. Local Service Database Configuration
Command
Event
Description
Store SPP Record
Store SPP Record Confirm
Create a new SPP record within the service
database
Store DUN Record
Store FAX Record
Store OPP Record
Store FTP Record
Store IrMCSync Record
Store DUN Record Confirm
Store FAX Record Confirm
Store OPP Record Confirm
Store FTP Record Confirm
Store IrMCSync Record Confirm
Create a new DUN record within the service
database
Create a new FAX record within the service
database
Create a new OPP record within the service
database
Create a new FTP record within the service
database
Create a new IrMCSync record within the ser-
vice database
Enable SDP Record
Delete All SDP Records
Ports to Open
Enable SDP Record Confirm
Delete All SDP Records Confirm
Ports to Open Confirmed
Enable or disable SDP records
Specify the RFComm Ports to open on
startup
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12.0 Command Interface (Continued)
Table 38. Local Hardware Commands
Command
Event
Description
Set Event Filter
Set Event Filter Confirm
Configures the reporting level of the
command interface
Get Event Filter
Read RSSI
Get Event Filter Confirm
Read RSSI Confirm
Get the status of the reporting level
Returns an indicator for the incoming signal
strength
Change UART Speed
Change UART Speed Confirm
Set specific UART speed; needs proper ISEL
pin setting
Change UART Settings
Test Mode
Change UART Settings Confirm
Test Mode Confirm
Change configuration for parity and stop bits
Enable Bluetooth, EMI test, or local loopback
Restore Factory Settings
Reset
Restore Factory Settings Confirm
Dongle Ready
Soft reset
Firmware Upgrade
Stops the bluetooth firmware and executes
the In-system-programming code
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The SPP conformance of the LMX9820 allows any device
using the SPP to connect to the LMX9820.
13.0 Usage Scenarios
Because of switching to Transparent automatically, the
controller has no need for an additional protocol layer; data
is sent raw to the other Bluetooth device.
13.1 SCENARIO 1: POINT-TO-POINT
CONNECTION
LMX9820 acts only as slave, no further configuration is
required.
On default, a PinCode is requested to block unallowed tar-
geting.
Example: Sensor with LMX9820; hand-held device with
standard Bluetooth option.
Air Interface
Sensor Device
Standard Device
with Bluetooth
UART
Inquiry Request
Search for Devices
Inquiry Response
SDP Link Request
SDP Link Accept
Get Remote Services
Service Browse
Service Response
Release SDP Link
Release Confirm
SPP Link Request
Establish SPP Link
Link Established
Connected
on Port L
SPP Link Accept
Transparent Mode
Raw Data
LMX9820
Microcontroller
No Bluetooth™ commands necessary
only “connected” event indicated to controller
The client software only
shows high level functions
Figure 18. Point-to-Point Connection
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13.0 Usage Scenarios (Continued)
If step 5 is executed, the stored default device is connected
(step 4) after reset (in Automatic mode only) or by sending
the command “Connect to Default Device”. The command
can be sent to the device at any time.
13.2 SCENARIO 2: AUTOMATIC POINT-TO-POINT
CONNECTION
LMX9820 at both sides.
Example: Serial Cable Replacement.
If step 6 is left out, the microcontroller has to use the com-
mand “Send Data” instead of sending data directly to the
module.
Device #1 controls the link setup with a few commands as
described.
Serial Device #1
Serial Device #2
Air
1. Devices in Range?
Interface
Inquiry
Inquiry
Inquiry Request
Inquiry Result
Inquiry Result
Inquiry Response
2. Choose the Device
3. Which COM Port is
available?
Establish SDP Link
Establish SDP Link
SDP Link Request
SDP Link Accept
SDP Link Established
SDP Link Established
Service Browse
Service Browse
Browse Result
Service Browse
RFComm Port = R
Service Response
Release SDP Link
SDP Link Released
Release SDP Link
SDP Link Released
Release SDP Link
Release Confirm
4. Create SPP Link
Establish SPP Link
Establish SPP Link
to Port R on Port L
SPP Link Request
SPP Link Accept
to Port R1 on Port L2
Connected on Port L
Link Established
Connected
on Port R
5. Connect on Default
(Optional)
Transparent Mode
Store Default Device
Device Stored
Storing Default Device
Device Stored
6. Switch to
Transparent
Transparent Mode
Transparent Mode
Raw Data
Microcontroller
LMX9820
Microcontroller
LMX9820
Bluetooth™ device controls link with
a few commands
No Bluetooth™ commands necessary;
only “connected” event indicated to controller
1. Port R indicates the remote RFComm channel to connect to. Usually the result of the SDP request.
2. Port L indicates the Local RFComm channel used for that connection.
Figure 19. Automatic Point-to-Point Connection
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Serial Device #1 is acting as master for both devices. As
the host has to decide to or from which device data is com-
ing from, data must be sent using the “Send data com-
mand”. If the device receives data from the other devices, it
is packaged into an event called “Incoming data event”.
The event includes the device related port number.
13.3 SCENARIO 3: POINT-TO-MULTIPOINT CON-
NECTION
LMX9820 acts as master for several slaves.
Example: Two sensors with LMX9820; one hand-held
device with implemented LMX9820.
Serial Devices #2 and #3 establish the link automatically as
soon as they are contacted by another device. No control-
ler interaction is necessary for setting up the Bluetooth link.
Both switch automatically into Transparent mode. The host
sends raw data over the UART.
If necessary, a link configuration can be stored as default in
the master Serial Device #1 to enable the automatic recon-
nect after reset, power-up, or by sending the “connect
default connection” command.
Serial Device #1
Serial Device #2
Air
Interface
Connect to Device #2
see Scenario 2
Connect to Device #2
see Scenario 2
Connection Request
Link Established
on Port L1
Connected
on Port L
Automatic Link Setup
Transparent Mode
Link Established
Send Data Command
Receive Data Event
Send Data to Port L1
Raw Data
Data Received
from Port L1
LMX9820
Microcontroller
Serial Device #3
Connect to Device #3
see Scenario 2
Connect to Device #3
see Scenario 2
Connection Request
Link Established
Link Established
on Port L2
Connected
on Port L
Automatic Link Setup
Transparent Mode
Send Data Command
Receive Data Event
LMX9820
Send Data to Port L2
Raw Data
Data Received
from Port L2
Microcontroller
LMX9820
Microcontroller
Figure 20. Point-to-Multipoint Connection
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ISEL2 (pad H13) and ISEL1 (pad J13) can be strapped to
the host logic 0 and 1 levels to set the host interface boot-
up configuration. Alternatively both ISEL2 and ISEL1 can
be hardwired over 10KΩ pull-up/pull-down resistors.
Env0 (pad E9) and Env1 (pad B11) can be left uncon-
nected (both are read as high) if no ISP capability is
required. If the environment mode ISP needs to be acti-
vated by hardware (alternatively a firmware upgrade com-
mand can be used) then Env0 must be set to Logical Low
and Reset needs to be set. Upon removal of Reset, the
LMX9820 boots into the mode corresponding to the values
present on Env0 and Env1.
14.0 Application Information
Figure 21 on page 32 represents a typical system sche-
matic for the LMX9820.
14.1 MATCHING NETWORK
The antenna matching network may or may not be
required, depending upon the impedance of the antenna
chosen. A 6.8pF blocking capacitor is recommended.
14.2 FILTERED POWER SUPPLY
It is imperative that the LMX9820 be provided with ade-
quate Ground planes and a filtered power supply. It is
highly recommended that a 0.1 µF and a 10 pF bypass
capacitor be placed as close as possible to VCC (pad H2)
on the LMX9820.
14.4 CLOCK INPUT
The clock source must be placed as close as possible to
the LMX9820. The quality of the radio performance is
directly related to the quality of the clock source connected
to the oscillator port on the LMX9820. Careful attention
must be paid to the crystal/oscillator parameters or radio
performance could be drastically reduced.
14.3 HOST INTERFACE
To set the logic thresholds of the LMX9820 to match the
host system, IOVCC (pad H12) must be connected to the
logic power supply of the host system. It is highly recom-
mended that a 10 pF bypass capacitor be placed as close
as possible to the IOVCC pad on the LMX9820.
14.5 SCHEMATIC AND LAYOUT EXAMPLES
VCC
IOVCC
10 pF
0.01 µF
10 pF
0.01 µF
H2
H12
B1 Antenna
6.8 pF
H8
C8
Connect
system
to
RF_inout
Uart_rx
Uart_tx
Uart_cts
Uart_rts
D9
UART bus.
D10
C10
B9
B8
Clk+
Clk-
12 MHz
Y1
Reference
D11
G8
Table 24 on
page 20 for
correct POR
timing.
Reset_5100
Reset_b
10 pF
C1
10 pF
C2
LMX9820
Reference
Table 18 on
page 15.
E9
Env0
Env1
B11
J13
Reference
Table 19 on
page 15.
ISEL1
ISEL2
USBGND
G12
Dig_gnd[1:2]
D12, G11
H13
RF GND
Notes:
Capacitor values, C1, C2, C31 & C32, may vary depending on board design crystal manufacturer specification.
Single ground plane is used for both RF and Digital grounds.
Figure 21. Example System Schematic with pre-selected 115.2kbit/s UART speed
www.national.com
32
14.0 Application Information (Continued)
Figure 22. Component Placement - Layer 1
Revision 1.0
33
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14.0 Application Information (Continued)
Figure 23. Solid Ground Plane - Layer 2
Figure 24. Signal Plane - Layer 3
www.national.com
34
14.0 Application Information (Continued)
Figure 25. Component Layout Bottom - Layer 4
Revision 1.0
35
www.national.com
the temperature at which the solder has molten com-
ponents. The temperature that melting starts at.
15.0 Soldering
The LMX9820 bumps are designed to melt as part of the
Surface Mount Assembly (SMA) process. The LMX9820 is
assembled with a high temperature solder alloy to ensure
there are no re-reflow conditions imposed upon the module
when reflowed to a PCB with these typical low temperature
60/40 (S = 183°C, L = 188°C), 62/36/2 (E = 179°C), or
63/37 (E = 183°C) solder alloys.
•
E: Eutectic
– Denotes solid to liquid without a plastic phase.
The low temperature solder alloy will reflow with the solder
bump and provide the maximum allowable solder joint reli-
ability.
Reflow at a peak of 215 --> 220°C (approximately 30 sec-
onds at peak) [not to exceed 225°C; measured in close
proximity of the modules] to avoid any potential re-reflow
conditions.
Where:
•
S: Solidus
– Denotes the points in a phase diagram representing
the temperature at which the solder composition be-
gins to melt during heating, or complete freezing dur-
ing cooling.
Table 39 and Figure 26 on page 37 provide the soldering
details required to properly solder the LMX9820 to stan-
dard PCBs. The illustration serves only as a guide and
National is not liable if a selected profile does not work.
•
L: Liquidus
– Denotes the points in a phase diagram representing
Table 39. Soldering Details
Parameter
Value
PCB Land Pad Diameter
PCB Solder Mask Opening
PCB Finish (HASL details)
Stencil Aperture
24 mil
30 mil
63/37 (difference in thickness < 28 micron)
28 mil
Stencil Thickness
5 mil
Solder Paste Used
Low temperature 60/40 (S = 183°C, L = 188°C), 62/36/2 (E
1
= 179°C), or 63/37 (E = 183°C) solder alloys
1
Flux Cleaning Process
Reflow Profiles
No Clean Flux System
See Figure 26 on page 37
1. Typically defined by customer.
www.national.com
36
15.0 Soldering (Continued)
Profile
#
Peak
Min
Max
Max
Rising
Time
Rising
Time
Total
Time
Above
183
Rising Falling Time 130 Between Time 160 Between
Slope
Slope
130/160
160/183
1
2
213.9
206.7
32.8
31.1
2.50
2.41
-1.60
-1.73
208.01
213.01
109.00
121.01
99.01
92.00
57.00
53.00
75.00
64.00
Figure 26. Typical Reflow Profiles
Revision 1.0
37
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stages/definitions of the datasheet. Table 41 lists the revi-
sion history and Table 42 lists the specific edits to create
the current revision.
16.0 Datasheet Revision History
This section is a report of the revision/creation process of
the datasheet for the LMX9820. Table 40 provides the
Table 40. Documentation Status Definitions
Product Status Definition
Datasheet Status
Advance Information
Formative or in Design This datasheet contains the design specifications for product de-
velopment. Specifications may change in any manner without no-
tice.
Preliminary
First Production
This datasheet contains preliminary data. Supplementary data will
be published at a later date. National Semiconductor Corporation
reserves the right to make changes at any time without notice in
order to improve design and supply the best possible product.S
No Identification Noted Full production
This datasheet contains final specifications. National Semicon-
ductor Corporation reserves the right to make changes at any time
without notice in order to improve design and supply the best pos-
sible product.
Obsolete
Not in Production
This datasheet contains specifications on a product that has been
discontinued by National Semiconductor Corporation. The
datasheet is printed for reference information only.
Table 41. Revision History
Revision #
Revisions / Comments
(PDF Date)
0.3
Third draft of preliminary datasheet. First pass through tech pubs.
(January 2003)
0.4
(April 2003)
Datasheet revised to include new radio and additional functionality. Several edits have been made
to functional, performance, and electrical details.
1.0
Final datasheet. Several edits have been made to performance, electrical details and command
interface. See Table 42 for details.
(February 2004)
Revision 1.0
38
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16.0 Datasheet Revision History (Continued)
Table 42. Edits to Current Revision
Revisions / Comments
Section
General
•
Section "General Description" on page 1 updated
– Text Description updated
Description
– Features Updated
– Physical dimension changed to (10.1mm x 14.0mm x 1.9mm)
Pad Description
•
Table 2 "System Interface Signals" on page 5 updated
– changed information on 32_CLK pins
Electrical
Specifications
•
•
Table “USB Transceiver” removed
Table 10 "Recommended Operating Conditions" on page 8 updated
– USB_VCC Footnote added
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Table 11 "Power Supply Electrical Specifications: Analog and Digital LDOs" on page 8 added
,,
Table 12 "Power Supply Requirements " on page 9 updated
Table 13 "Digital DC Characteristics" on page 9 updated
Table 14 "Receiver Performance Characteristics" on page 10 updated
Table 15 "Transmitter Performance Characteristics" on page 11 updated
Figure 9 "Transceiver Return Loss" on page 14 added
Functional
Description
Section 7.1.4 "Application with command interface" on page 14 updated
Section 7.2 "Memory" on page 14 updated
Section 7.4.3 "Interface Select Inputs (ISEL1, ISEL2)" on page 15 updated
Section 7.4.4 "Module and LInk Status Outputs" on page 15 updated
Table 20 "Module / Link Status Definitions" on page 15 updated
Section 8.7 "Receive Signal Strength Indicator (RSSI)" on page 16 updated
Section 8.11 "FRequency Synthesizers" on page 16 updated
Section 8.13 "External Crystal Oscillators" on page 16 updated
New in this revision
Digital Smart
Radio
System Power
Up Sequence
Integrated
Firmware
•
•
•
Section 10.1 "Features" on page 21 updated
Table 25 "Operation Parameters Stored in LMX9820" on page 22 updated
New in this revision
Low Power
Modes
Command
Interface
•
•
•
•
•
•
•
Table 34 "Wake Up Functionality" on page 26 added
Table 36 "Local Bluetooth Settings" on page 26 updated
Table 38 "Local Hardware Commands" on page 28 updated
Section 14.1 "MATCHING NETWORK" on page 32 updated
Section 14.2 "FILTERED POWER SUPPLY" on page 32 updated
Section 14.3 "HOST INTERFACE" on page 32 updated
Application|
Information
Figure 21 "Example System Schematic with pre-selected 115.2kbit/s UART speed" on page 32
updated
Soldering
•
Figure 26 "Typical Reflow Profiles" on page 37 updated
Revision 1.0
39
www.national.com
17.0 Physical Dimensions inches (millimeters) unless otherwise noted
NOTES:
PAD PITCH IS 1.00 MILLIMETER (.0394”) NON-ACCUMULATIVE.
UNLESS OTHERWISE SPECIFIED, ALL DIMENSIONS ARE IN INCHES.
TOLERANCE, UNLESS OTHERWISE SPECIFIED:
TWO PLACE (.00): ±.01
THREE PLACE (.000): ±.002
ANGULAR: ±1°
Figure 27. LTCC (Low Temperature Co-Fired Ceramic) Package SB116A (RevA)
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, 2. A critical component is any component of a life support device
(a) are intended for surgical implant into the body, or (b) support
or sustain life, and whose failure to perform, when properly used
in accordance with instructions for use provided in the labeling,
can be reasonably expected to result in a significant injury to the
user.
or system whose failure to perform can be reasonably expected
to cause the failure of the life support device or system, or to af-
fect its safety or effectiveness.
BANNED SUBSTANCE COMPLIANCE
National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship
Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no “Banned
Substances” as defined in CSP-9-111S2.
National Semiconductor
Corporation
National Semiconductor
Europe
National Semiconductor
Asia Pacific
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Japan Ltd.
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
Customer Response Group
Tel: 65-254-4466
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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