LP2950CDT-5.0/NOPB [NSC]
IC VREG 5 V FIXED POSITIVE LDO REGULATOR, 0.6 V DROPOUT, PSSO2, TO-252, DPAK-3/2, Fixed Positive Single Output LDO Regulator;
| 型号： | LP2950CDT-5.0/NOPB |
| 厂家： | 
National Semiconductor |
| 描述： | IC VREG 5 V FIXED POSITIVE LDO REGULATOR, 0.6 V DROPOUT, PSSO2, TO-252, DPAK-3/2, Fixed Positive Single Output LDO Regulator 输出元件 调节器 |
| 文件： | 总26页 (文件大小：581K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
June 17, 2009
LP2950/LP2951
Series of Adjustable Micropower Voltage Regulators
(.05% typ.) and a very low output voltage temperature coef-
ficient, making the part useful as a low-power voltage refer-
General Description
The LP2950 and LP2951 are micropower voltage regulators
with very low quiescent current (75μA typ.) and very low
dropout voltage (typ. 40mV at light loads and 380mV at
100mA). They are ideally suited for use in battery-powered
systems. Furthermore, the quiescent current of the LP2950/
LP2951 increases only slightly in dropout, prolonging battery
life.
ence.
Features
5V, 3V, and 3.3V versions available
■
■
■
■
■
■
■
■
High accuracy output voltage
Guaranteed 100mA output current
The LP2950-5.0 is available in the surface-mount D-Pak
package, and in the popular 3-pin TO-92 package for pin-
compatibility with older 5V regulators. The 8-lead LP2951 is
available in plastic, ceramic dual-in-line, LLP, or metal can
packages and offers additional system functions.
Extremely low quiescent current
Low dropout voltage
Extremely tight load and line regulation
Very low temperature coefficient
Use as Regulator or Reference
One such feature is an error flag output which warns of a low
output voltage, often due to falling batteries on the input. It
may be used for a power-on reset. A second feature is the
logic-compatible shutdown input which enables the regulator
to be switched on and off. Also, the part may be pin-strapped
for a 5V, 3V, or 3.3V output (depending on the version), or
programmed from 1.24V to 29V with an external pair of re-
sistors.
Needs minimum capacitance for stability
■
■
■
Current and Thermal Limiting
Stable with low-ESR output capacitors (10mΩ to 6Ω)
LP2951 versions only
Error flag warns of output dropout
■
■
■
Careful design of the LP2950/LP2951 has minimized all con-
tributions to the error budget. This includes a tight initial
tolerance (.5% typ.), extremely good load and line regulation
Logic-controlled electronic shutdown
Output programmable from 1.24 to 29V
Block Diagram and Typical Applications
LP2950
LP2951
854625
854601
© 2009 National Semiconductor Corporation
8546
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10-Lead Ceramic Surface-Mount Package (WG)
Connection Diagrams
TO-92 Plastic Package (Z)
854602
Bottom View
854664
Top View
Dual-In-Line Packages (N, J)
Surface-Mount Package (M, MM)
TO-252 (D-Pak)
854626
Top View
854670
Front View
Metal Can Package (H)
8-Lead LLP
854671
Connect DAP to GND at device pin 4.
854619
Top View
Top View
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2
Ordering Information
Temperature
Part
Number
Package
Marking
Transport
Media
NSC
Drawing
VOUT
Package
Range
TO-92
(Z)
−40 < TJ < 125
3.0
LP2950ACZ-3.0
LP2950CZ-3.0
LP2950ACZ-3.3
LP2950CZ-3.3
LP2950ACZ-5.0
LP2950CZ-5.0
LP2950CDT-3.0
LP2950CDTX-3.0
LP2950CDT-3.3
LP2950CDTX-3.3
LP2950CDT-5.0
LP2950CDTX-5.0
LP2951ACN-3.0
LP2951CN-3.0
LP2951ACN-3.3
LP2951CN-3.3
LP2951ACN
2950A CZ3.0
2950 CZ3.0
Bag
Z03A
TD03B
N08E
M08A
Bag
3.3
5.0
3.0
3.3
5.0
3.0
3.3
5.0
3.0
2950A CZ3.3
2950 CZ3.3
Bag
Bag
2950A CZ5.0
2950 CZ5.0
Bag
Bag
TO-252
(D-Pak)
−40 < TJ < 125
−40 < TJ < 125
−40 < TJ < 125
LP2950CDT-3.0
75 Units/Rail
2.5k Units Tape and Reel
75 Units/Rail
LP2950CDT-3.3
LP2950CDT-5.0
2.5k Units Tape and Reel
75 Units/Rail
2.5k Units Tape and Reel
40 Units/Rail
N
LP2951ACN-3.0
LP2951CN-3.0
LP2951ACN-3.3
LP2951CN-3.3
LP2951ACN
(N-08E)
40 Units/Rail
40 Units/Rail
40 Units/Rail
40 Units/Rail
LP2951CN
LP2951CN
40 Units/Rail
M
(M08A)
LP2951ACM-3.0
LP2951ACMX-3.0
LP2951CM-3.0
LP2951CMX-3.0
LP2951ACM-3.3
LP2951ACMX-3.3
LP2951CM-3.3
LP2951CMX-3.3
LP2951ACM
2951ACM30*
(where * is die rev letter)
95 Units/Rail
2.5k Units Tape and Reel
95 Units/Rail
2951CM30*
(where * is die rev letter)
2.5k Units Tape and Reel
95 Units/Rail
3.3
5.0
3.0
3.3
5.0
2951ACM33*
(where * is die rev letter)
2.5k Units Tape and Reel
95 Units/Rail
2951CM33*
(where * is die rev letter)
2.5k Units Tape and Reel
95 Units/Rail
2951ACM*
(where * is die rev letter)
LP2951ACMX
2.5k Units Tape and Reel
95 Units/Rail
LP2951CM
2951CM*
(where * is die rev letter)
LP2951CMX
2.5k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
1k Units Tape and Reel
3.5k Units Tape and Reel
40 Units/Rail
MM
(MUA08A)
−40 < TJ < 125
LP2951ACMM-3.0
LP2951ACMMX-3.0
LP2951CMM-3.0
LP2951CMMX-3.0
LP2951ACMM-3.3
LP2951ACMMX-3.3
LP2951CMM-3.3
LP2951CMMX-3.3
LP2951ACMM
LP2951ACMMX
LP2951CMM
L0BA
L0BB
L0CA
L0CB
L0DA
L0DB
MUA08A
LP2951CMMX
LP2951J/883
J
−55 < TJ < 150
−55 < TJ < 150
−55 < TJ < 150
5.0
5.0
5.0
See MIL/AERO Datasheet
See MIL/AERO Datasheet
See MIL/AERO Datasheet
J08A
H08C
(J08A)
H
LP2951H/883
Tray
Tray
(H08C)
WG
LP2951WG/883
WG10A
(WG10A)
3
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Temperature
Range
Part
Number
Package
Marking
Transport
Media
NSC
Drawing
VOUT
Package
8-lead LLP −40 < TJ < 125
3.0
LP2951ACSD-3.0
LP2951ACSDX-3.0
LP2951CSD-3.0
LP2951CSDX-3.0
LP2951ACSD-3.3
LP2951ACSDX-3.3
LP2951CSD-3.3
LP2951CSDX-3.3
LP2951ACSD
51AC30
51AC30B
51AC33
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
SDC08A
3.3
5.0
51AC33B
2951AC
LP2951ACSDX
LP2951CSD
2951ACB
LP2951CSDX
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4
ESD Rating
Human Body Model(Note 18)
Absolute Maximum Ratings (Note 1)
2500V
30V
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Operating Ratings (Note 1)
Maximum Input Supply Voltage
Input Supply Voltage
−0.3 to +30V
Junction Temperature Range
(TJ) (Note 8)
SHUTDOWN Input Voltage,
Error Comparator Output
Voltage, (Note 9)
LP2951
−55° to +150°C
−40° to +125°C
FEEDBACK Input Voltage
−1.5 to +30V
LP2950AC-XX, LP2950C-XX,
LP2951AC-XX, LP2951C-XX
ꢀ(Notes 9, 10)
Power Dissipation
Junction Temperature (TJ)
Ambient Storage Temperature
Internally Limited
+150°C
−65° to +150°C
Soldering Dwell Time, Temperature
Wave
Infrared
Vapor Phase
4 seconds, 260°C
10 seconds, 240°C
75 seconds, 219°C
Electrical Characteristics (Note 2)
LP2951
LP2950AC-XX
LP2951AC-XX
Tested Design
LP2950C-XX
LP2951C-XX
Tested Design
Limit Limit
Conditions
(Note 2)
Parameter
Units
Tested
Limit
Typ
Typ
Limit
Limit
Typ
(Notes 3, 16)
(Note 3) (Note 4)
(Note 3) (Note 4)
3V Versions (Note 17)
Output Voltage
TJ = 25°C
3.015
2.985
3.015
2.985
3.030
3.030
2.970
3.045
V max
V min
V max
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
−25°C ≤ TJ ≤ 85°C
2.970
3.036
2.964
3.042
2.955
3.060
2.940
3.072
V min
V max
V min
V max
Full Operating
3.036
2.964
3.045
Temperature Range
Output Voltage
100μA ≤ IL ≤ 100mA
TJ ≤ TJMAX
2.955
2.958
2.928
V min
3.3V Versions (Note 17)
Output Voltage
TJ = 25°C
3.317
3.284
3.317
3.284
3.333
3.333
3.267
3.350
V max
V min
V max
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
−25°C ≤ TJ ≤ 85°C
3.267
3.340
3.260
3.346
3.251
3.366
3.234
3.379
V min
V max
V min
V max
Full Operating
3.340
3.260
3.350
Temperature Range
Output Voltage
100μA ≤ IL ≤ 100mA
TJ ≤ TJMAX
3.251
3.254
3.221
V min
5V Versions (Note 17)
Output Voltage
TJ = 25°C
5.025
4.975
5.025
4.975
5.05
5.05
4.95
5.075
V max
V min
V max
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
−25°C ≤ TJ ≤ 85°C
4.95
5.06
4.925
5.1
V min
V max
V min
V max
Full Operating
5.06
4.94
Temperature Range
4.94
4.9
Output Voltage
5.075
5.075
5.12
100μA ≤ IL ≤ 100mA
TJ ≤ TJMAX
4.925
4.925
4.88
V min
All Voltage Options
5
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LP2951
Tested
LP2950AC-XX
LP2951AC-XX
Tested Design
LP2950C-XX
LP2951C-XX
Conditions
(Note 2)
Parameter
Units
Tested Design
Typ
20
Limit
(Notes 3, 16)
120
Typ
20
Limit
Limit
Typ
50
Limit
Limit
(Note 3) (Note 4)
(Note 3) (Note 4)
Output Voltage
Temperature
Coefficient
(Note 12)
100
150
ppm/°C
Line Regulation
(Note 14)
0.03
0.04
0.1
0.03
0.04
0.1
0.04
0.1
0.2
% max
% max
(VONOM + 1)V ≤ Vin
≤ 30V (Note 15)
100μA ≤ IL ≤ 100mA
0.5
0.2
0.4
Load Regulation
(Note 14)
0.1
0.3
0.1
0.2
0.2
0.3
% max
% max
Dropout Voltage
(Note 5)
80
80
80
mV max
mV max
mV max
mV max
IL = 100μA
50
150
450
600
120
50
150
450
600
120
50
150
450
600
120
IL = 100mA
380
75
380
75
380
75
Ground
Current
IL = 100μA
μA max
μA max
mA max
mA max
μA max
140
12
140
140
IL = 100mA
8
8
12
8
12
14
14
14
Dropout
Vin = (VONOM − 0.5) 110
170
110
170
110
170
V
Ground Current
Current Limit
200
200
200
IL = 100μA
μA max
mA max
mA max
Vout = 0
160
200
220
0.2
160
200
220
0.2
160
200
220
0.2
Thermal Regulation
(Note 13)
0.05
0.05
0.05
%/W
max
Output Noise,
430
160
430
160
430
160
CL = 1μF (5V Only)
CL = 200μF
μV rms
μV rms
10 Hz to 100 kHz
CL = 3.3μF
100
100
100
(Bypass = 0.01μF
μV rms
Pins 7 to 1 (LP2951)
8-pin Versions Only
LP2951
LP2951AC-XX
LP2951C-XX
Reference
1.23
5
1.25
1.23
5
1.25
1.23
5
1.26
V max
Voltage
1.26
1.22
1.2
1.26
1.27
V max
V min
1.22
1.2
1.21
1.2
V min
Reference
Voltage
(Note 7)
1.27
1.19
40
1.27
1.19
40
1.285
1.185
40
V max
V min
Feedback Pin
Bias Current
20
20
20
20
20
50
nA max
nA max
ppm/°C
60
60
60
Reference Voltage
Temperature
Coefficient
(Note 12)
Feedback Pin Bias
Current Temperature
Coefficient
0.1
0.1
0.1
nA/°C
Error Comparator
Output Leakage
Current
VOH = 30V
0.01
1
0.01
1
0.01
1
μA max
μA max
2
2
2
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LP2951
Tested
LP2950AC-XX
LP2951AC-XX
Tested Design
LP2950C-XX
LP2951C-XX
Conditions
(Note 2)
Parameter
Units
Tested Design
Typ
Limit
(Notes 3, 16)
250
Typ
Limit
Limit
Typ
Limit
Limit
(Note 3) (Note 4)
250
(Note 3) (Note 4)
250
Output Low
Vin = (VONOM − 0.5) 150
150
150
mV max
mV max
V
Voltage
400
400
400
IOL = 400μA
Upper Threshold
Voltage
(Note 6)
(Note 6)
(Note 6)
60
75
15
1.3
40
25
60
75
15
1.3
40
60
75
15
1.3
40
mV min
mV min
mV max
mV max
mV
25
25
Lower Threshold
Voltage
95
95
95
140
140
140
Hysteresis
Shutdown Input
Input
V
Logic
Low (Regulator ON)
High (Regulator
OFF)
0.6
2.0
0.7
2.0
0.7
2.0
V max
V min
Voltage
Shutdown Pin Input
Current
Vshutdown = 2.4V
Vshutdown = 30V
(Note 11)
30
450
3
50
100
600
750
10
30
450
3
50
100
600
750
10
30
450
3
50
100
600
750
10
μA max
μA max
μA max
μA max
μA max
μA max
Regulator Output
Current in Shutdown
20
20
20
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2: Unless otherwise specified all limits guaranteed for VIN = (VONOM + 1)V, IL = 100μA and CL = 1μF for 5V versions and 2.2μF for 3V and 3.3V versions.
A = TJ = 25°C.
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Note 3: Guaranteed and 100% production tested.
Note 4: Guaranteed but not 100% production tested. These limits are not used to calculate outgoing AQL levels.
Note 5: Dropout Voltage is defined as the input to output differential at which the output voltage drops 100 mV below its nominal value measured at 1V differential.
At very low values of programmed output voltage, the minimum input supply voltage of 2V (2.3V over temperature) must be taken into account.
Note 6: Comparator thresholds are expressed in terms of a voltage differential at the Feedback terminal below the nominal reference voltage measured at Vin
=
(VONOM + 1)V. To express these thresholds in terms of output voltage change, multiply by the error amplifier gain = Vout/Vref = (R1 + R2)/R2.For example, at a
programmed output voltage of 5V, the Error output is guaranteed to go low when the output drops by 95mV × 5V/1.235V = 384 mV. Thresholds remain constant
as a percent of Vout as Vout is varied, with the dropout warning occurring at typically 5% below nominal, 7.5% guaranteed.
Note 7: Vref ≤ Vout ≤ (Vin − 1V), 2.3V ≤ Vin ≤ 30V, 100μA ≤ IL ≤ 100mA, TJ ≤ TJMAX
.
Note 8: The junction-to-ambient thermal resistances are as follows: 180°C/W and 160°C/W for the TO-92 package with 0.40 inch and 0.25 inch leads to the
printed circuit board (PCB) respectively, 105°C/W for the molded plastic DIP (N), 130°C/W for the ceramic DIP (J), 160°C/W for the molded plastic SOP (M), 200°
C/W for the molded plastic MSOP (MM), and 160°C/W for the metal can package (H). The above thermal resistances for the N, J, M, and MM packages apply
when the package is soldered directly to the PCB. Junction-to-case thermal resistance for the H package is 20°C/W. Junction-to-case thermal resistance for the
TO-252 package is 5.4°C/W. The value of θJA for the LLP package is typically 51°C/W but is dependent on the PCB trace area, trace material, and the number
of layers and thermal vias. For details of thermal resistance and power dissipation for the LLP package, refer to Application Note AN-1187.
Note 9: May exceed input supply voltage.
Note 10: When used in dual-supply systems where the output terminal sees loads returned to a negative supply, the output voltage should be diode-clamped to
ground.
Note 11: Vshutdown ≥ 2V, Vin ≤ 30V, Vout = 0, Feedback pin tied to VTAP
.
Note 12: Output or reference voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range.
Note 13: Thermal regulation is defined as the change in output voltage at a time T after a change in power dissipation is applied, excluding load or line regulation
effects. Specifications are for a 50mA load pulse at VIN = 30V (1.25W pulse) for T = 10ms.
Note 14: Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to heating effects
are covered under the specification for thermal regulation.
Note 15: Line regulation for the LP2951 is tested at 150°C for IL = 1mA. For IL = 100μA and TJ = 125°C, line regulation is guaranteed by design to 0.2%. See
Typical Performance Characteristics for line regulation versus temperature and load current.
Note 16: A Military RETS specification is available on request. At time of printing, the LP2951 RETS specification complied with the boldface limits in this column.
The LP2951H, WG, or J may also be procured as Standard Military Drawing Spec #5962-3870501MGA, MXA, or MPA.
Note 17: All LP2950 devices have the nominal output voltage coded as the last two digits of the part number. In the LP2951 products, the 3.0V and 3.3V versions
are designated by the last two digits, but the 5V version is denoted with no code at this location of the part number (refer to ordering information table).
Note 18: Human Body Model 1.5kΩ in series with 100pF.
7
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Typical Performance Characteristics
Quiescent Current
Dropout Characteristics
854627
854628
Input Current
Input Current
854629
854630
Output Voltage vs. Temperature of 3
Representative Units
Quiescent Current
854632
854631
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Quiescent Current
Quiescent Current
Dropout Voltage
Quiescent Current
Short Circuit Current
Dropout Voltage
854633
854635
854637
854634
854636
854638
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LP2951 Minimum Operating Voltage
LP2951 Feedback Bias Current
854639
854640
LP2951 Feedback Pin Current
LP2951 Error Comparator Output
854642
854641
LP2951 Comparator Sink Current
Line Transient Response
854643
854644
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Load Transient Response
LP2951 Enable Transient
Ripple Rejection
Load Transient Response
Output Impedance
Ripple Rejection
854645
854646
854648
854650
854647
854649
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Ripple Rejection
LP2951 Divider Resistance
Line Regulation
LP2951 Output Noise
854651
854653
854655
854652
Shutdown Threshold Voltage
854654
LP2951 Maximum Rated Output Current
854656
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LP2950 Maximum Rated Output Current
Thermal Response
854657
854658
Output Capacitor ESR Range
854663
13
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input is ramped up and down. For 5V versions, the ERROR
signal becomes valid (low) at about 1.3V input. It goes high
at about 5V input (the input voltage at which VOUT = 4.75V).
Since the LP2951's dropout voltage is load-dependent (see
curve in typical performance characteristics), the input volt-
age trip point (about 5V) will vary with the load current. The
output voltage trip point (approx. 4.75V) does not vary with
load.
Application Hints
EXTERNAL CAPACITORS
A 1.0μF (or greater) capacitor is required between the output
and ground for stability at output voltages of 5V or more. At
lower output voltages, more capacitance is required (2.2μF or
more is recommended for 3V and 3.3V versions). Without this
capacitor the part will oscillate. Most types of tantalum or alu-
minum electrolytics work fine here; even film types work but
are not recommended for reasons of cost. Many aluminum
electrolytics have electrolytes that freeze at about −30°C, so
solid tantalums are recommended for operation below −25°
C. The important parameters of the capacitor are an ESR of
about 5Ω or less and a resonant frequency above 500kHz.
The value of this capacitor may be increased without limit.
The error comparator has an open-collector output which re-
quires an external pull up resistor. This resistor may be re-
turned to the output or some other supply voltage depending
on system requirements. In determining a value for this re-
sistor, note that while the output is rated to sink 400μA, this
sink current adds to battery drain in a low battery condition.
Suggested values range from 100k to 1 MΩ. The resistor is
not required if this output is unused.
Ceramic capacitors whose value is greater than 1000pF
should not be connected directly from the LP2951 output to
ground. Ceramic capacitors typically have ESR values in the
range of 5 to 10mΩ, a value below the lower limit for stable
operation (see curve Output Capacitor ESR Range).
The reason for the lower ESR limit is that the loop compen-
sation of the part relies on the ESR of the output capacitor to
provide the zero that gives added phase lead. The ESR of
ceramic capacitors is so low that this phase lead does not
occur, significantly reducing phase margin. A ceramic output
capacitor can be used if a series resistance is added (recom-
mended value of resistance about 0.1Ω to 2Ω).
At lower values of output current, less output capacitance is
required for stability. The capacitor can be reduced to
0.33μF for currents below 10mA or 0.1μF for currents below
1mA. Using the adjustable versions at voltages below 5V runs
the error amplifier at lower gains so that more output capaci-
tance is needed. For the worst-case situation of a 100mA load
at 1.23V output (Output shorted to Feedback) a 3.3μF (or
greater) capacitor should be used.
854620
*When VIN ≤ 1.3V, the error flag pin becomes a high impedance, and the
error flag voltage rises to its pull-up voltage. Using VOUT as the pull-up volt-
age (see Figure 2), rather than an external 5V source, will keep the error flag
voltage under 1.2V (typ.) in this condition. The user may wish to divide down
the error flag voltage using equal-value resistors (10kΩ suggested), to en-
sure a low-level logic signal during any fault condition, while still allowing a
valid high logic level during normal operation.
Unlike many other regulators, the LP2950 will remain stable
and in regulation with no load in addition to the internal voltage
divider. This is especially important in CMOS RAM keep-alive
applications. When setting the output voltage of the LP2951
versions with external resistors, a minimum load of 1μA is
recommended.
FIGURE 1. ERROR Output Timing
PROGRAMMING THE OUTPUT VOLTAGE (LP2951)
The LP2951 may be pin-strapped for the nominal fixed output
voltage using its internal voltage divider by tying the output
and sense pins together, and also tying the feedback and
VTAP pins together. Alternatively, it may be programmed for
any output voltage between its 1.235V reference and its 30V
maximum rating. As seen in Figure 2, an external pair of re-
sistors is required.
A 1μF tantalum, ceramic or aluminum electrolytic capacitor
should be placed from the LP2950/LP2951 input to ground if
there is more than 10 inches of wire between the input and
the AC filter capacitor or if a battery is used as the input.
Stray capacitance to the LP2951 Feedback terminal can
cause instability. This may especially be a problem when us-
ing high value external resistors to set the output voltage.
Adding a 100pF capacitor between Output and Feedback and
increasing the output capacitor to at least 3.3μF will fix this
problem.
The complete equation for the output voltage is
ERROR DETECTION COMPARATOR OUTPUT
where VREF is the nominal 1.235 reference voltage and IFB is
the feedback pin bias current, nominally −20nA. The minimum
recommended load current of 1μA forces an upper limit of 1.2
MΩ on the value of R2, if the regulator must work with no load
(a condition often found in CMOS in standby). IFB will produce
a 2% typical error in VOUT which may be eliminated at room
temperature by trimming R1. For better accuracy, choosing
R2 = 100k reduces this error to 0.17% while increasing the
resistor program current to 12μA. Since the LP2951 typically
draws 60μA at no load with Pin 2 open-circuited, this is a small
price to pay.
The comparator produces a logic low output whenever the
LP2951 output falls out of regulation by more than approxi-
mately 5%. This figure is the comparator's built-in offset of
about 60mV divided by the 1.235 reference voltage. (Refer to
the block diagram in the front of the datasheet.) This trip level
remains “5% below normal” regardless of the programmed
output voltage of the 2951. For example, the error flag trip
level is typically 4.75V for a 5V output or 11.4V for a 12V out-
put. The out of regulation condition may be due either to low
input voltage, current limiting, or thermal limiting.
Figure 1 below gives a timing diagram depicting the ER-
ROR signal and the regulated output voltage as the LP2951
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14
REDUCING OUTPUT NOISE
In reference applications it may be advantageous to reduce
the AC noise present at the output. One method is to reduce
the regulator bandwidth by increasing the size of the output
capacitor. This is the only way noise can be reduced on the
3 lead LP2950 but is relatively inefficient, as increasing the
capacitor from 1μF to 220μF only decreases the noise from
430μV to 160μV rms for a 100kHz bandwidth at 5V output.
Noise can be reduced fourfold by a bypass capacitor across
R1, since it reduces the high frequency gain from 4 to unity.
Pick
854607
*See Application Hints
or about 0.01μF. When doing this, the output capacitor must
be increased to 3.3μF to maintain stability. These changes
reduce the output noise from 430μV to 100μV rms for a
100kHz bandwidth at 5V output. With the bypass capacitor
added, noise no longer scales with output voltage so that im-
provements are more dramatic at higher output voltages.
**Drive with TTL-high to shut down. Ground or leave open if shutdown fea-
ture is not to be used.
Note: Pins 2 and 6 are left open.
FIGURE 2. Adjustable Regulator
Typical Applications
1A Regulator with 1.2V Dropout
854622
300mA Regulator with 0.75V Dropout
Wide Input Voltage Range Current Limiter
854621
854609
*Minimum input-output voltage ranges from 40mV to 400mV, depending on load
current. Current limit is typically 160mA.
15
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Low Drift Current Source
5 Volt Current Limiter
854610
*Minimum input-output voltage ranges from 40mV to 400mV, depending on load
current. Current limit is typically 160mA.
854608
Regulator with Early Warning and Auxiliary Output
Latch Off When Error Flag Occurs
854612
854611
■ Early warning flag on low input voltage
■ Main output latches off at lower input voltages
■ Battery backup on auxiliary output
■ Operation: Reg. #1's Vout is programmed one diode drop above 5V. Its error
flag becomes active when Vin ≤ 5.7V. When Vin drops below 5.3V, the error flag
of Reg. #2 becomes active and via Q1 latches the main output off. When Vin again
exceeds 5.7V Reg. #1 is back in regulation and the early warning signal rises,
unlatching Reg. #2 via D3.
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16
2 Ampere Low Dropout Regulator
854613
For 5Vout, use internal resistors. Wire pin 6 to 7, & wire pin 2 to +Vout Bus.
*High input lowers Vout to 2.5V
5V Regulator with 2.5V Sleep Function
Open Circuit Detector for 4 → 20mA Current Loop
854615
854614
17
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Regulator with State-of-Charge Indicator
854616
*Optional Latch off when drop out occurs. Adjust R3 for C2 Switching when Vin is 6.0V.
**Outputs go low when Vin drops below designated thresholds.
Low Battery Disconnect
854617
For values shown, Regulator shuts down when Vin < 5.5V and turns on again at 6.0V. Current drain in disconnected mode is ≈ 150μA.
*Sets disconnect Voltage
**Sets disconnect Hysteresis
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18
System Overtemperature Protection Circuit
854618
LM34 for 125°F Shutdown
LM35 for 125°C Shutdown
19
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Schematic Diagram
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20
Physical Dimensions inches (millimeters) unless otherwise noted
Order Number LP2951WG/883
NS Package Number WG10A
Metal Can Package (H)
NS Package Number H08C
21
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Ceramic Dual-In-Line Package (J)
NS Package Number J08A
Surface Mount Package (M)
NS Package Number M08A
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22
Molded Dual-In-Line Package (N)
NS Package Number N08E
Molded TO-92 Package (Z)
NS Package Number Z03A
23
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Surface Mount Package (MM)
NS Package Number MUA08A
D-Pak Package
NS Package Number TD03B
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24
LLP Package
NS Package Number SDC08A
25
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Notes
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