LP8345CDT-2.5 [NSC]
Low Dropout, Low IQ, 500mA CMOS Linear Regulator; 低压差，低IQ ， 500毫安CMOS线性稳压器
| 型号： | LP8345CDT-2.5 |
| 厂家： | 
National Semiconductor |
| 描述： | Low Dropout, Low IQ, 500mA CMOS Linear Regulator |
| 文件： | 总13页 (文件大小：281K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 2003
LP8345
Low Dropout, Low IQ, 500mA CMOS Linear Regulator
General Description
Features
n
1.5% Typical VOUT tolerance
The LP8345 low-dropout CMOS linear regulator are avail-
able in 5V, 3.3V, 2.5V, 1.8V or adjustable output versions.
Packaged in our 6ld LLP package and 3ld DPAK they can
deliver up to 500mA output current.
@
n 210mV Typical Dropout 500mA (VO = 5V)
n Wide Operating Range
2.7V to 10V
n Internal 500mA PMOS Output Transistor
n 19µA Typical Quiescent Current
n Thermal Overload Limiting
n Foldback Current Limiting
n Zener Trimmed Bandgap Reference
n Space saving LLP package
n Temperature Range
@
Typical dropout voltage
500mA is 210mV for the 5.0V
version, 270mV for the 3.3V version and 335mV for the 2.5V
version.
The devices include a zener trimmed bandgap voltage ref-
erence, foldback current limiting and thermal overload limit-
ing.
The LP8345 features a PMOS output transistor which unlike
PNP type low dropout regulators requires no base drive
current. This allows the device ground current to remain less
than 50µA over operating temperature, supply voltage and
irrespective of the load current.
— LP8345C
— LP8345I
0˚C to 125˚C
−40˚C to 125˚C
Applications
n Hard Disk Drives
n Notebook Computers
n Battery Powered Electronics
n Portable Instrumentation
Typical Applications
Fixed VOUT
20064801
Adjustable VOUT
20064802
© 2003 National Semiconductor Corporation
DS200648
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Ordering Information
Package
Part Number
LP8345CLD-ADJ
LP8345CLDX-ADJ
LP8345CLD-1.8
LP8345CLDX-1.8
LP8345CLD-2.5
LP8345CLDX-2.5
LP8345CLD-3.3
LP8345CLDX-3.3
LP8345CLD-5.0
LP8345CLDX-5.0
LP8345ILD-ADJ
LP8345ILDX-ADJ
LP8345ILD-1.8
LP8345ILDX-1.8
LP8345ILD-2.5
LP8345ILDX-2.5
LP8345ILD-3.3
LP8345ILDX-3.3
LP8345ILD-5.0
LP8345ILDX-5.0
LP8345CDT-1.8
LP8345CDTX-1.8
LP8345CDT-2.5
LP8345CDTX-2.5
LP8345CDT-3.3
LP8345CDTX-3.3
LP8345CDT-5.0
LP8345CDTX-5.0
LP8345IDT-1.8
LP8345IDTX-1.8
LP8345IDT-2.5
LP8345IDTX-2.5
LP8345IDTX-3.3
LP8345IDT-3.3
LP8345IDTX-5.0
LP8345IDT-5.0
Package Marking
L045B
Transport Media
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5k Units Tape and Reel
75 Units/Rail
NSC Drawing
LDE06A
6-Pin LLP
L046B
L047B
L048B
L049B
L073B
L074B
L075B
L076B
L077B
3-Pin DPAK
TD03B
LP8345CDT-1.8
LP8345CDT-2.5
LP8345CDT-3.3
LP8345CDT-5.0
LP8345IDT-1.8
LP8345IDT-2.5
LP8345IDTX-3.3
LP8345IDTX-5.0
2.5k Units Tape and Reel
75 Units/Rail
2.5k Units Tape and Reel
75 Units/Rail
2.5k Units Tape and Reel
75 Units/Rail
2.5k Units Tape and Reel
75 Units/Rail
2.5k Units Tape and Reel
75 Units/Rail
2.5k Units Tape and Reel
75 Units/Rail
2.5k Units Tape and Reel
75 Units/Rail
2.5k Units Tape and Reel
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2
Connection Diagrams
6-Pin LLP
6-Pin LLP
ADJUSTABLE OUTPUT VOLTAGE
FIXED OUTPUT VOLTAGE
20064806
20064804
Bottom View
Bottom View
Note: V Pins (Pin 1 & 6) must be connected together externally for full 500mA operation (250mA max per pin).
IN
V
OUT
Sense (Pin 5) must be connected to V
(Pin 4).
OUT
T0-252
20064805
Top View
3
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Absolute Maximum Ratings (Notes 1,
2)
Human Body Model (Note 6)
Machine Model
2kV
200V
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Operating Ratings(Notes 1, 2)
Supply Voltage
Temperature Range
LP8345C
2.7 to 10V
VIN, VOUT, VOUT Sense, ADJ
Storage Temperature Range
Junction Temperature (TJ)
Power Dissipation
−0.3V to 12V
−65˚C to 160˚C
150˚C
0˚C to 125˚C
LP8345I
−40˚C to 125˚C
(Note 3)
ESD Rating
LP8345C Electrical Characteristics
Unless otherwise specified all limits guaranteed for VIN = VO+ 1V, CIN = COUT = 10µF, TJ = 25˚C. Boldface limits apply over
the full operating temperature range of TJ = 0˚C to 125˚C
Symbol
VIN
Parameter
Input Voltage
Conditions
Min
Typ
Max
Units
(Note 5) (Note 4) (Note 5)
LP8345-ADJ,1.8, 2.5
2.7
10
10
V
V
LP8345-3.3, 5.0
VOUT
Output Voltage
LP8345-ADJ, ADJ = OUT
IOUT = 10mA, VIN = 2.7V, TJ = 25˚C
100µA ≤IOUT≤ 500mA, 2.7V ≤VIN≤VOUT +4V
LP8345-1.8
1.231
1.250
1.800
2.500
3.300
5.000
1.269
1.213
1.288
IOUT = 10mA, VIN = 2.8V, TJ = 25˚C
100µA ≤IOUT ≤500mA, 2.8V ≤VIN≤6V
LP8345-2.5
1.773
1.827
V
V
V
V
1.746
1.854
IOUT = 10mA, VIN = 3.5V, TJ = 25˚C
100µA ≤IOUT ≤500mA, 3.5V ≤VIN ≤6.5V
LP8345-3.3
2.463
2.538
2.425
2.575
IOUT = 10mA, VIN = 4.3V TJ = 25˚C
100µA ≤IOUT ≤500mA, 4.3V ≤VIN ≤7.5V
LP8345-5.0
3.250
3.350
3.201
3.399
IOUT = 10mA, VIN = 6V, TJ = 25˚C
100µA ≤IOUT ≤500mA, 6V ≤VIN ≤9V
LP8345-ADJ, ADJ=OUT
IOUT = 1mA to 500mA, VIN = 2.7V
LP8345-1.8
4.925
5.075
4.850
5.150
∆VO
Load Regulation
6
7
20
20
30
35
IOUT = 1mA to 500mA, VIN = 2.8V
LP8345-2.5
mV
IOUT = 1mA to 500mA, VIN = 3.5V
LP8345-3.3
9
IOUT = 1mA to 500mA, VIN = 4.3V
LP8345-5.0
12
IOUT = 1mA to 500mA, VIN = 6V
VOUT + 0.5V ≤VIN ≤10V, IOUT = 25mA
(Note 7)
14
4
40
15
∆VO
Line Regulation
mV
mV
VIN − VO Dropout Voltage
(Note 7) (Note 8)
LP8345-2.5
IOUT = 500mA
335
270
650
500
LP8345-3.3
LP8345-ADJ, VOUT = 3.3V, IOUT = 500mA
LP8345-5.0
IOUT = 500mA
210
19
400
50
IQ
Quiescent Current
VIN ≤10V
µA
µA
Minimum Load Current
VIN − VOUT ≤4V
100
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4
LP8345C Electrical Characteristics (Continued)
Unless otherwise specified all limits guaranteed for VIN = VO+ 1V, CIN = COUT = 10µF, TJ = 25˚C. Boldface limits apply over
the full operating temperature range of TJ = 0˚C to 125˚C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 5) (Note 4) (Note 5)
>
ILIMIT
Foldback Current Limit
Ripple Rejection Ratio
VIN − VOUT 5V
450
mA
dB
<
VIN − VOUT 4V
VIN (dc) = VOUT + 2V
1200
48
55
@
VIN (ac) = 1VP-P 120Hz
TSD
Thermal Shutdown
Temp.
160
10
˚C
Thermal Shutdown Hyst.
ADJ Input Leakage
Current
VADJ = 1.5V or 0V
0.01
100
nA
VOUT Leakage Current
LP8345-ADJ
ADJ = OUT, VOUT = 2V, VIN = 10V
LP8345-1.8, VOUT = 2.5V, VIN = 10V
LP8345-2.5, VOUT = 3.5V, VIN = 10V
LP8345-3.3, VOUT = 4V, VIN = 10V
LP8345-5.0, VOUT = 6V, VIN = 10V
10Hz to 10kHz, RL = 1kΩ, COUT = 10µF
10
10
10
10
10
µA
en
Output Noise
250
µVrms
LP8345I Electrical Characteristics
Unless otherwise specified all limits guaranteed for VIN = VO+ 1V, CIN = COUT = 10µF, TJ = 25˚C. Boldface limits apply over
the full operating temperature range of TJ = −40˚C to 125˚C
Symbol
VIN
Parameter
Input Voltage
Output Voltage
Conditions
Min
Typ
Max
Units
(Note 5) (Note 4) (Note 5)
LP8345-ADJ,1.8, 2.5
2.7
10
10
V
V
LP8345-3.3, 5.0
VOUT
LP8345-ADJ, ADJ = OUT
IOUT = 10mA, VIN = 2.7V, TJ = 25˚C
100µA ≤IOUT≤ 500mA, 2.7V ≤VIN≤VOUT +4V
LP8345-1.8
1.231
1.250
1.800
2.500
3.300
5.000
1.269
1.213
1.288
IOUT = 10mA, VIN = 2.8V, TJ = 25˚C
100µA ≤IOUT ≤500mA, 2.8V ≤VIN≤6V
LP8345-2.5
1.773
1.827
V
V
V
V
1.746
1.854
IOUT = 10mA, VIN = 3.5V, TJ = 25˚C
100µA ≤IOUT ≤500mA, 3.5V ≤VIN ≤6.5V
LP8345-3.3
2.463
2.538
2.425
2.575
IOUT = 10mA, VIN = 4.3V TJ = 25˚C
100µA ≤IOUT ≤500mA, 4.3V ≤VIN ≤7.5V
LP8345-5.0
3.250
3.350
3.201
3.399
IOUT = 10mA, VIN = 6V, TJ = 25˚C
100µA ≤IOUT ≤500mA, 6V ≤VIN ≤9V
LP8345-ADJ, ADJ=OUT
4.925
5.075
4.850
5.150
∆VO
Load Regulation
IOUT = 1mA to 500mA, VIN = 2.7V
LP8345-1.8
6
7
20
20
30
35
40
IOUT = 1mA to 500mA, VIN = 2.8V
LP8345-2.5
mV
IOUT = 1mA to 500mA, VIN = 3.5V
LP8345-3.3
9
IOUT = 1mA to 500mA, VIN = 4.3V
LP8345-5.0
12
14
IOUT = 1mA to 500mA, VIN = 6V
5
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LP8345I Electrical Characteristics (Continued)
Unless otherwise specified all limits guaranteed for VIN = VO+ 1V, CIN = COUT = 10µF, TJ = 25˚C. Boldface limits apply over
the full operating temperature range of TJ = −40˚C to 125˚C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 5) (Note 4) (Note 5)
∆VO
Line Regulation
VOUT + 0.5V ≤VIN ≤10V, IOUT = 25mA
4
15
mV
(Note 7)
V
IN − VO Dropout Voltage
LP8345-2.5
(Note 7) (Note 8)
IOUT = 500mA
LP8345-3.3
335
270
650
500
mV
LP8345-ADJ, VOUT = 3.3V, IOUT = 500mA
LP8345-5.0
IOUT = 500mA
VIN ≤10V
210
19
400
50
IQ
Quiescent Current
µA
µA
Minimum Load Current
Foldback Current Limit
VIN − VOUT ≤4V
100
>
ILIMIT
VIN − VOUT 5V
450
1200
55
mA
dB
<
VIN − VOUT 4V
Ripple Rejection Ratio
VIN (dc) = VOUT + 2V
48
@
VIN (ac) = 1VP-P 120Hz
TSD
Thermal Shutdown
Temp.
160
10
˚C
Thermal Shutdown Hyst.
ADJ Input Leakage
Current
VADJ = 1.5V or 0V
0.01
100
nA
VOUT Leakage Current
LP8345-ADJ
ADJ = OUT, VOUT = 2V, VIN = 10V
LP8345-1.8, VOUT = 2.5V, VIN = 10V
LP8345-2.5, VOUT = 3.5V, VIN = 10V
LP8345-3.3, VOUT = 4V, VIN = 10V
LP8345-5.0, VOUT = 6V, VIN = 10V
10Hz to 10kHz, RL = 1kΩ, COUT = 10µF
10
10
10
10
10
µA
en
Output Noise
250
µVrms
Note 1: Absolute Maximum ratings indicate limits beyond which damage may occur. Electrical specifications do not apply when operating the device outside of its
rated operating conditions.
Note 2: All voltages are with respect to the potential at the ground pin.
Note 3: Maximum Power dissipation for the device is calculated using the following equations:
where T
is the maximum junction temperature, T is the ambient temperature, and θ is the junction-to-ambient thermal resistance. The value of the θ for
A JA JA
J(MAX)
the LLP package is specifically dependant on the PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance and
power dissipation for the LLP package, refer to Application Note AN-1187.
Note 4: Typical Values represent the most likely parametric norm.
Note 5: All limits are guaranteed by testing or statistical analysis.
Note 6: Human body model 1.5kΩ in series with 100pF.
Note 7: Condition does not apply to input voltages below 2.7V since this is the minimum input operating voltage.
Note 8: Dropout voltage is measured by reducing V until V drops 100mV from its normal value.
IN
O
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6
Typical Performance Characteristics
Unless otherwise specified, VIN = VO + 1.5V, CIN = COUT = 10µF X7R ceramic, TJ = 25˚C
Output Voltage Change vs. Temperature
Dropout Voltage vs. Load Current
20064807
20064808
Ground Current vs. Temperature (ILOAD = 500mA)
Ground Current vs. Load Current
20064810
20064809
Ground Current vs. Input Voltage
Ripple Rejection Ratio vs. Frequency
20064811
20064812
7
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Typical Performance Characteristics (Continued)
Load Transient Response
Line Transient Response
20064813
20064814
Start-up Response
Minimum Input Voltage Rise Time
20064815
20064819
Minimum Input Voltage Rise Time
Minimum Input Voltage Rise Time
20064820
20064821
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8
Typical Performance Characteristics (Continued)
Minimum Input Voltage Rise Time
Minimum Input Voltage Rise Time
20064822
20064823
9
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Applications Section
GENERAL INFORMATION
achieved by means of negative feedback to the non-
inverting input of the error amplifier. Feedback resistors R1
and R2 are either internal or external to the device, depend-
ing on whether it is a fixed voltage version or the adjustable
version. The negative feedback and high open loop gain of
the error amplifier cause the two inputs of the error amp to be
virtually equal in voltage. If the output voltage changes due
to load changes, the error amplifier and MOSFET driver
provide the appropriate drive to the pass transistor to main-
tain the error amplifier’s inputs as virtually equal.
The LP8345 is a low-dropout, low quiescent current linear
regulator. As shown in Figure 1 it consists of a 1.25V refer-
ence, error amplifier, MOSFET driver, PMOS pass transistor
and for the fixed output versions, an internal feedback net-
work (R1/R2). In addition, the device is protected from over-
load by a thermal shutdown circuit and a foldback current
limit circuit.
The 1.25V reference is connected to the inverting input of
the error amplifier. Regulation of the output voltage is
20064803
FIGURE 1. LP8345 Functional Block Diagram
EXTERNAL CAPACITOR
An Input capacitor of 1µF or greater is required between the
LP8345 VIN pin and ground. While 1µF will provide adequate
bypassing of the VIN supply larger values of input capacitor
(i.e. 10µF) can provide improved bypassing of power supply
noise.
Use the following equation to determine the values of R1 and
R2 for a desired VOUT (R2 = 100Ω is recommended).
Stable operation can be achieved with an output capacitor of
1µF or greater, either ceramic X7R dielectric or aluminum/
tantalum electrolytic. While the minimum capacitor value is
1µF, the typical output capacitor values selected range from
1µF to 10µF. The larger values provide improved load-
transient response, power supply rejection and stability.
MINIMUM LOAD CURRENT
A minimum load of 100µA is required for regulation and
stability over the entire operating temperature range. If ac-
tual load current fall below 100µA it is recommended that a
resistor of value RL =VO/100µA be placed between VO and
ground.
OUTPUT VOLTAGE SETTING (ADJ VERSION ONLY)
The output voltage is set according to the amount of nega-
tive feedback (Note that the pass transistor inverts the feed-
back signal). This feedback is determined by R1 and R2 with
the resulting output voltage represented by the following
equation:
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10
V
IN−VOUT differential. The relationship between these con-
Applications Section (Continued)
START UP CONSIDERATIONS
ditions is shown in the Typical Performance Characteristics
curves (Minimum Input Voltage Rise Time). VIN rise times
<
above the curve result in 5% overshoot.
Under certain operating conditions, overshoot of VOUT at
start-up can occur. The observed overshoot is a function of
rise time of VIN waveform, COUT, start-up load current, and
Customers are encouraged to check the suitability of
LP8345 in their specific application.
11
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Physical Dimensions inches (millimeters) unless otherwise noted
6-Pin LLP
NS Package Number LDE06A
3-Pin DPAK
NS Package Number TD03B
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12
Notes
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COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
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whose failure to perform when properly used in
accordance with instructions for use provided in the
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significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
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safety or effectiveness.
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Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification
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