MAX660 [NSC]
Switched Capacitor Voltage Converter; 开关电容电压转换器
| 型号： | MAX660 |
| 厂家： | 
National Semiconductor |
| 描述： | Switched Capacitor Voltage Converter |
| 文件： | 总11页 (文件大小：262K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 1999
MAX660
Switched Capacitor Voltage Converter
General Description
Features
n Inverts or doubles input supply voltage
n Narrow SO-8 Package
The MAX660 CMOS charge-pump voltage converter inverts
a positive voltage in the range of 1.5V to 5.5V to the corre-
sponding negative voltage. The MAX660 uses two low cost
capacitors to provide 100 mA of output current without the
cost, size, and EMI related to inductor based converters.
With an operating current of only 120 µA and operating effi-
ciency greater than 90% at most loads, the MAX660 pro-
vides ideal performance for battery powered systems. The
MAX660 may also be used as a positive voltage doubler.
n 6.5Ω typical output resistance
n 88% typical conversion efficiency at 100 mA
n Selectable oscillator frequency: 10 kHz/80 kHz
Applications
n Laptop computers
n Cellular phones
The oscillator frequency can be lowered by adding an exter-
nal capacitor to the OSC pin. Also, the OSC pin may be used
to drive the MAX660 with an external clock. A frequency con-
trol (FC) pin selects the oscillator frequency of 10 kHz or 80
kHz.
n Medical instruments
n Operational amplifier power supplies
n Interface power supplies
n Handheld instruments
Typical Application Circuits
Positive Voltage Doubler
Voltage Inverter
DS100898-1
DS100898-2
Connection Diagram
8-Lead SO
DS100898-5
Top View
Ordering Information
Order Number
Top Mark
Package
Supplied as
MAX660M
Date Code
MAX660M
M08A
Rail (95 units/rail)
MAX660MX
Date Code
MAX660M
M08A
Tape and Reel (2500 units/rail)
© 1999 National Semiconductor Corporation
DS100898
www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Power Dissipation
=
(TA 25˚C) (Note 3)
735 mW
150˚C
TJ Max (Note 3)
θJA (Note 3)
170˚C/W
Operating Junction Temp. Range
Storage Temperature Range
Lead Temperature
−40˚C to +85˚C
−65˚C to +150˚C
300˚C
Supply Voltage (V+ to GND, or GND to OUT)
6V
LV
(OUT − 0.3V) to (GND + 3V)
FC, OSC
The least negative of (OUT − 0.3V)
or (V+ − 6V) to (V+ + 0.3V)
(Soldering, 10 seconds)
ESD Rating
V+ and OUT Continuous Output Current
120 mA
1 sec.
2 kV
Output Short-Circuit Duration to GND (Note 2)
Electrical Characteristics
=
Limits in standard typeface are for TJ 25˚C, and limits in boldface type apply over the full operating temperature range. Un-
=
=
=
=
less otherwise specified: V+ 5V, FC Open, C1 C2 150 µF. (Note 4)
Symbol
Parameter
Supply Voltage
Condition
Min
3.5
Typ
Max Units
5.5
=
=
V+
RL 1k
Inverter, LV Open
(Note 5)
=
Inverter, LV GND
1.5
2.5
5.5
5.5
0.5
V
=
Doubler, LV OUT
=
IQ
Supply Current
No Load
FC Open
0.12
1
=
=
LV Open
FC V+
mA
3
IL
Output Current
TA ≤ +85˚C, OUT ≤ −4V
100
100
mA
Ω
>
TA +85˚C, OUT ≤ −3.8V
=
ROUT
FOSC
IOSC
PEFF
Output Resistance (Note 6)
Oscillator Frequency
OSC Input Current
Power Efficiency
IL 100 mA
TA ≤ +85˚C
6.5
10
12
>
TA +85˚C
=
=
OSC Open
FC Open
5
10
80
kHz
µA
=
FC V+
40
=
±
FC Open
2
=
±
FC V+
16
RL (1k) between V+ and OUT
96
92
98
RL (500Ω) between GND and OUT
96
88
%
%
=
IL 100 mA to GND
VOEFF
Voltage Conversion Efficiency
No Load
99
99.96
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device
beyond its rated operating conditions.
Note 2: OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and should be avoided. Also, for tem-
peratures above 85˚C, OUT must not be shorted to GND or V+, or device may be damaged.
=
Note 3: The maximum allowable power dissipation is calculated by using P
DMax
(T
JMax
− T )/θ , where T
JA
is the maximum junction temperature, T is the
JMax A
A
ambient temperature, and θ is the junction-to-ambient thermal resistance of the specified package.
JA
Note 4: In the test circuit, capacitors C and C are 0.2Ω maximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce output volt-
1
2
age and efficiency.
Note 5: The minimum limit for this parameter is different from the limit of 3.0V for the industry-standard “660” product. For inverter operation with supply voltage be-
low 3.5V, connect the LV pin to GND.
Note 6: Specified output resistance includes internal switch resistance and capacitor ESR.
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2
Test Circuit
DS100898-4
FIGURE 1. MAX660 Test Circuit
Typical Performance Characteristics (Circuit of Figure 1)
Supply Current vs
Supply Voltage
Supply Current vs
Oscillator Frequency
Output Source Resistance
vs Supply Voltage
DS100898-36
DS100898-38
DS100898-37
Output Source Resistance
vs Temperature
Efficiency vs Load
Load Current
Output Voltage Drop
vs Load Current
DS100898-39
DS100898-40
DS100898-41
3
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Typical Performance Characteristics (Circuit of Figure 1) (Continued)
Efficiency vs
Oscillator Frequency
Output Voltage vs
Oscillator Frequency
Oscillator Frequency
vs External Capacitance
DS100898-13
DS100898-14
DS100898-15
Oscillator Frequency
Supply Voltage
Oscillator Frequency vs
Supply Voltage
Oscillator Frequency vs
Temperature
=
(FC V+)
=
(FC Open)
=
(FC V+)
DS100898-16
DS100898-17
DS100898-18
Oscillator Frequency
vs Temperature
=
(FC Open)
DS100898-19
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4
Pin Description
Pin
Name
Function
Voltage Inverter
Voltage Doubler
1
FC
Frequency control for internal oscillator:
Same as inverter.
=
=
FC open, fOSC 10 kHz (typ);
=
=
FC V+, fOSC 80 kHz (typ);
FC has no effect when OSC pin is driven externally.
2
CAP+
Connect this pin to the positive terminal of
charge-pump capacitor.
Same as inverter.
3
4
GND
Power supply ground input.
Power supply positive voltage input.
Same as inverter.
CAP−
Connect this pin to the negative terminal of
charge-pump capacitor.
5
6
OUT
LV
Negative voltage output.
Power supply ground input.
LV must be tied to OUT.
Low-voltage operation input. Tie LV to GND when
input voltage is less than 3.5V. Above 3.5V, LV can
be connected to GND or left open. When driving
OSC with an external clock, LV must be connected
to GND.
7
8
OSC
V+
Oscillator control input. OSC is connected to an
internal 15 pF capacitor. An external capacitor can
be connected to slow the oscillator. Also, an
external clock can be used to drive OSC.
Same as inverter except that OSC cannot be driven
by an external clock.
Power supply positive voltage input.
Positive voltage output.
Circuit Description
Application Information
The MAX660 contains four large CMOS switches which are
switched in a sequence to invert the input supply voltage.
Energy transfer and storage are provided by external capaci-
tors. Figure 2 illustrates the voltage conversion scheme.
When S1 and S3 are closed, C1 charges to the supply volt-
age V+. During this time interval switches S2 and S4 are
open. In the second time interval, S1 and S3 are open and S2
and S4 are closed, C1 is charging C2. After a number of
cycles, the voltage across C2 will be pumped to V+. Since
the anode of C2 is connected to ground, the output at the
cathode of C2 equals −(V+) assuming no load on C2, no loss
in the switches, and no ESR in the capacitors. In reality, the
charge transfer efficiency depends on the switching fre-
quency, the on-resistance of the switches, and the ESR of
the capacitors.
SIMPLE NEGATIVE VOLTAGE CONVERTER
The main application of MAX660 is to generate a negative
supply voltage. The voltage inverter circuit uses only two ex-
ternal capacitors as shown in the Typical Application Circuits.
The range of the input supply voltage is 1.5V to 5.5V. For a
supply voltage less than 3.5V, the LV pin must be connected
to ground to bypass the internal regulator circuitry. This gives
the best performance in low voltage applications. If the sup-
ply voltage is greater than 3.5V, LV may be connected to
ground or left open. The choice of leaving LV open simplifies
the direct substitution of the MAX660 for the LMC7660
Switched Capacitor Voltage Converter.
The output characteristics of this circuit can be approximated
by an ideal voltage source in series with a resistor. The volt-
age source equals −(V+). The output resistance Rout is a
function of the ON resistance of the internal MOS switches,
the oscillator frequency, and the capacitance and ESR of C1
and C2. A good approximation is:
where RSW is the sum of the ON resistance of the internal
MOS switches shown in Figure 2.
High value, low ESR capacitors will reduce the output resis-
tance. Instead of increasing the capacitance, the oscillator
frequency can be increased to reduce the 2/(fosc x C1) term.
Once this term is trivial compared with RSW and ESRs, fur-
ther increasing in oscillator frequency and capacitance will
become ineffective.
DS100898-21
FIGURE 2. Voltage Inverting Principle
The peak-to-peak output voltage ripple is determined by the
oscillator frequency, and the capacitance and ESR of the
output capacitor C2:
5
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lows smaller capacitors to be used for equivalent output re-
sistance and ripple, but increases the typical supply current
from 0.12 mA to 1 mA.
Application Information (Continued)
The oscillator frequency can be lowered by adding an exter-
nal capacitor between OSC and GND. (See Typical Perfor-
mance Characteristics.) Also, in the inverter mode, an exter-
nal clock that swings within 100 mV of V+ and GND can be
used to drive OSC. Any CMOS logic gate is suitable for driv-
ing OSC. LV must be grounded when driving OSC. The
maximum external clock frequency is limited to 150 kHz.
Again, using a low ESR capacitor will result in lower ripple.
POSITIVE VOLTAGE DOUBLER
The MAX660 can operate as a positive voltage doubler (as
shown in the Typical Application Circuits). The doubling func-
tion is achieved by reversing some of the connections to the
device. The input voltage is applied to the GND pin with an
allowable voltage from 2.5V to 5.5V. The V+ pin is used as
the output. The LV pin and OUT pin must be connected to
ground. The OSC pin can not be driven by an external clock
in this operation mode. The unloaded output voltage is twice
of the input voltage and is not reduced by the diode D1’s for-
ward drop.
The switching frequency of the converter (also called the
charge pump frequency) is half of the oscillator frequency.
Note: OSC cannot be driven by an external clock in the
voltage-doubling mode.
TABLE 1. MAX660 Oscillator Frequency Selection
FC
OSC
Open
Open
Oscillator
10 kHz
The Schottky diode D1 is only needed for start-up. The inter-
nal oscillator circuit uses the V+ pin and the LV pin (con-
nected to ground in the voltage doubler circuit) as its power
rails. Voltage across V+ and LV must be larger than 1.5V to
insure the operation of the oscillator. During start-up, D1 is
used to charge up the voltage at V+ pin to start the oscillator;
also, it protects the device from turning-on its own parasitic
diode and potentially latching-up. Therefore, the Schottky di-
ode D1 should have enough current carrying capability to
charge the output capacitor at start-up, as well as a low for-
ward voltage to prevent the internal parasitic diode from
turning-on. A Schottky diode like 1N5817 can be used for
most applications. If the input voltage ramp is less than
10V/ms, a smaller Schottky diode like MBR0520LT1 can be
used to reduce the circuit size.
Open
V+
80 kHz
Open
or V+
External
Capacitor
See Typical
Performance
Characteristics
N/A
External Clock
(inverter mode only)
External Clock
Frequency
CAPACITOR SELECTION
As discussed in the Simple Negative Voltage Converter sec-
tion, the output resistance and ripple voltage are dependent
on the capacitance and ESR values of the external capaci-
tors. The output voltage drop is the load current times the
output resistance, and the power efficiency is
SPLIT V+ IN HALF
Another interesting application shown in the Basic Applica-
tion Circuits is using the MAX660 as a precision voltage di-
vider. Since the off-voltage across each switch equals VIN/2,
the input voltage can be raised to +11V.
Where IQ(V+) is the quiescent power loss of the IC device,
and IL ROUT is the conversion loss associated with the
2
switch on-resistance, the two external capacitors and their
ESRs.
Since the switching current charging and discharging C1 is
approximately twice as the output current, the effect of the
ESR of the pumping capacitor C1 is multiplied by four in the
output resistance. The output capacitor C2 is charging and
discharging at a current approximately equal to the output
current, therefore, its ESR only counts once in the output re-
sistance. However, the ESR of C2 directly affects the output
voltage ripple. Therefore, low ESR capacitors (Table 2) are
recommended for both capacitors to maximize efficiency, re-
duce the output voltage drop and voltage ripple. For conve-
nience, C1 and C2 are usually chosen to be the same.
The output resistance varies with the oscillator frequency
and the capacitors. In Figure 4, the output resistance vs. os-
cillator frequency curves are drawn for three different tanta-
lum capacitors. At very low frequency range, capacitance
plays the most important role in determining the output resis-
tance. Once the frequency is increased to some point (such
as 20 kHz for the 150 µF capacitors), the output resistance is
dominated by the ON resistance of the internal switches and
the ESRs of the external capacitors. A low value, smaller
size capacitor usually has a higher ESR compared with a
bigger size capacitor of the same type. For lower ESR, use
ceramic capacitors.
DS100898-3
FIGURE 3. Splitting VIN in Half
CHANGING OSCILLATOR FREQUENCY
The internal oscillator frequency can be selected using the
Frequency Control (FC) pin. When FC is open, the oscillator
frequency is 10 kHz; when FC is connected to V+, the fre-
quency increases to 80 kHz. A higher oscillator frequency al-
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Application Information (Continued)
DS100898-32
FIGURE 4. Output Source Resistance vs Oscillator Frequency
TABLE 2. Low ESR Capacitor Manufacturers
Manufacturer
Nichicon Corp.
AVX Corp.
Sprague
Phone
FAX
Capacitor Type
(708)-843-7500
(803)-448-9411
(207)-324-4140
(619)-661-6835
(708)-843-2798
(803)-448-1943
(207)-324-7223
(619)-661-1055
PL, PF series, through-hole aluminum electrolytic
TPS series, surface-mount tantalum
593D, 594D, 595D series, surface-mount tantalum
OS-CON series, through-hole aluminum electrolytic
Sanyo
Other Applications
PARALLELING DEVICES
Any number of MAX660s can be paralleled to reduce the output resistance. Each device must have its own pumping capacitor
C1, while only one output capacitor Cout is needed as shown in Figure 5. The composite output resistance is:
DS100898-7
FIGURE 5. Lowering Output Resistance by Paralleling Devices
CASCADING DEVICES
Cascading the is an easy way to produce a greater negative voltage (as shown in Figure 6). If n is the integer representing the
number of devices cascaded, the unloaded output voltage Vout is (−nVin). The effective output resistance is equal to the weighted
sum of each individual device:
7
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Other Applications (Continued)
A three-stage cascade circuit shown in Figure 7 generates −3Vin, from Vin.
Cascading is also possible when devices are operating in doubling mode. In Figure 8, two devices are cascaded to generate 3Vin.
An example of using the circuit in Figure 7 or Figure 8 is generating +15V or −15V from a +5V input.
Note that the number of n is practically limited since the increasing of n significantly reduces the efficiency and increases the out-
put resistance and output voltage ripple.
DS100898-8
FIGURE 6. Increasing Output Voltage by Cascading Devices
DS100898-9
FIGURE 7. Generating −3Vin from +Vin
DS100898-10
FIGURE 8. Generating +3Vin from +Vin
REGULATING Vout
It is possible to regulate the output of the MAX660 by use of a low dropout regulator (such as LP2951). The whole converter is
depicted in Figure 9. This converter can give a regulated output from −1.5V to −5.5V by choosing the proper resistor ratio:
=
where Vref 1.235V.
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Other Applications (Continued)
The error flag on pin 5 of the LP2951 goes low when the regulated output at pin 4 drops by about 5%. The LP2951 can be shut-
down by taking pin 3 high.
DS100898-11
FIGURE 9. Combining MAX660 with LP2951 to Make a Negative Adjustable Regulator
Also, as shown in Figure 10 by operating MAX660 in voltage doubling mode and adding a linear regulator (such as LP2981) at
the output, we can get +5V output from an input as low as +3V.
DS100898-12
FIGURE 10. Generating +5V from +3V Input Voltage
9
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Other Applications (Continued)
OTHER SWITCHED-CAPACITOR CONVERTERS
Please refer to Table 3, which shows National’s Switched-Capacitor Converter products.
TABLE 3. Switched-Capacitor Converters
LM2664
SOT23-6
0.22
LM2665
SOT23-6
0.22
LM3350
Mini SO-8
3.75
LM3351
Mini SO-8
1.1
MAX660
Package
SO-8
Supply Current (typ., mA)
0.12 at 10kHz,
1.0 at 80kHz
Output Ω (typ.)
Oscillator (kHz)
Input (V)
12
80
12
80
4.2
800
4.2
200
6.5
10, 80
1.8 to 5.5
Invert
1.8 to 5.5
Double
2.5 to 6.25
3/2, 2/3
2.5 to 6.25
3/2, 2/3
1.8 to 5.5
Invert, Double
Output Mode(s)
LM2660
LM2661
LM2662
LM2663
SO-8
1.3
Package
Mini SO-8, SO-8 Mini SO-8, SO-8
SO-8
Supply Current (typ., mA)
0.12 at 10kHz,
1.0 at 80kHz
1.0
0.3 at 10kHz,
1.3 at 70kHz
Output Ω (typ.)
Oscillator (kHz)
Input (V)
6.5
6.5
80
3.5
3.5
70
10, 80
10, 70
1.8 to 5.5
Invert, Double
1.8 to 5.5
Invert, Double
1.8 to 5.5
Invert, Double
1.8 to 5.5
Invert, Double
Output Mode(s)
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10
Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead SO (M)
Order Number MAX660M
NS Package Number M08A
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