MM54HC147 [NSC]
10-to-4 Line Priority Encoder; 10至4线优先编码器
| 型号： | MM54HC147 |
| 厂家： | 
National Semiconductor |
| 描述： | 10-to-4 Line Priority Encoder |
| 文件： | 总4页 (文件大小：111K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 1995
MM54HC147/MM74HC147
10-to-4 Line Priority Encoder
General Description
This high speed 10-to-4 Line Priority Encoder utilizes ad-
vanced silicon-gate CMOS technology. It possesses the
high noise immunity and low power consumption of stan-
dard CMOS integrated circuits. This device is fully buffered,
giving it a fanout of 10 LS-TTL loads.
The 54HC/74HC logic family is functionally as well as pin-
out compatible with the standard 54LS/74LS logic family.
All inputs are protected from damage due to static dis-
charge by internal diode clamps to V
and ground.
CC
Features
Y
The MM54HC147/MM74HC147 features priority encoding
of the inputs to ensure that only the highest order data line
is encoded. Nine input lines are encoded to a four line BCD
output. The implied decimal zero condition requires no input
condition as zero is encoded when all nine data lines are at
a high logic level. All data inputs and outputs are active at
the low logic level.
Low quiescent power consumption: 40 mW maximum at
25 C
§
Y
Y
Y
High speed: 31 ns propagation delay (typical)
Low input current: 1 mA maximum
Wide supply range: 2V to 6V
Connection and Logic Diagrams
Dual-In-Line Package
TL/F/5007–1
Top View
Order Number MM54HC147 or MM74HC147
Truth Table
Inputs
Outputs
1
2
3
4
5
6
7
8
9
D
C
B
A
H
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
L
H
X
X
X
X
X
L
H
X
X
X
X
L
H
X
X
X
L
H
X
X
L
H
X
L
H
L
H
L
H
H
H
L
H
H
H
L
H
L
H
H
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
L
H
H
L
TL/F/5007–2
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
L
H
L
H
H
e
e
e
H
High Logic Level, L
Low Logic Level, X
Irrelevant
C
1995 National Semiconductor Corporation
TL/F/5007
RRD-B30M115/Printed in U. S. A.
Absolute Maximum Ratings (Notes 1 & 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Conditions
Min
Max
6
Units
V
Supply Voltage (V
)
CC
2
DC Input or Output Voltage
(V , V
0
V
CC
V
b
a
0.5 to 7.0V
Supply Voltage (V
)
CC
)
IN OUT
b
b
a
a
DC Input Voltage (V
)
1.5 to V
1.5V
0.5V
Operating Temp. Range (T )
A
MM74HC
MM54HC
IN
CC
CC
b
b
a
85
40
55
C
C
§
DC Output Voltage (V
)
0.5 to V
OUT
a
125
§
g
g
g
Clamp Diode Current (I , I
)
20 mA
25 mA
50 mA
IK OK
Input Rise or Fall Times
DC Output Current, per pin (I
)
OUT
e
e
e
(t , t )
r f
V
V
V
2.0V
4.5V
6.0V
1000
500
400
ns
ns
ns
CC
CC
CC
DC V or GND Current, per pin (I
CC
)
CC
b
a
65 C to 150 C
Storage Temperature Range (T
)
§
§
STG
Power Dissipation (P )
D
(Note 3)
600 mW
500 mW
S.O. Package only
Lead Temp. (T ) (Soldering 10 seconds)
L
260 C
§
DC Electrical Characteristics (Note 4)
74HC
eb
54HC
e
T
A
25 C
§
eb
A
T
A
40 to 85 C
§
T
55 to 125 C
§
Symbol
Parameter
Conditions
V
CC
Units
Typ
Guaranteed Limits
V
V
V
Minimum High Level
Input Voltage
2.0V
4.5V
6.0V
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
V
V
IH
Maximum Low Level
2.0V
4.5V
6.0V
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
V
V
V
IL
Input Voltage**
e
V or V
IH IL
Minimum High Level
Output Voltage
V
I
OH
IN
s
20 mA
2.0V
4.5V
6.0V
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
V
V
l
OUT
l
e
V
I
V
or V
IH IL
IN
s
s
4.0 mA
5.2 mA
4.5V
6.0V
4.7
5.2
3.98
5.48
3.84
5.34
3.7
5.2
V
V
l
l
OUT
OUT
l
l
I
e
V or V
IH IL
V
OL
Maximum Low Level
Output Voltage
V
IN
s
I
20 mA
2.0V
4.5V
6.0V
0
0
0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
V
l
OUT
l
e
V
I
V
or V
IH IL
IN
s
s
4.0 mA
5.2 mA
4.5V
6.0V
0.2
0.2
0.26
0.26
0.33
0.33
0.4
0.4
V
V
l
l
OUT
OUT
l
l
I
e
g
g
g
1.0
I
I
Maximum Input
Current
V
V
or GND 6.0V
0.1
1.0
mA
IN
IN
CC
e
Maximum Quiescent
Supply Current
V
IN
V
CC
or GND 6.0V
8.0
80
160
mA
CC
e
I
0 mA
OUT
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
b
b
Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: 12 mW/ C from 65 C to 85 C; ceramic ‘‘J’’ package: 12 mW/ C from 100 C to 125 C.
§
§
§
§
Note 4: For a power supply of 5V 10% the worst case output voltages (V , and V ) occur for HC at 4.5V. Thus the 4.5V values should be used when designing
§
§
g
OH OL
5.5V and 4.5V respectively. (The V value at 5.5V is 3.85V.) The worst case leakage current (I , I , and
IH IN CC
e
with this supply. Worst case V and V occur at V
IH IL
CC
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
I
OZ
**V limits are currently tested at 20% of V . The above V specification (30% of V ) will be implemented no later than Q1, CY’89.
IL CC IL CC
2
e
e
e
e
t
f
e
6 ns
AC Electrical Characteristics V
5V, T
25 C, C
§
15 pF, t
CC
A
L
r
Guaranteed
Limit
Symbol
Parameter
Conditions
Typ
Units
t , t
PHL PLH
Maximum Propagation
Delay
31
38
ns
e
e
e
e
AC Electrical Characteristics V
2.0V to 6.0V, C
50 pF, t
t
f
6 ns (unless otherwise specified)
CC
L
r
74HC
54HC
e
T
25 C
§
A
eb
eb
A
T
A
40 to 85 C
§
T
55 to 125 C
§
Symbol
Parameter
Conditions
V
Units
CC
Typ
Guaranteed Limits
t , t
PHL PLH
Maximum Propagation
Delay
2.0V
4.5V
6.0V
181
36
220
44
275
55
319
64
ns
ns
ns
31
37
47
54
t , t
TLH THL
Maximum Output Rise
and Fall Time
2.0V
4.5V
6.0V
30
8
75
15
13
95
19
16
110
22
ns
ns
ns
7
19
C
C
Power Dissipation
(per package)
180
pF
PD
Capacitance (Note 5)
Maximum Input
Capacitance
5
10
10
10
pF
IN
2
e
a
e
a
V f I
PD CC CC
Note 5: C determines the no load dynamic power consumption, P
PD
C
V
PD CC
f
I V
CC CC
, and the no load dynamic current consumption, I
C
.
D
S
3
Physical Dimensions inches (millimeters)
Order Number MM54HC147J or MM74HC147J
NS Package J16A
Order Number MM74HC147N
NS Package N16E
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