MM54HC533J-MIL [NSC]

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MM54HC533J-MIL
型号: MM54HC533J-MIL
厂家: National Semiconductor    National Semiconductor
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锁存器
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January 1988  
MM54HC533/MM74HC533  
TRI-STATE Octal D-Type Latch  
with Inverted Outputs  
É
General Description  
These high speed OCTAL D-TYPE LATCHES utilize ad-  
vanced silicon-gate CMOS technology. They possess the  
high noise immunity and low power consumption of stan-  
dard CMOS integrated circuits, as well as the ability to drive  
15 LS-TTL loads. Due to the large output drive capability  
and the TRI-STATE feature, these devices are ideally suited  
for interfacing with bus lines in a bus organized system.  
The 54HC/74HC logic family is speed, function, and pin-out  
compatible with the standard 54LS/74LS logic family. All  
inputs are protected from damage due to static discharge by  
internal diode clamps to V  
and ground.  
CC  
Features  
Y
Typical propagation delay: 18 ns  
When the LATCH ENABLE input is high, the data present  
on the D inputs will appear inverted at the Q outputs. When  
the LATCH ENABLE goes low, the inverted data will be re-  
tained at the Q outputs until LATCH ENABLE returns high  
again. When a high logic level is applied to the OUTPUT  
CONTROL input, all outputs go to a high impedance state,  
regardless of what signals are present at the other inputs  
and the state of the storage elements.  
Y
Y
Y
Y
Y
Wide operating voltage range: 2 to 6 volts  
Low input current: 1 mA maximum  
Low quiescent current: 80 mA, maximum (74HC Series)  
Compatible with bus-oriented systems  
Output drive capability: 15 LS-TTL loads  
Connection Diagram  
Dual-In-Line Package  
TL/F/5339–1  
Top View  
Order Number MM54HC533 or MM74HC533  
Truth Table  
Latch  
Enable  
G
Output  
Control  
e
e
e
low level  
H
high level, L  
Data  
Output  
Q
0
level of output before steady-state input conditions  
were established.  
L
L
L
H
H
L
H
L
X
X
L
H
e
Z
high impedance  
Q
0
Z
H
X
TRI-STATEÉ is a registered trademark of National Semiconductor Corp.  
C
1995 National Semiconductor Corporation  
TL/F/5339  
RRD-B30M105/Printed in U. S. A.  
Absolute Maximum Ratings (Notes 1 & 2)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales  
Office/Distributors for availability and specifications.  
Operating Conditions  
Min  
Max  
6
Units  
V
Supply Voltage (V  
)
CC  
2
DC Input or Output Voltage  
(V , V  
0
V
CC  
V
b
a
0.5 to 7.0V  
Supply Voltage (V  
)
CC  
)
IN OUT  
b
b
a
a
DC Input Voltage (V  
)
1.5 to V  
1.5V  
0.5V  
Operating Temp. Range (T )  
A
MM74HC  
MM54HC  
IN  
CC  
CC  
b
b
a
85  
40  
55  
C
C
§
DC Output Voltage (V  
)
0.5 to V  
OUT  
a
125  
§
g
g
g
Clamp Diode Current (I , I  
)
20 mA  
35 mA  
70 mA  
IK OK  
Input Rise or Fall Times  
DC Output Current, per pin (I  
)
OUT  
e
e
e
(t , t )  
r f  
V
V
V
2.0V  
4.5V  
6.0V  
1000  
500  
400  
ns  
ns  
ns  
CC  
CC  
CC  
DC V or GND Current, per pin (I  
CC  
)
CC  
b
a
65 C to 150 C  
Storage Temperature Range (T  
)
§
§
STG  
Power Dissipation (P )  
D
(Note 3)  
600 mW  
500 mW  
S.O. Package only  
Lead Temp. (T ) (Soldering 10 seconds)  
L
260 C  
§
DC Electrical Characteristics  
74HC  
eb  
54HC  
e
T
25 C  
§
A
eb  
A
T
40 to 85 C  
§
T
55 to 125 C  
§
Symbol  
Parameter  
Conditions  
V
Units  
A
CC  
Typ  
Guaranteed Limits  
V
V
V
Minimum High Level  
Input Voltage  
2.0V  
4.5V  
6.0V  
1.5  
3.15  
4.2  
1.5  
3.15  
4.2  
1.5  
3.15  
4.2  
V
V
V
IH  
Maximum Low Level  
2.0V  
4.5V  
6.0V  
0.5  
1.35  
1.8  
0.5  
1.35  
1.8  
0.5  
1.35  
1.8  
V
V
V
IL  
Input Voltage**  
e
V or V  
IH IL  
Minimum High Level  
Output Voltage  
V
I
OH  
IN  
s
20 mA  
2.0V 2.0  
4.5V 4.5  
6.0V 6.0  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
V
V
V
l
OUT  
l
e
V
I
V
or V  
IH IL  
IN  
s
s
6.0 mA  
7.8 mA  
4.5V 4.2 3.98  
6.0V 5.7 5.48  
3.84  
5.34  
3.7  
5.2  
V
V
l
l
OUT  
OUT  
l
l
I
e
V or V  
IH IL  
V
OL  
Maximum Low Level  
Output Voltage  
V
IN  
s
I
20 mA  
2.0V  
4.5V  
6.0V  
0
0
0
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
V
V
V
l
OUT  
l
e
V
I
V
or V  
IH IL  
IN  
s
s
6.0 mA  
7.8 mA  
4.5V 0.2 0.26  
6.0V 0.2 0.26  
0.33  
0.33  
0.4  
0.4  
V
V
l
l
OUT  
OUT  
l
l
I
e
g
g
g
1.0  
I
I
Maximum Input  
Current  
V
V
or GND  
CC  
6.0V  
0.1  
1.0  
mA  
IN  
IN  
e
e
g
g
g
10  
Maximum TRI-STATE  
Output Leakage  
Current  
V
V
V
IH  
or V , OC  
IL  
V
IH  
6.0V  
0.5  
5
mA  
OZ  
IN  
e
V
CC  
or GND  
OUT  
e
I
Maximum Quiescent  
Supply Current  
V
V
or GND  
6.0V  
8.0  
80  
160  
mA  
CC  
IN  
CC  
e
I
0 mA  
OUT  
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.  
Note 2: Unless otherwise specified all voltages are referenced to ground.  
b
b
Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: 12 mW/ C from 65 C to 85 C; ceramic ‘‘J’’ package: 12 mW/ C from 100 C to 125 C.  
§
§
§
§
Note 4: For a power supply of 5V 10% the worst case output voltages (V , and V ) occur for HC at 4.5V. Thus the 4.5V values should be used when designing  
§
§
g
OH OL  
5.5V and 4.5V respectively. (The V value at 5.5V is 3.85V.) The worst case leakage current (I , I , and  
IH IN CC  
e
with this supply. Worst case V and V occur at V  
IH IL  
CC  
) occur for CMOS at the higher voltage and so the 6.0V values should be used.  
I
OZ  
**V limits are currently tested at 20% of V . The above V specification (30% of V ) will be implemented no later than Q1, CY’89.  
IL CC IL CC  
2
e
e
e e  
25 C, t t 6 ns  
r f  
AC Electrical Characteristics V  
Symbol  
5V, T  
§
CC  
A
Parameter  
Conditions  
Typ  
18  
Guaranteed Limit  
Units  
ns  
e
e
t
t
t
, t  
PHL PLH  
Maximum Propagation Delay, Data to Q  
Maximum Propagation Delay, Enable to Q  
Maximum Output Enable Time  
C
C
45 pF  
45 pF  
25  
30  
28  
L
, t  
PHL PLH  
21  
ns  
L
e
e
, t  
PZH PZL  
R
1 kX  
45 pF  
20  
ns  
L
L
C
e
e
t , t  
PHZ PLZ  
Maximum Output Disable Time  
R
C
1 kX  
5 pF  
18  
25  
ns  
L
L
t
t
t
Minimum Set Up Time  
Minimum Hold Time  
Minimum Pulse Width  
5
ns  
ns  
ns  
S
10  
16  
H
W
e
e
e
e
AC Electrical Characteristics V  
2.0V6.0V, C  
50 pF, t  
t
6 ns (unless otherwise specified)  
74HC 54HC  
CC  
L
r
f
e
T
25 C  
§
A
eb  
eb  
T
A
40 to 85 C  
T
55 to 125 C  
§
Guaranteed Limits  
§
Symbol  
Parameter  
Conditions  
V
Units  
A
CC  
Typ  
e
e
t
t
t
, t  
PHL PLH  
Maximum Propagation  
Delay, Data to Q  
C
C
50 pF 2.0V  
150 pF 2.0V  
50  
80  
150  
200  
188  
250  
225  
300  
ns  
ns  
L
L
e
e
C
L
C
L
50 pF 4.5V  
150 pF 4.5V  
22  
30  
30  
40  
37  
50  
45  
60  
ns  
ns  
e
e
C
L
C
L
50 pF 6.0V  
150 pF 6.0V  
19  
26  
26  
35  
31  
44  
39  
53  
ns  
ns  
e
e
, t  
PHL PLH  
Maximum Propagation  
Delay, Enable to Q  
C
L
C
L
50 pF  
2.0V  
63  
150 pF 2.0V 110  
175  
225  
220  
280  
263  
338  
ns  
ns  
e
e
C
L
C
L
50 pF 4.5V  
150 pF 4.5V  
25  
35  
35  
45  
44  
56  
52  
68  
ns  
ns  
e
e
C
L
C
L
50 pF 6.0V  
150 pF 6.0V  
21  
28  
30  
39  
37  
49  
45  
59  
ns  
ns  
e
, t  
PZH PZL  
Maximum Output Enable Time  
R
1 kX  
L
e
e
C
L
C
L
50 pF 2.0V  
150 pF 2.0V  
50  
80  
150  
200  
188  
250  
225  
300  
ns  
ns  
e
e
C
L
C
L
50 pF 4.5V  
150 pF 4.5V  
21  
30  
30  
40  
37  
50  
45  
60  
ns  
ns  
e
e
C
L
C
L
50 pF 6.0V  
150 pF 6.0V  
19  
26  
26  
35  
31  
44  
39  
53  
ns  
ns  
e
e
t
t
t
t
t
, t  
PHZ PLZ  
Maximum Output Disable Time  
Minimum Set Up Time  
Minimum Hold Time  
R
C
1 kX  
50 pF  
2.0V  
4.5V  
6.0V  
50  
21  
19  
150  
30  
26  
188  
37  
31  
225  
45  
39  
ns  
ns  
ns  
L
L
2.0V  
4.5V  
6.0V  
50  
9
9
60  
13  
11  
75  
15  
13  
ns  
ns  
ns  
S
2.0V  
4.5V  
6.0V  
5
5
5
5
5
5
5
5
5
ns  
ns  
ns  
H
W
Minimum Pulse Width  
2.0V  
4.5V  
6.0V  
30  
10  
9
80  
16  
14  
100  
20  
18  
120  
24  
20  
ns  
ns  
ns  
e
, t  
THL TLH  
Maximum Output Rise  
and Fall Time, Clock  
C
L
50 pF  
2.0V  
4.5V  
6.0V  
25  
7
6
60  
12  
10  
75  
15  
13  
90  
18  
15  
ns  
ns  
ns  
C
PD  
Power Dissipation Capacitance (per latch)  
e
(Note 5)  
OC  
V
CC  
OC Gnd  
30  
50  
pF  
pF  
e
C
C
Maximum Input Capacitance  
Maximum Output Capacitance  
5
10  
20  
10  
20  
10  
20  
pF  
pF  
IN  
15  
OUT  
2
e
a
e
a
f I  
PD CC CC  
Note 5: C determines the no load dynamic power consumption, P  
PD  
C
V
PD CC  
f
I
V
CC CC  
, and the no load dynamic current consumption, I  
C
V
.
D
S
3
Physical Dimensions inches (millimeters)  
Order Number MM54HC533J or MM74HC533J  
NS Package J20A  
Order Number MM74HC533N  
NS Package N20A  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and whose  
failure to perform, when properly used in accordance  
with instructions for use provided in the labeling, can  
be reasonably expected to result in a significant injury  
to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
National Semiconductor  
Corporation  
National Semiconductor  
Europe  
National Semiconductor  
Hong Kong Ltd.  
National Semiconductor  
Japan Ltd.  
a
1111 West Bardin Road  
Arlington, TX 76017  
Tel: 1(800) 272-9959  
Fax: 1(800) 737-7018  
Fax:  
(
49) 0-180-530 85 86  
@
13th Floor, Straight Block,  
Ocean Centre, 5 Canton Rd.  
Tsimshatsui, Kowloon  
Hong Kong  
Tel: (852) 2737-1600  
Fax: (852) 2736-9960  
Tel: 81-043-299-2309  
Fax: 81-043-299-2408  
Email: cnjwge tevm2.nsc.com  
a
a
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Deutsch Tel:  
English Tel:  
Fran3ais Tel:  
Italiano Tel:  
(
(
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(
49) 0-180-530 85 85  
49) 0-180-532 78 32  
49) 0-180-532 93 58  
49) 0-180-534 16 80  
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.  

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