MM70C98 [NSC]
TRI-STATE Hex Inverters, Buffers; 三态六反相器，缓冲器
| 型号： | MM70C98 |
| 厂家： | 
National Semiconductor |
| 描述： | TRI-STATE Hex Inverters, Buffers |
| 文件： | 总8页 (文件大小：161K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 1988
MM70C95/MM80C95, MM70C97/MM80C97
TRI-STATE Hex Buffers
É
MM70C96/MM80C96, MM70C98/MM80C98
TRI-STATE Hex Inverters
General Description
Features
Y
Wide supply voltage range
3.0V to 15V
1.0V
These gates are monolithic complementary MOS (CMOS)
integrated circuits constructed with N- and P-channel en-
hancement mode transistors. The MM70C95/MM80C95
and the MM70C97/MM80C97 convert CMOS or TTL out-
puts to TRI-STATE outputs with no logic inversion, the
MM70C96/MM80C96 and the MM70C98/MM80C98 pro-
vide the logical opposite of the input signal. The MM70C95/
MM80C95 and the MM70C96/MM80C96 have common
TRI-STATE controls for all six devices. The MM70C97/
MM80C97 and the MM70C98/MM80C98 have two TRI-
STATE controls; one for two devices and one for the other
four devices. Inputs are protected from damage due to stat-
Y
Guaranteed noise margin
Y
High noise immunity
0.45 V (typ.)
CC
Y
TTL compatible
Drive 1 TTL Load
Applications
Y
Bus drivers
Typical propagation delay
into 150 pF load is 40 ns
ic discharge by diode clamps to V
and GND.
CC
Connection Diagrams (Dual-In-Line Packages)
MM70C95/MM80C95
MM70C96/MM80C96
TL/F/5907–1
TL/F/5907–2
Top View
Top View
Order Number MM70C95 or MM80C95
Order Number MM70C96 or MM80C96
MM70C97/MM80C97
MM70C98/MM80C98
TL/F/5907–3
TL/F/5907–4
Top View
Top View
Order Number MM70C97 or MM80C97
Order Number MM70C98 or MM80C98
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
TL/F/5907
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
b
a
65 C to 150 C
Storage Temperature Range
§
§
Power Dissipation (P )
D
Dual-In-Line
Small Outline
700 mW
500 mW
b
a
0.3V
Voltage at Any Pin
0.3V to V
CC
Operating Temperature Range
MM70CXX
MM80CXX
Power Supply Voltage (V
)
CC
18V
b
b
a
a
55 C to 125 C
§
§
40 C to 85 C
Lead Temperature
(Soldering, 10 seconds)
§
§
260 C
§
DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
e
e
V
V
V
V
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘1’’ Output Voltage
Logical ‘‘0’’ Output Voltage
V
V
5V
3.5
8.0
V
V
IN(1)
CC
10V
CC
e
e
V
V
5V
1.5
2.0
V
V
IN(0)
CC
10V
CC
e
e
V
V
5V
4.5
9.0
V
V
OUT(1)
OUT(0)
CC
10V
CC
e
e
V
V
5V
0.5
1.0
V
V
CC
10V
CC
e
I
I
I
Logical ‘‘1’’ Input Current
Logical ‘‘0’’ Input Current
V
15V
0.005
1.0
mA
mA
IN(1)
IN(0)
OZ
CC
b
b
1.0
1.0
0.005
e
e
e
e
Output Current in High
Impedance State
V
V
15V, V
15V, V
15V
0V
0.005
1.0
15
mA
mA
CC
O
b
b
0.005
CC
O
e
I
Supply Current
V
CC
15V
0.01
mA
CC
TTL INTERFACE
e
e
b
b
V
V
V
V
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘1’’ Output Voltage
Logical ‘‘0’’ Output Voltage
70C
80C
V
V
4.5V
V
V
1.5
1.5
V
V
IN(1)
CC
CC
4.75V
CC
CC
e
e
70C
80C
V
V
4.5V
0.8
0.8
V
V
IN(0)
CC
4.75V
CC
e
e
e b
4.5V, I
O
70C
80C
V
V
1.6 mA
2.4
2.4
V
V
OUT(1)
OUT(0)
CC
e b
1.6 mA
e
1.6 mA
4.75V, I
CC
O
e
e
70C
80C
V
V
4.5V, I
0.4
0.4
V
V
CC
O
e
4.75V, I
1.6 mA
CC
O
OUTPUT DRIVE (Short Circuit Current)
e
e
e
I
I
I
I
Output Source Current
Output Source Current
Output Sink Current
Output Sink Current
V
T
5V, V
5V
0V
SOURCE
SOURCE
SINK
CC
IN(1)
b
4.35
mA
mA
mA
mA
e
25 C, V
§
A
OUT
e
e
10V
V
CC
10V, V
IN(1)
b
20
4.35
20
e
e
T
25 C, V
§
0V
A
OUT
e
e
e
V
T
5V, V
IN(0)
0V
V
CC
e
25 C, V
§
A
OUT
CC
e
e
0V
V
CC
10V, V
IN(0)
SINK
e
e
V
T
25 C, V
§
A
OUT
CC
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the device should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: C determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application note
PD
AN-90.
2
e
e
50 pF, unless otherwise noted.
AC Electrical Characteristics* T
25 C, C
§
A
L
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
t
t
, t
pd0 pd1
Propagation Delay Time to a Logical ‘‘0’’ or
Logical ‘‘1’’ from Data Input to Output
MM70C95/MM80C95, MM70C97/MM80C97
e
e
e
e
V
V
V
V
5V
10V
5V
60
25
70
35
100
40
150
75
ns
ns
ns
ns
CC
CC
CC
CC
MM70C96/MM80C96, MM70C98/MM80C98
10V
, t
pd0 pd1
Propagation Delay Time to a Logical ‘‘0’’ or
Logical ‘‘1’’ from Data Input to Output
MM70C95/MM80C95, MM70C97/MM80C97
e
e
e
e
e
150 pF
V
CC
V
CC
V
CC
V
CC
5V, C
85
40
95
45
160
80
210
110
ns
ns
ns
ns
L
10V, C
5V, C
e
150 pF
150 pF
L
e
MM70C96/MM80C96, MM70C98/MM80C98
L
10V, C
e
150 pF
e
5 pF
L
, t
1H 0H
Delay from Disable Input to High Impedance
State, (from Logical ‘‘1’’ or Logical ‘‘0’’)
MM70C95/MM80C95
e
R
10k, C
L
L
e
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
5V
10V
5V
10V
5V
10V
5V
80
50
100
70
70
50
90
70
135
90
180
125
125
90
ns
ns
ns
ns
ns
ns
ns
ns
e
e
e
e
e
e
e
MM70C96/MM80C96
MM70C97/MM80C97
MM70C98/MM80C98
170
125
10V
t , t
H1 H0
Delay from Disable Input to Logical ‘‘1’’ Level
(from High Impedance State)
MM70C95/MM80C95
e
e
50 pF
R
10k, C
L
L
e
V
V
V
V
V
V
V
V
5V
10V
5V
10V
5V
10V
5V
120
50
130
60
95
40
120
50
200
90
225
110
175
80
ns
ns
ns
ns
ns
ns
ns
ns
CC
CC
CC
CC
CC
CC
CC
CC
e
e
e
e
e
e
e
MM70C96/MM80C96
MM70C97/MM80C97
MM70C98/MM80C98
200
90
10V
C
C
C
Input Capacitance
Any Input (Note 2)
Any Output (Note 2)
(Note 3)
5.0
11
60
pF
pF
pF
IN
Output Capacitance TRI-STATE
Power Dissipation Capacitance
OUT
PD
*AC Parameters are guaranteed by DC correlated testing.
Truth Tables
MM70C95/MM80C95
MM70C96/MM80C96
Disable
Input
Disable
Input
Input
Input
Output
Output
DIS
DIS
DIS
DIS
2
1
2
1
0
0
0
1
1
0
0
1
0
1
0
1
X
X
X
0
0
0
0
1
1
0
0
1
0
1
0
1
1
1
0
H-z
H-z
H-z
X
X
X
H-z
H-z
H-z
MM70C97/MM80C97
MM70C98/MM80C98
Disable
Input
Input
Disable
Input
Input
Output
Output
DIS
DIS
DIS
DIS
2
4
2
4
0
0
X
1
0
0
1
X
0
1
X
X
0
1
0
0
X
1
0
0
1
X
0
1
X
X
1
0
H-z*
H-z**
H-z*
H-z**
*Output 5–6 only
**Output 1–4 only
e
X
Irrelevant
3
AC Test Circuits and Switching Time Waveforms
t , t
pd0 pd1
CMOS to CMOS
TL/F/5907–13
TL/F/5907–14
t
and t
H1
t
t
H1
1H
1H
TL/F/5907–15
TL/F/5907–16
TL/F/5907–17
t
and t
H0
t
t
H0
0H
0H
TL/F/5907–20
TL/F/5907–19
TL/F/5907–18
s
Note: Delays measured with input t , t
r
20 ns.
f
4
Typical Performance Characteristics
Propagation Delay vs
Load Capacitance
Dt /pF vs
pd
TL/F/5907–6
TL/F/5907–5
N-Channel Output Drive at 25 C
§
P-Channel Output Drive at 25 C
§
TL/F/5907–7
TL/F/5907–8
Schematic Diagrams
MM70C95/MM80C95 TRI-STATE
TL/F/5907–9
MM70C96/MM80C96 TRI-STATE
TL/F/5907–10
5
Schematic Diagrams (Continued)
MM70C97/MM80C97 TRI-STATE
TL/F/5907–11
MM70C98/MM80C98 TRI-STATE
TL/F/5907–12
6
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM70C95J, MM70C96J, MM70C97J, MM70C98J,
MM80C95J, MM80C96J, MM80C97J or MM80C98J
NS Package Number J16A
7
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number MM70C95N, MM70C96N, MM70C97N, MM70C98N,
MM80C95N, MM80C96N, MM80C97N or MM80C98N
NS Package Number N16E
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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