MM74HCT158M [NSC]
暂无描述;型号: | MM74HCT158M |
厂家: | National Semiconductor |
描述: | 暂无描述 复用器 |
文件: | 总6页 (文件大小:131K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
February 1988
MM54HCT157/MM74HCT157 Quad
2-Input Multiplexer
MM54HCT158/MM74HCT158
Quad 2-Input Multiplexer (Inverted Output)
General Description
These high speed QUAD 2-to-1 line data selector/multiplex-
ers utilize advanced silicon-gate CMOS technology. They
possess the high noise immunity and low power consump-
tion of standard CMOS integrated circuits, as well as the
ability to drive 10 LS-TTL loads.
The 54HCT/74HCT logic family is functionally as well as
pin-out compatible with the standard 54LS/74LS logic fami-
ly. All inputs are protected from damage due to static dis-
charge by internal diode clamps to V
and ground.
CC
Features
Y
These devices each consist of four 2-input digital multiplex-
ers with common select and OUTPUT ENABLE inputs. On
the MM54HCT157/MM74HCT157, when the OUTPUT EN-
ABLE input is at logical ‘‘0’’ the four outputs assume the
values as selected from the inputs. When the OUTPUT EN-
ABLE input is at a logical ‘‘1’’ the outputs assume logical
‘‘0’’. The MM54HCT158/MM74HCT158 operates in the
same manner, except that its outputs are inverted. Select
decoding is done internally resulting in a single select input
only. If enabled, the select input determines whether the A
or B inputs get routed to their corresponding Y outputs.
Typical propagation delay: 14 ns data to any output
Y
Y
g
Power supply range: 5V 10%
Low power supply quiescent current: 80 mA maximum
(74HCT Series)
Y
Y
Y
Low input current: 1 mA maximum
Completely TTL compatible
High output drive current: 60 mA minimum
Connection Diagrams
Dual-In-Line Package
Dual-In-Line Package
TL/F/5741–2
TL/F/5741–1
Top View
Top View
Order Number MM54HCT157/158 or MM74HCT157/158
Function Table
Inputs
Select
Output Y
Strobe
A
B
HCT157
HCT158
H
L
L
L
L
X
L
L
H
H
X
L
H
X
X
X
X
X
L
L
L
H
L
H
H
L
H
L
H
H
e
e
e
H
High Level, L
Low Level, X
Irrelevant
C
1995 National Semiconductor Corporation
TL/F/5741
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Notes 1 & 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Conditions
Min
Max
5.5
Units
V
Supply Voltage (V
)
CC
4.5
DC Input or Output Voltage
(V , V
0
V
CC
V
b
a
0.5 to 7.0V
Supply Voltage (V
)
CC
)
IN OUT
b
b
a
a
DC Input Voltage (V
)
1.5 to V
1.5V
0.5V
Operating Temp. Range (T )
A
MM74HCT
MM54HCT
IN
CC
CC
b
b
a
85
40
55
C
C
§
DC Output Voltage (V
)
0.5 to V
OUT
a
125
§
g
g
g
Clamp Diode Current (I , I
)
20 mA
25 mA
50 mA
IK OK
Input Rise or Fall Times
(t , t )
DC Output Current, per pin (I
)
OUT
500
ns
r
f
DC V or GND Current, per pin (I
CC
)
CC
b
a
65 C to 150 C
Storage Temperature Range (T
)
§
§
STG
Power Dissipation (P )
D
(Note 3)
600 mW
500 mW
S.O. Package only
Lead Temperature (T )
L
(Soldering, 10 seconds)
260 C
§
DC Electrical Characteristics (Note 4)
74HCT
eb
54HCT
e
T
A
25 C
§
eb
T
A
40 to 85 C
§
T
A
55 to 125 C
§
Symbol
Parameter
Conditions
V
CC
Units
Typ
Guaranteed Limits
V
V
V
Minimum High Level
Input Voltage
IH
2.0
0.8
4.4
2.0
0.8
4.4
2.0
0.8
4.4
V
V
V
Maximum Low Level
Input Voltage
IL
e
V or V
IH IL
Minimum High Level
Output Voltage
V
I
OH
IN
s
20 mA
V or V
IH
4.5V
l
OUT
l
e
V
IN
IL
s
s
I
6.0 mA
7.2 mA
4.5V 4.2 3.98
5.5V 5.2 4.98
3.84
4.84
3.7
4.7
V
V
l
l
OUT
OUT
l
l
I
e
V or V
IH IL
V
OL
Maximum Low Level
Voltage
V
IN
e
e
e
I
20 mA
6.0 mA
7.2 mA
0
0.1
0.1
0.1
0.4
0.4
V
V
V
l
l
l
OUT
OUT
OUT
l
l
l
I
I
4.5V 0.2 0.26
5.5V 0.2 0.26
0.33
0.33
e
g
g
g
1.0
I
I
Maximum Input
Current
V
V
or GND
6.0V
0.1
1.0
mA
mA
mA
IN
IN
CC
e
Maximum Quiescent
Supply Current
V
IN
V
CC
or GND
8.0
80
160
1.5
CC
e
I
0 mA
OUT
e
V
IN
2.4V or 0.5V (Note 4)
1.2
1.4
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
b
b
Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: 12 mW/ C from 65 C to 85 C; ceramic ‘‘J’’ package: 12 mW/ C from 100 C to 125 C.
§
§
§
§
Note 4: For a power supply of 5V 10% the worst case output voltages (V , and V ) occur for HCT at 4.5V. Thus the 4.5V values should be used when
§
§
g
OH OL
5.5V and 4.5V respectively. (The V value at 5.5V is 3.85V.) The worst case leakage current (I ,
IH IN
e
designing with this supply. Worst case V and V occur at V
IH IL
CC
I
, and I ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
OZ
CC
2
e
e
e
e e
15 pF, t t 6 ns
r f
AC Electrical Characteristics V
5V, T
25 C, C
§
CC
A
L
Guaranteed
Limit
Symbol
Parameter
Conditions
Typ
Units
t
t
t
, t
PHL PLH
Maximum Propagation
Delay, Data to Output
14
20
20
18
ns
, t
PHL PLH
Maximum Propagation
14
12
ns
ns
Delay, Select to Output
, t
PHL PLH
Maximum Propagation
Delay, Strobe to Output
e
e
e
e
t 6 ns (unless otherwise specified)
f
g
5V 10%, C
AC Electrical Characteristics V
50 pF, t
CC
L
r
74HCT
eb
54HCT
e
T
25 C
§
A
eb
T
A
40 to 85 C
§
T
A
55 to 125 C
§
Symbol
Parameter
Conditions
Units
Typ
13
Guaranteed Limits
t
t
t
, t
PHL PLH
Maximum Propagation
Delay, Data to Output
22
27
28
34
33
41
ns
ns
, t
PHL PLH
Maximum Propagation
Delay, Select to Output
15
, t
PHL PLH
Maximum Propagation
Delay, OUTPUT ENABLE
to Output
14
8
25
15
10
31
19
10
38
22
10
ns
ns
pF
pF
t , t
TLH THL
Maximum Output Rise
and Fall Time
C
Maximum Input
Capacitance
IN
5
C
Power Dissipation
PD
Capacitance (Note 5)
48
2
e
a
e
a
V f I
PD CC CC
Note 5:
C
determines the no load dynamic power consumption, P
C V
PD CC
f
I
V
CC CC
, and the no load dynamic current consumption, I
C
.
PD
D
S
3
Logic Diagrams
’HCT157
TL/F/5741–3
’HCT158
TL/F/5741–4
4
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54HCT157J, MM54HCT158J, MM74HCT157J or MM74HCT158J
NS Package Number J16A
5
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number MM74HCT157N or MM74HCT158N
NS Package Number N16E
LIFE SUPPORT POLICY
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Corporation
National Semiconductor
Europe
National Semiconductor
Hong Kong Ltd.
National Semiconductor
Japan Ltd.
a
1111 West Bardin Road
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