MM82C19 [NSC]
16-Line to 1-Line Multiplexer, TRI-STATE16-Line to 1-Line; 16号线到1线复用器， TRI- STATE16线到1线
| 型号： | MM82C19 |
| 厂家： | 
National Semiconductor |
| 描述： | 16-Line to 1-Line Multiplexer, TRI-STATE16-Line to 1-Line |
| 文件： | 总8页 (文件大小：122K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 1988
MM54C150/MM74C150 16-Line to 1-Line Multiplexer
MM72C19/MM82C19 TRI-STATE 16-Line to 1-Line
Multiplexer
É
General Description
The MM54C150/MM74C150 and MM72C19/MM82C19
multiplex 16 digital lines to 1 output. A 4-bit address code
determines the particular 1-of-16 inputs which is routed to
the output. The data is inverted from input to output.
All inputs are protected from damage due to static dis-
and GND.
charge by diode clamps to V
CC
Features
Y
A
strobe override places the output of MM54C150/
Wide supply voltage range
Guaranteed noise margin
High noise immunity
3.0V to 15V
1.0V
MM74C150 in the logical ‘‘1’’ state and the output of
MM72C19/MM82C19 in the high-impedance state.
Y
Y
Y
0.45 V (typ.)
Drive 1 TTL Load
CC
TTL compatibility
Connection Diagram
Dual-In-Line Package
TL/F/5891–1
Order Number MM54C150, MM74C150, MM72C19 or MM82C19
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
TL/F/5891
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
b
a
65 C to 150 C
Storage Temperature Range
§
§
Power Dissipation
Dual-In-Line
Small Outline
700 mW
500 mW
b
a
0.3V
Voltage at Any Pin
0.3V to V
CC
Operating Temperature Range
MM54C150, MM72C19
MM74C150, MM82C19
Operating V Range
CC
3.0V to 15V
18V
b
b
a
a
55 C to 125 C
§
§
40 C to 85 C
V
CC
§
§
Lead Temperature (soldering, 10 seconds)
260 C
§
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS to CMOS
e
e
V
V
V
V
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘1’’ Output Voltage
Logical ‘‘0’’ Output Voltage
V
V
5.0V
10V
3.5
8.0
V
V
IN(1)
CC
CC
e
e
V
V
5.0V
10V
1.5
2.0
V
V
IN(0)
CC
CC
e
e
e b
V
V
5.0V, I
10 mA
4.5
9.0
V
V
OUT(1)
OUT(0)
CC
O
e b
10V, I
10 mA
CC
O
e
e
e a
V
V
5.0V, I
10 mA
0.5
1.0
V
V
CC
O
e a
10V, I
10 mA
CC
O
e
e
e
e
I
I
I
Logical ‘‘1’’ Input Current
Logical ‘‘0’’ Input Current
V
V
15V, V
15V
0.005
1.0
V
IN(1)
IN(0)
OZ
CC
CC
IN
IN
b
b
15V, V
0V
1.0
1.0
0.005
mA
Output Current in High
Impedance State
e
e
e
e
MM72C19/MM82C19
V
V
15V, V
15V, V
15V
0V
0.005
1.0
mA
mA
CC
O
b
b
0.005
CC
O
e
I
Supply Current
V
CC
15V
0.05
300
mA
CC
CMOS/LPTTL Interface
e
e
b
b
V
V
V
V
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘1’’ Output Voltage
Logical ‘‘0’’ Output Voltage
54C, 72C, V
74C, 82C, V
4.5V
V
V
1.5
1.5
V
V
IN(1)
CC
CC
4.75V
CC
CC
e
e
54C, 72C, V
74C, 82C, V
4.5V
0.8
0.8
V
V
IN(0)
CC
4.75V
CC
e
e
e b
4.5V, I
O
54C, 72C, V
74C, 82C, V
1.6 mA
2.4
2.4
V
V
OUT(1)
OUT(0)
CC
e b
1.6 mA
e
1.6 mA
4.75V, I
CC
O
e
e
54C, 72C, V
74C, 82C, V
4.5V, I
0.4
0.4
V
V
CC
O
e
4.75V, I
1.6 mA
CC
O
Output Drive (Short Circuit Current)
e
e
e
e
e
e
I
I
I
I
Output Source Current
(P-Channel)
V
CC
V
CC
V
CC
V
CC
5.0V, V
10V, V
0V, T
0V, T
25 C
§
SOURCE
SOURCE
SINK
OUT
A
b
b
8
4.35
mA
mA
mA
mA
e
e
Output Source Current
(P-Channel)
25 C
§
OUT
A
b
b
40
20
4.35
20
e
e
Output Sink Current
(N-Channel)
5.0V, V
V , T
CC
25 C
§
OUT
OUT
A
8
e
e
A
Output Sink Current
(N-Channel)
10V, V
V , T
CC
25 C
§
SINK
40
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
2
e
e
50 pF, unless otherwise noted
AC Electrical Characteristics* T
25 C, C
§
A
L
Symbol
Parameter
Conditions
5.0V
Min
Typ
Max
Units
e
e
e
e
t
t
t
, t
pd0 pd1
Propagation Delay Time to a
Logical ‘‘0’’ or Logical ‘‘1’’
from Data Inputs to Output
V
250
110
290
120
600
300
650
330
ns
ns
ns
ns
CC
CC
CC
CC
V
V
V
10V
e
e
5.0V, C
150 pF
150 pF
L
10V, C
L
e
e
, t
pd0 pd1
Propagation Delay Time to a
Logical ‘‘0’’ or Logical ‘‘1’’
from Data Select Inputs to
Output
V
V
5.0V
10V
290
120
650
330
ns
ns
CC
CC
e
e
, t
pd0 pd1
Propagation Delay Time to a
Logical ‘‘0’’ or Logical ‘‘1’’
from Strobe to Output
V
V
5.0V
10V
120
55
300
150
ns
ns
CC
CC
MM54C150/MM74C150
e
e
e
e
e
5 pF
e
5 pF
t , t
1H 0H
Delay from Strobe to High
Impedance State
V
V
5.0V, R
10k, C
80
60
200
150
ns
ns
CC
L
L
10V, R
10k, C
CC
L
L
MM72C19/MM82C19
e
e
e
e
e
5 pF
e
5 pF
t , t
H1 H0
Delay from Strobe to Logical
‘‘1’’ Level or to Logical ‘‘0’’
Level (from High Impedance State)
MM72C19/MM82C19
V
V
5.0V, R
10k, C
80
30
250
120
ns
ns
CC
L
L
10V, R
10k, C
L
CC
L
C
C
Input Capacitance
Any Input (Note 2)
(Note 2)
5.0
pF
pF
IN
Output Capacitance
11.0
OUT
MM72C19/MM82C19
C
PD
Power Dissipation Capacitance
(Note 3)
100
pF
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: C determines the no load AC power consumption of any CMOS device. For complete explanation, see 54C/74C Family Characteristics, application note
PD
AN-90.
3
Truth Table
MM54C150/MM74C150
Inputs
Output
W
D
C
B
A
STROBE
E0
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
0
X
X
X
0
X
X
X
X
X
0
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1*
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
X
X
1
X
X
X
X
X
X
1
X
X
X
X
1
X
X
1
*For MM72C19/MM82C19 this would be Hi-Z, everything else is the same.
Switching Time Waveforms
CMOS to CMOS
TL/F/5891–2
4
Switching Time Waveforms (Continued)
t
and t
t
1H
1H
H1
TL/F/5891–3
TL/F/5891–4
t
H1
t
and t
H0
0H
TL/F/5891–6
TL/F/5891–5
t
0H
t
H0
TL/F/5891–7
s
f
Note: Delays measured with input t , t
r
20 ns.
TL/F/5891–8
5
Logic Diagrams
MM54C150/MM74C150
TL/F/5891–9
6
Logic Diagrams (Continued)
MM72C19/MM82C19
TL/F/5891–10
7
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54C150J or MM74C150J, MM72C19J or MM82C19J
NS Package Number J24A
Molded Dual-In-Line Package (N)
Order Number MM54C150N, MM74C150N, MM72C19N or MM82C19N
NS Package Number N24A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Corporation
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