SFTB [NSC]
Thin SOT23 1A Load Step-Down DC-DC Regulator; 薄型SOT23 1A负载降压型DC -DC稳压器
| 型号： | SFTB |
| 厂家： | 
National Semiconductor |
| 描述： | Thin SOT23 1A Load Step-Down DC-DC Regulator |
| 文件： | 总19页 (文件大小：772K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
March 2005
LM2734Z
Thin SOT23 1A Load Step-Down DC-DC Regulator
General Description
Features
n Thin SOT23-6 package, or 6 lead LLP package
n 3.0V to 20V input voltage range
n 0.8V to 18V output voltage range
n 1A output current
The LM2734Z regulator is a monolithic, high frequency,
PWM step-down DC/DC converter assembled in a 6-pin Thin
SOT23 and LLP non pull back package. It provides all the
active functions to provide local DC/DC conversion with fast
transient response and accurate regulation in the smallest
possible PCB area.
n 3MHz switching frequency
n 300mΩ NMOS switch
n 30nA shutdown current
n 0.8V, 2% internal voltage reference
n Internal soft-start
With a minimum of external components and online design
support through WEBENCH® , the LM2734Z is easy to
™
use. The ability to drive 1A loads with an internal 300mΩ
NMOS switch using state-of-the-art 0.5µm BiCMOS technol-
ogy results in the best power density available. The world
class control circuitry allows for on-times as low as 13ns,
thus supporting exceptionally high frequency conversion
over the entire 3V to 20V input operating range down to the
minimum output voltage of 0.8V. Switching frequency is
internally set to 3MHz, allowing the use of extremely small
surface mount inductors and chip capacitors. Even though
the operating frequency is very high, efficiencies up to 85%
are easy to achieve. External shutdown is included, featuring
an ultra-low stand-by current of 30nA. The LM2734Z utilizes
current-mode control and internal compensation to provide
high-performance regulation over a wide range of operating
conditions. Additional features include internal soft-start cir-
cuitry to reduce inrush current, pulse-by-pulse current limit,
thermal shutdown, and output over-voltage protection.
n Current-Mode, PWM operation
n Thermal shutdown
Applications
n DSL Modems
n Local Point of Load Regulation
n Battery Powered Devices
n USB Powered Devices
Typical Application Circuit
Efficiency vs Load Current
VIN = 5V, VOUT = 3.3V
20130301
20130345
™
WEBENCH is a trademark of Transim.
© 2005 National Semiconductor Corporation
DS201303
www.national.com
Connection Diagrams
20130305
20130360
6-Lead TSOT
NS Package Number MK06A
6-Lead LLP (3mm x 3mm)
NS Package Number SDE06A
Ordering Information
Order Number
LM2734ZMK
LM2734ZMKX
LM2734ZSD
Package Type
TSOT-6
NSC Package Drawing
MK06A
Package Marking
SFTB
Supplied As
1000 Units on Tape and Reel
3000 Units on Tape and Reel
1000 Units on Tape and Reel
4500 Units on Tape and Reel
TSOT-6
MK06A
SFTB
6-Lead LLP
SDE06A
L163B
LM2734ZSDX
6-Lead LLP
SDE06A
L163B
* Contact the local sales office for the lead-free package.
Pin Description
Pin
Name
Function
1
BOOST
Boost voltage that drives the internal NMOS control switch. A
bootstrap capacitor is connected between the BOOST and SW
pins.
2
GND
Signal and Power ground pin. Place the bottom resistor of the
feedback network as close as possible to this pin for accurate
regulation.
3
4
FB
EN
Feedback pin. Connect FB to the external resistor divider to set
output voltage.
Enable control input. Logic high enables operation. Do not allow
this pin to float or be greater than VIN + 0.3V.
Input supply voltage. Connect a bypass capacitor to this pin.
Output switch. Connects to the inductor, catch diode, and
bootstrap capacitor.
5
6
VIN
SW
DAP
GND
The Die Attach Pad is internally connected to GND
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2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Soldering Information
Infrared/Convection Reflow (15sec)
Wave Soldering Lead Temp. (10sec)
220˚C
260˚C
VIN
-0.5V to 24V
-0.5V to 24V
-0.5V to 30V
-0.5V to 6.0V
-0.5V to 3.0V
-0.5V to (VIN + 0.3V)
150˚C
Operating Ratings (Note 1)
VIN
SW Voltage
3V to 20V
-0.5V to 20V
Boost Voltage
SW Voltage
Boost to SW Voltage
FB Voltage
Boost Voltage
-0.5V to 25V
Boost to SW Voltage
Junction Temperature Range
Thermal Resistance θJA (Note 3)
TSOT23–6
1.6V to 5.5V
EN Voltage
−40˚C to +125˚C
Junction Temperature
ESD Susceptibility (Note 2)
Storage Temp. Range
2kV
118˚C/W
-65˚C to 150˚C
Electrical Characteristics
Specifications with standard typeface are for TJ = 25˚C, and those in boldface type apply over the full Operating Tempera-
ture Range (TJ = -40˚C to 125˚C). VIN = 5V, VBOOST - VSW = 5V unless otherwise specified. Datasheet min/max specification
limits are guaranteed by design, test, or statistical analysis.
Min
(Note 4)
0.784
Typ
(Note 5)
0.800
Max
(Note 4)
0.816
Symbol
VFB
Parameter
Feedback Voltage
Conditions
Units
V
Feedback Voltage Line
Regulation
VIN = 3V to 20V
∆VFB/∆VIN
IFB
0.01
% / V
nA
Feedback Input Bias Current
Undervoltage Lockout
Undervoltage Lockout
UVLO Hysteresis
Sink/Source
VIN Rising
VIN Falling
10
2.74
2.3
0.44
3.0
85
250
2.90
UVLO
2.0
0.30
2.2
78
V
0.62
3.6
FSW
DMAX
DMIN
Switching Frequency
Maximum Duty Cycle
Minimum Duty Cycle
MHz
%
8
%
VBOOST - VSW = 3V
(TSOT Package)
VBOOST - VSW = 3V
(LLP Package)
300
340
600
650
mΩ
mΩ
RDS(ON)
Switch ON Resistance
ICL
IQ
Switch Current Limit
Quiescent Current
VBOOST - VSW = 3V
Switching
1.2
1.8
1.7
1.5
2.5
2.5
A
mA
nA
mA
Quiescent Current (shutdown) VEN = 0V
30
IBOOST
VEN_TH
Boost Pin Current
(Switching)
VEN Falling
VEN Rising
Sink/Source
4.25
6
Shutdown Threshold Voltage
Enable Threshold Voltage
Enable Pin Current
0.4
V
IEN
10
40
nA
nA
ISW
Switch Leakage
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see Electrical Characteristics.
Note 2: Human body model, 1.5kΩ in series with 100pF.
Note 3: Thermal shutdown will occur if the junction temperature exceeds 165˚C. The maximum power dissipation is a function of T
, θ and T . The
JA A
J(MAX)
maximum allowable power dissipation at any ambient temperature is P = (T
– T )/θ . All numbers apply for packages soldered directly onto a 3” x 3” PC
A JA
D
J(MAX)
board with 2oz. copper on 4 layers in still air. For a 2 layer board using 1 oz. copper in still air, θ = 204˚C/W.
JA
Note 4: Guaranteed to National’s Average Outgoing Quality Level (AOQL).
Note 5: Typicals represent the most likely parametric norm.
3
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Typical Performance Characteristics All curves taken at VIN = 5V, VBOOST - VSW = 5V, L1 = 2.2 µH
and TA = 25˚C, unless specified otherwise.
Efficiency vs Load Current
VOUT = 5V
Efficiency vs Load Current
VOUT = 3.3V
20130336
20130337
20130354
20130351
Efficiency vs Load Current
VOUT = 1.5V
Oscillator Frequency vs Temperature
20130327
Line Regulation
VOUT = 1.5V, IOUT = 500mA
Line Regulation
VOUT = 3.3V, IOUT = 500mA
20130355
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4
Block Diagram
20130306
FIGURE 1.
forward voltage (VD) of the catch diode. The regulator loop
adjusts the duty cycle (D) to maintain a constant output
voltage.
Application Information
THEORY OF OPERATION
The LM2734Z is a constant frequency PWM buck regulator
IC that delivers a 1A load current. The regulator has a preset
switching frequency of 3MHz. This high frequency allows the
LM2734Z to operate with small surface mount capacitors
and inductors, resulting in a DC/DC converter that requires a
minimum amount of board space. The LM2734Z is internally
compensated, so it is simple to use, and requires few exter-
nal components. The LM2734Z uses current-mode control to
regulate the output voltage.
The following operating description of the LM2734Z will refer
to the Simplified Block Diagram (Figure 1) and to the wave-
forms in Figure 2. The LM2734Z supplies a regulated output
voltage by switching the internal NMOS control switch at
constant frequency and variable duty cycle. A switching
cycle begins at the falling edge of the reset pulse generated
by the internal oscillator. When this pulse goes low, the
output control logic turns on the internal NMOS control
switch. During this on-time, the SW pin voltage (VSW) swings
up to approximately VIN, and the inductor current (IL) in-
creases with a linear slope. IL is measured by the current-
sense amplifier, which generates an output proportional to
the switch current. The sense signal is summed with the
regulator’s corrective ramp and compared to the error am-
plifier’s output, which is proportional to the difference be-
tween the feedback voltage and VREF. When the PWM
comparator output goes high, the output switch turns off until
the next switching cycle begins. During the switch off-time,
inductor current discharges through Schottky diode D1,
which forces the SW pin to swing below ground by the
20130307
FIGURE 2. LM2734Z Waveforms of SW Pin Voltage and
Inductor Current
BOOST FUNCTION
Capacitor CBOOST and diode D2 in Figure 3 are used to
generate a voltage VBOOST. VBOOST - VSW is the gate drive
voltage to the internal NMOS control switch. To properly
drive the internal NMOS switch during its on-time, VBOOST
needs to be at least 1.6V greater than VSW. Although the
LM2734Z will operate with this minimum voltage, it may not
have sufficient gate drive to supply large values of output
5
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shown in Figure 4. When using a series zener diode from the
input, ensure that the regulation of the input supply doesn’t
create a voltage that falls outside the recommended VBOOST
voltage.
Application Information (Continued)
current. Therefore, it is recommended that VBOOST be
greater than 2.5V above VSW for best efficiency. VBOOST
–
VSW should not exceed the maximum operating limit of 5.5V.
<
>
(VINMAX – VD3
(VINMIN – VD3
)
5.5V
1.6V
>
>
5.5V VBOOST – VSW 2.5V for best performance.
)
20130308
20130309
FIGURE 3. VOUT Charges CBOOST
FIGURE 4. Zener Reduces Boost Voltage from VIN
When the LM2734Z starts up, internal circuitry from the
BOOST pin supplies a maximum of 20mA to CBOOST. This
current charges CBOOST to a voltage sufficient to turn the
switch on. The BOOST pin will continue to source current to
CBOOST until the voltage at the feedback pin is greater than
0.76V.
An alternative method is to place the zener diode D3 in a
shunt configuration as shown in Figure 5. A small 350mW to
500mW 5.1V zener in a SOT-23 or SOD package can be
used for this purpose. A small ceramic capacitor such as a
6.3V, 0.1µF capacitor (C4) should be placed in parallel with
the zener diode. When the internal NMOS switch turns on, a
pulse of current is drawn to charge the internal NMOS gate
capacitance. The 0.1 µF parallel shunt capacitor ensures
that the VBOOST voltage is maintained during this time.
There are various methods to derive VBOOST
1. From the input voltage (VIN
2. From the output voltage (VOUT
:
)
)
Resistor R3 should be chosen to provide enough RMS cur-
rent to the zener diode (D3) and to the BOOST pin. A
recommended choice for the zener current (IZENER) is 1 mA.
The current IBOOST into the BOOST pin supplies the gate
current of the NMOS control switch and varies typically
according to the following formula:
3. From an external distributed voltage rail (VEXT
)
4. From a shunt or series zener diode
In the Simplifed Block Diagram of Figure 1, capacitor
CBOOST and diode D2 supply the gate-drive current for the
NMOS switch. Capacitor CBOOST is charged via diode D2 by
VIN. During a normal switching cycle, when the internal
NMOS control switch is off (TOFF) (refer to Figure 2), VBOOST
equals VIN minus the forward voltage of D2 (VFD2), during
which the current in the inductor (L) forward biases the
Schottky diode D1 (VFD1). Therefore the voltage stored
across CBOOST is
IBOOST = (D + 0.5) x (VZENER – VD2) mA
where D is the duty cycle, VZENER and VD2 are in volts, and
IBOOST is in milliamps. VZENER is the voltage applied to the
anode of the boost diode (D2), and VD2 is the average
forward voltage across D2. Note that this formula for IBOOST
gives typical current. For the worst case IBOOST, increase the
current by 25%. In that case, the worst case boost current
will be
VBOOST - VSW = VIN - VFD2 + VFD1
When the NMOS switch turns on (TON), the switch pin rises
to
IBOOST-MAX = 1.25 x IBOOST
R3 will then be given by
VSW = VIN – (RDSON x IL),
forcing VBOOST to rise thus reverse biasing D2. The voltage
at VBOOST is then
R3 = (VIN - VZENER) / (1.25 x IBOOST + IZENER
)
For example, let VIN = 10V, VZENER = 5V, VD2 = 0.7V, IZENER
= 1mA, and duty cycle D = 50%. Then
VBOOST = 2VIN – (RDSON x IL) – VFD2 + VFD1
which is approximately
IBOOST = (0.5 + 0.5) x (5 - 0.7) mA = 4.3mA
2VIN - 0.4V
R3 = (10V - 5V) / (1.25 x 4.3mA + 1mA) = 787Ω
for many applications. Thus the gate-drive voltage of the
NMOS switch is approximately
VIN - 0.2V
An alternate method for charging CBOOST is to connect D2 to
the output as shown in Figure 3. The output voltage should
be between 2.5V and 5.5V, so that proper gate voltage will
be applied to the internal switch. In this circuit, CBOOST
provides a gate drive voltage that is slightly less than VOUT
.
In applications where both VIN and VOUT are greater than
5.5V, or less than 3V, CBOOST cannot be charged directly
from these voltages. If VIN and VOUT are greater than 5.5V,
CBOOST can be charged from VIN or VOUT minus a zener
voltage by placing a zener diode D3 in series with D2, as
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6
THERMAL SHUTDOWN
Application Information (Continued)
Thermal shutdown limits total power dissipation by turning
off the output switch when the IC junction temperature ex-
ceeds 165˚C. After thermal shutdown occurs, the output
switch doesn’t turn on until the junction temperature drops to
approximately 150˚C.
Design Guide
INDUCTOR SELECTION
The Duty Cycle (D) can be approximated quickly using the
ratio of output voltage (VO) to input voltage (VIN):
20130348
The catch diode (D1) forward voltage drop and the voltage
drop across the internal NMOS must be included to calculate
a more accurate duty cycle. Calculate D by using the follow-
ing formula:
FIGURE 5. Boost Voltage Supplied from the Shunt
Zener on VIN
ENABLE PIN / SHUTDOWN MODE
The LM2734Z has a shutdown mode that is controlled by the
enable pin (EN). When a logic low voltage is applied to EN,
the part is in shutdown mode and its quiescent current drops
to typically 30nA. Switch leakage adds another 40nA from
the input supply. The voltage at this pin should never exceed
VIN + 0.3V.
VSW can be approximated by:
VSW = IO x RDS(ON)
The diode forward drop (VD) can range from 0.3V to 0.7V
depending on the quality of the diode. The lower VD is, the
higher the operating efficiency of the converter.
SOFT-START
This function forces VOUT to increase at a controlled rate
during start up. During soft-start, the error amplifier’s refer-
ence voltage ramps from 0V to its nominal value of 0.8V in
approximately 200µs. This forces the regulator output to
ramp up in a more linear and controlled fashion, which helps
reduce inrush current.
The inductor value determines the output ripple current.
Lower inductor values decrease the size of the inductor, but
increase the output ripple current. An increase in the inductor
value will decrease the output ripple current. The ratio of
ripple current (∆iL) to output current (IO) is optimized when it
is set between 0.3 and 0.4 at 1A. The ratio r is defined as:
OUTPUT OVERVOLTAGE PROTECTION
The overvoltage comparator compares the FB pin voltage to
a voltage that is 10% higher than the internal reference Vref.
Once the FB pin voltage goes 10% above the internal refer-
ence, the internal NMOS control switch is turned off, which
allows the output voltage to decrease toward regulation.
One must also ensure that the minimum current limit (1.2A)
is not exceeded, so the peak current in the inductor must be
calculated. The peak current (ILPK) in the inductor is calcu-
lated by:
UNDERVOLTAGE LOCKOUT
Undervoltage lockout (UVLO) prevents the LM2734Z from
operating until the input voltage exceeds 2.74V(typ).
ILPK = IO + ∆IL/2
The UVLO threshold has approximately 440mV of hyster-
esis, so the part will operate until VIN drops below 2.3V(typ).
Hysteresis prevents the part from turning off during power up
if VIN is non-monotonic.
If r = 0.5 at an output of 1A, the peak current in the inductor
will be 1.25A. The minimum guaranteed current limit over all
operating conditions is 1.2A. One can either reduce r to 0.4
resulting in a 1.2A peak current, or make the engineering
judgement that 50mA over will be safe enough with a 1.7A
typical current limit and 6 sigma limits. When the designed
maximum output current is reduced, the ratio r can be in-
creased. At a current of 0.1A, r can be made as high as 0.9.
The ripple ratio can be increased at lighter loads because
the net ripple is actually quite low, and if r remains constant
the inductor value can be made quite large. An equation
empirically developed for the maximum ripple ratio at any
current below 2A is:
CURRENT LIMIT
The LM2734Z uses cycle-by-cycle current limiting to protect
the output switch. During each switching cycle, a current limit
comparator detects if the output switch current exceeds 1.7A
(typ), and turns off the switch until the next switching cycle
begins.
-0.3667
r = 0.387 x IOUT
Note that this is just a guideline.
7
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pacitors and have very low ESL. For MLCCs it is recom-
mended to use X7R or X5R dielectrics. Consult capacitor
manufacturer datasheet to see how rated capacitance varies
over operating conditions.
Design Guide (Continued)
The LM2734Z operates at frequencies allowing the use of
ceramic output capacitors without compromising transient
response. Ceramic capacitors allow higher inductor ripple
without significantly increasing output ripple. See the output
capacitor section for more details on calculating output volt-
age ripple.
OUTPUT CAPACITOR
The output capacitor is selected based upon the desired
output ripple and transient response. The initial current of a
load transient is provided mainly by the output capacitor. The
output ripple of the converter is:
Now that the ripple current or ripple ratio is determined, the
inductance is calculated by:
When using MLCCs, the ESR is typically so low that the
capacitive ripple may dominate. When this occurs, the out-
put ripple will be approximately sinusoidal and 90˚ phase
shifted from the switching action. Given the availability and
quality of MLCCs and the expected output voltage of designs
using the LM2734Z, there is really no need to review any
other capacitor technologies. Another benefit of ceramic ca-
pacitors is their ability to bypass high frequency noise. A
certain amount of switching edge noise will couple through
parasitic capacitances in the inductor to the output. A ce-
ramic capacitor will bypass this noise while a tantalum will
not. Since the output capacitor is one of the two external
components that control the stability of the regulator control
loop, most applications will require a minimum at 10 µF of
output capacitance. Capacitance can be increased signifi-
cantly with little detriment to the regulator stability. Like the
input capacitor, recommended multilayer ceramic capacitors
are X7R or X5R. Again, verify actual capacitance at the
desired operating voltage and temperature.
where fs is the switching frequency and IO is the output
current. When selecting an inductor, make sure that it is
capable of supporting the peak output current without satu-
rating. Inductor saturation will result in a sudden reduction in
inductance and prevent the regulator from operating cor-
rectly. Because of the speed of the internal current limit, the
peak current of the inductor need only be specified for the
required maximum output current. For example, if the de-
signed maximum output current is 0.5A and the peak current
is 0.7A, then the inductor should be specified with a satura-
>
tion current limit of 0.7A. There is no need to specify the
saturation or peak current of the inductor at the 1.7A typical
switch current limit. The difference in inductor size is a factor
of 5. Because of the operating frequency of the LM2734Z,
ferrite based inductors are preferred to minimize core losses.
This presents little restriction since the variety of ferrite
based inductors is huge. Lastly, inductors with lower series
resistance (DCR) will provide better operating efficiency. For
recommended inductors see Example Circuits.
Check the RMS current rating of the capacitor. The RMS
current rating of the capacitor chosen must also meet the
following condition:
INPUT CAPACITOR
An input capacitor is necessary to ensure that VIN does not
drop excessively during switching transients. The primary
specifications of the input capacitor are capacitance, volt-
age, RMS current rating, and ESL (Equivalent Series Induc-
tance). The recommended input capacitance is 10µF, al-
though 4.7µF works well for input voltages below 6V. The
input voltage rating is specifically stated by the capacitor
manufacturer. Make sure to check any recommended derat-
ings and also verify if there is any significant change in
capacitance at the operating input voltage and the operating
temperature. The input capacitor maximum RMS input cur-
rent rating (IRMS-IN) must be greater than:
CATCH DIODE
The catch diode (D1) conducts during the switch off-time. A
Schottky diode is recommended for its fast switching times
and low forward voltage drop. The catch diode should be
chosen so that its current rating is greater than:
ID1 = IO x (1-D)
The reverse breakdown rating of the diode must be at least
the maximum input voltage plus appropriate margin. To im-
prove efficiency choose a Schottky diode with a low forward
voltage drop.
It can be shown from the above equation that maximum
RMS capacitor current occurs when D = 0.5. Always calcu-
late the RMS at the point where the duty cycle, D, is closest
to 0.5. The ESL of an input capacitor is usually determined
by the effective cross sectional area of the current path. A
large leaded capacitor will have high ESL and a 0805 ce-
ramic chip capacitor will have very low ESL. At the operating
frequencies of the LM2734Z, certain capacitors may have an
ESL so large that the resulting impedance (2πfL) will be
higher than that required to provide stable operation. As a
result, surface mount capacitors are strongly recommended.
Sanyo POSCAP, Tantalum or Niobium, Panasonic SP or
Cornell Dubilier ESR, and multilayer ceramic capacitors
(MLCC) are all good choices for both input and output ca-
BOOST DIODE
A standard diode such as the 1N4148 type is recommended.
For VBOOST circuits derived from voltages less than 3.3V, a
small-signal Schottky diode is recommended for greater ef-
ficiency. A good choice is the BAT54 small signal diode.
BOOST CAPACITOR
A ceramic 0.01µF capacitor with a voltage rating of at least
6.3V is sufficient. The X7R and X5R MLCCs provide the best
performance.
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8
Power loss (PLOSS) is the sum of two basic types of losses in
the converter, switching and conduction. Conduction losses
usually dominate at higher output loads, where as switching
losses remain relatively fixed and dominate at lower output
loads. The first step in determining the losses is to calculate
the duty cycle (D).
Design Guide (Continued)
OUTPUT VOLTAGE
The output voltage is set using the following equation where
R2 is connected between the FB pin and GND, and R1 is
connected between VO and the FB pin. A good value for R2
is 10kΩ.
VSW is the voltage drop across the internal NFET when it is
on, and is equal to:
VSW = IOUT x RDSON
PCB Layout Considerations
VD is the forward voltage drop across the Schottky diode. It
can be obtained from the Electrical Characteristics section. If
the voltage drop across the inductor (VDCR) is accounted for,
the equation becomes:
When planning layout there are a few things to consider
when trying to achieve a clean, regulated output. The most
important consideration when completing the layout is the
close coupling of the GND connections of the CIN capacitor
and the catch diode D1. These ground ends should be close
to one another and be connected to the GND plane with at
least two through-holes. Place these components as close to
the IC as possible. Next in importance is the location of the
GND connection of the COUT capacitor, which should be
near the GND connections of CIN and D1.
This usually gives only a minor duty cycle change, and has
been omitted in the examples for simplicity.
There should be a continuous ground plane on the bottom
layer of a two-layer board except under the switching node
island.
The conduction losses in the free-wheeling Schottky diode
are calculated as follows:
The FB pin is a high impedance node and care should be
taken to make the FB trace short to avoid noise pickup and
inaccurate regulation. The feedback resistors should be
placed as close as possible to the IC, with the GND of R2
placed as close as possible to the GND of the IC. The VOUT
trace to R1 should be routed away from the inductor and any
other traces that are switching.
PDIODE = VD x IOUT(1-D)
Often this is the single most significant power loss in the
circuit. Care should be taken to choose a Schottky diode that
has a low forward voltage drop.
Another significant external power loss is the conduction
loss in the output inductor. The equation can be simplified to:
2
PIND = IOUT x RDCR
High AC currents flow through the VIN, SW and VOUT traces,
so they should be as short and wide as possible. However,
making the traces wide increases radiated noise, so the
designer must make this trade-off. Radiated noise can be
decreased by choosing a shielded inductor.
The LM2734Z conduction loss is mainly associated with the
internal NFET:
2
PCOND = IOUT x RDSON x D
Switching losses are also associated with the internal NFET.
They occur during the switch on and off transition periods,
where voltages and currents overlap resulting in power loss.
The simplest means to determine this loss is to empirically
measuring the rise and fall times (10% to 90%) of the switch
at the switch node:
The remaining components should also be placed as close
as possible to the IC. Please see Application Note AN-1229
for further considerations and the LM2734Z demo board as
an example of a four-layer layout.
Calculating Efficiency, and
Junction Temperature:
The complete LM2734Z DC/DC converter efficiency can be
calculated in the following manner.
PSWF = 1/2(VIN x IOUT x freq x TFALL
)
PSWR = 1/2(VIN x IOUT x freq x TRISE
)
PSW = PSWF + PSWR
Typical Rise and Fall Times vs Input Voltage
VIN
5V
TRISE
8ns
TFALL
4ns
10V
15V
9ns
6ns
Or
10ns
7ns
Another loss is the power required for operation of the inter-
nal circuitry:
PQ = IQ x VIN
IQ is the quiescent operating current, and is typically around
1.5mA. The other operating power that needs to be calcu-
lated is that required to drive the internal NFET:
Calculations for determining the most significant power
losses are shown below. Other losses totaling less than 2%
are not discussed.
PBOOST = IBOOST x VBOOST
9
www.national.com
Thermal impedance is defined as:
Calculating Efficiency, and
Junction Temperature: (Continued)
VBOOST is normally between 3VDC and 5VDC. The IBOOST
rms current is approximately 4.25mA. Total power losses
are:
Thermal impedance from the silicon junction to the ambient
air is defined as:
Design Example 1:
Operating Conditions
VIN
5.0V
POUT
PDIODE
PIND
2.5W
This impedance can vary depending on the thermal proper-
ties of the PCB. This includes PCB size, weight of copper
used to route traces and ground plane, and number of layers
within the PCB. The type and number of thermal vias can
also make a large difference in the thermal impedance.
Thermal vias are necessary in most applications. They con-
duct heat from the surface of the PCB to the ground plane.
Four to six thermal vias should be placed under the exposed
pad to the ground plane if the LLP package is used. If the
Thin SOT23-6 package is used, place two to four thermal
vias close to the ground pin of the device.
VOUT
IOUT
VD
2.5V
151mW
75mW
53mW
53mW
187mW
7.5mW
21mW
548mW
1.0A
0.35V
3MHz
1.5mA
8ns
PSWF
PSWR
PCOND
PQ
Freq
IQ
TRISE
TFALL
RDSON
INDDCR
D
8ns
PBOOST
PLOSS
330mΩ
75mΩ
0.568
The datasheet specifies two different RθJA numbers for the
Thin SOT23–6 package. The two numbers show the differ-
ence in thermal impedance for a four-layer board with 2oz.
copper traces, vs. a four-layer board with 1oz. copper. RθJA
equals 120˚C/W for 2oz. copper traces and GND plane, and
235˚C/W for 1oz. copper traces and GND plane.
η = 82%
Calculating the LM2734Z Junction
Temperature
Thermal Definitions:
Method 1:
To accurately measure the silicon temperature for a given
application, two methods can be used. The first method
requires the user to know the thermal impedance of the
silicon junction to case. (RθJC) is approximately 80˚C/W for
the Thin SOT23-6 package. Knowing the internal dissipation
from the efficiency calculation given previously, and the case
temperature, which can be empirically measured on the
bench we have:
TJ = Chip junction temperature
TA = Ambient temperature
RθJC = Thermal resistance from chip junction to device case
RθJA = Thermal resistance from chip junction to ambient air
herefore:
TJ = (RθJC x PLOSS) + TC
Design Example 2:
20130373
Operating Conditions
VIN
5.0V
POUT
PDIODE
PIND
2.5W
FIGURE 6. Cross-Sectional View of Integrated Circuit
Mounted on a Printed Circuit Board.
VOUT
IOUT
VD
2.5V
151mW
75mW
53mW
53mW
187mW
7.5mW
21mW
548mW
1.0A
Heat in the LM2734Z due to internal power dissipation is
removed through conduction and/or convection.
0.35V
3MHz
1.5mA
8ns
PSWF
PSWR
PCOND
PQ
Freq
IQ
Conduction: Heat transfer occurs through cross sectional
areas of material. Depending on the material, the transfer of
heat can be considered to have poor to good thermal con-
ductivity properties (insulator vs conductor).
TRISE
TFALL
RDSON
INDDCR
D
8ns
PBOOST
PLOSS
Heat Transfer goes as:
330mΩ
75mΩ
0.568
→
→
→
silicon package lead frame PCB.
Convection: Heat transfer is by means of airflow. This could
be from a fan or natural convection. Natural convection
occurs when air currents rise from the hot device to cooler
air.
www.national.com
10
ground plane is accessed by two vias. The board measures
2.5cm x 3cm. It was placed in an oven with no forced airflow.
Calculating the LM2734Z Junction
Temperature (Continued)
The ambient temperature was raised to 94˚C, and at that
temperature, the device went into thermal shutdown.
If the junction temperature was to be kept below 125˚C, then
the ambient temperature cannot go above 54.2˚C.
The second method can give a very accurate silicon junction
temperature. The first step is to determine RθJA of the appli-
cation. The LM2734Z has over-temperature protection cir-
cuitry. When the silicon temperature reaches 165˚C, the
device stops switching. The protection circuitry has a hyster-
esis of 15˚C. Once the silicon temperature has decreased to
approximately 150˚C, the device will start to switch again.
Knowing this, the RθJA for any PCB can be characterized
during the early stages of the design by raising the ambient
temperature in the given application until the circuit enters
thermal shutdown. If the SW-pin is monitored, it will be
obvious when the internal NFET stops switching indicating a
junction temperature of 165˚C. Knowing the internal power
dissipation from the above methods, the junction tempera-
ture and the ambient temperature, RθJA can be determined.
TJ - (RθJA x PLOSS) = TA
The method described above to find the junction tempera-
ture in the Thin SOT23-6 package can also be used to
calculate the junction temperature in the LLP package. The 6
pin LLP package has a RθJC = 20˚C/W, and RθJA can vary
depending on the application. RθJA can be calculated in the
same manner as described in method #2 (see example 3).
LLP Package
The LM2734Z is packaged in a Thin SOT23-6 package and
the 6–pin LLP. The LLP package has the same footprint as
the Thin SOT23-6, but is thermally superior due to the ex-
posed ground paddle on the bottom of the package.
Once this is determined, the maximum ambient temperature
allowed for a desired junction temperature can be found.
Design Example 3:
20130374
No Pullback LLP Configuration
Operating Conditions
Package
VIN
SOT23-6
12.0V
3.30V
750mA
0.35V
3MHz
1.5mA
4mA
RθJA of the LLP package is normally two to three times better
than that of the Thin SOT23-6 package for a similar PCB
configuration (area, copper weight, thermal vias).
POUT
PDIODE
PIND
2.475W
523mW
56.25mW
108mW
108mW
68.2mW
18mW
VOUT
IOUT
VD
PSWF
PSWR
PCOND
PQ
Freq
IQ
IBOOST
VBOOST
TRISE
TFALL
RDSON
INDDCR
D
5V
PBOOST
PLOSS
20mW
8ns
902mW
8ns
400mΩ
75mΩ
30.3%
Using a standard National Semiconductor Thin SOT23-6
demonstration board to determine the RθJA of the board. The
four layer PCB is constructed using FR4 with 1/2oz copper
traces. The copper ground plane is on the bottom layer. The
20130370
FIGURE 7. Dog Bone
11
www.national.com
This example follows example 2, but uses the LLP package.
Using a standard National Semiconductor LLP-6 demonstra-
tion board, use Method 2 to determine RθJA of the board.
The four layer PCB is constructed using FR4 with 1/2oz
copper traces. The copper ground plane is on the bottom
layer. The ground plane is accessed by four vias. The board
measures 2.5cm x 3cm. It was placed in an oven with no
forced airflow.
LLP Package (Continued)
For certain high power applications, the PCB land may be
modified to a "dog bone" shape (see Figure 7). By increasing
the size of ground plane, and adding thermal vias, the RθJA
for the application can be reduced.
Design Example 4:
Operating Conditions
The ambient temperature was raised to 113˚C, and at that
temperature, the device went into thermal shutdown.
Package
VIN
LLP-6
12.0V
3.3V
POUT
PDIODE
PIND
2.475W
523mW
56.25mW
108mW
108mW
68.2mW
18mW
VOUT
IOUT
750mA
0.35V
3MHz
1.5mA
4mA
VD
PSWF
PSWR
PCOND
PQ
If the junction temperature is to be kept below 125˚C, then
the ambient temperature cannot go above 73.2˚C.
Freq
IQ
TJ - (RθJA x PLOSS) = TA
IBOOST
VBOOST
TRISE
TFALL
RDSON
INDDCR
D
5V
PBOOST
PLOSS
20mW
Package Selection
To determine which package you should use for your specific
application, variables need to be known before you can
determine the appropriate package to use.
8ns
902mW
8ns
400mΩ
75mΩ
30.3%
1. Maximum ambient system temperature
2. Internal LM2734Z power losses
3. Maximum junction temperature desired
4. RθJA of the specific application, or RθJC (LLP or Thin
SOT23-6)
The junction temperature must be less than 125˚C for the
worst-case scenario.
www.national.com
12
LM2734Z Design Examples
20130342
FIGURE 8. VBOOST Derived from VIN
Operating Conditions: 5V to 1.5V/1A
Bill of Materials for Figure 8
Part ID
Part Value
Part Number
Manufacturer
National Semiconductor
TDK
U1
1A Buck Regulator
10µF, 6.3V, X5R
LM2734ZX
C1, Input Cap
C2, Output Cap
C3, Boost Cap
D1, Catch Diode
D2, Boost Diode
L1
C3216X5ROJ106M
C3216X5ROJ106M
C1005X7R1C103K
MBRM110L
10µF, 6.3V, X5R
TDK
0.01uF, 16V, X7R
0.3VF Schottky 1A, 10VR
TDK
ON Semi
Diodes, Inc.
Coilcraft
@
1VF 50mA Diode
1N4148W
2.2µH, 1.8A
8.87kΩ, 1%
10.2kΩ, 1%
100kΩ, 1%
ME3220–222MX
CRCW06038871F
CRCW06031022F
CRCW06031003F
R1
Vishay
R2
Vishay
R3
Vishay
13
www.national.com
LM2734Z Design Examples (Continued)
20130343
FIGURE 9. VBOOST Derived from VOUT
12V to 3.3V/1A
Bill of Materials for Figure 9
Part ID
Part Value
Part Number
Manufacturer
U1
1A Buck Regulator
10µF, 25V, X7R
LM2734ZX
National Semiconductor
C1, Input Cap
C2, Output Cap
C3, Boost Cap
D1, Catch Diode
D2, Boost Diode
L1
C3225X7R1E106M
C3216X5ROJ226M
C1005X7R1C103K
SS1P3L
TDK
22µF, 6.3V, X5R
0.01µF, 16V, X7R
0.34VF Schottky 1A, 30VR
TDK
TDK
Vishay
Vishay
Coilcraft
Vishay
Vishay
Vishay
@
0.6VF 30mA Diode
BAT17
3.3µH, 1.3A
31.6kΩ, 1%
10.0 kΩ, 1%
100kΩ, 1%
ME3220–332MX
CRCW06033162F
CRCW06031002F
CRCW06031003F
R1
R2
R3
www.national.com
14
LM2734Z Design Examples (Continued)
20130344
FIGURE 10. VBOOST Derived from VSHUNT
18V to 1.5V/1A
Bill of Materials for Figure 10
Part ID
Part Value
Part Number
Manufacturer
National Semiconductor
TDK
U1
1A Buck Regulator
10µF, 25V, X7R
LM2734ZX
C1, Input Cap
C2, Output Cap
C3, Boost Cap
C4, Shunt Cap
D1, Catch Diode
D2, Boost Diode
D3, Zener Diode
L1
C3225X7R1E106M
C3216X5ROJ226M
C1005X7R1C103K
C1005X5R0J104K
SS1P3L
22µF, 6.3V, X5R
TDK
0.01µF, 16V, X7R
0.1µF, 6.3V, X5R
0.4VF Schottky 1A, 30VR
TDK
TDK
Vishay
@
1VF 50mA Diode
1N4148W
Diodes, Inc.
Vishay
5.1V 250Mw SOT-23
3.3µH, 1.3A
BZX84C5V1
ME3220–332MX
CRCW06038871F
CRCW06031022F
CRCW06031003F
CRCW06034121F
Coilcraft
Vishay
R1
8.87kΩ, 1%
R2
10.2kΩ, 1%
Vishay
R3
100kΩ, 1%
Vishay
R4
4.12kΩ, 1%
Vishay
15
www.national.com
LM2734Z Design Examples (Continued)
20130349
FIGURE 11. VBOOST Derived from Series Zener Diode (VIN
)
15V to 1.5V/1A
Bill of Materials for Figure 11
Part ID
Part Value
Part Number
Manufacturer
National Semiconductor
TDK
U1
1A Buck Regulator
10µF, 25V, X7R
LM2734ZX
C1, Input Cap
C2, Output Cap
C3, Boost Cap
D1, Catch Diode
D2, Boost Diode
D3, Zener Diode
L1
C3225X7R1E106M
C3216X5ROJ226M
C1005X7R1C103K
SS1P3L
22µF, 6.3V, X5R
TDK
0.01µF, 16V, X7R
0.4VF Schottky 1A, 30VR
TDK
Vishay
@
1VF 50mA Diode
1N4148W
Diodes, Inc.
Diodes, Inc.
Coilcraft
11V 350Mw SOT-23
3.3µH, 1.3A
BZX84C11T
ME3220–332MX
CRCW06038871F
CRCW06031022F
CRCW06031003F
R1
8.87kΩ, 1%
Vishay
R2
10.2kΩ, 1%
Vishay
R3
100kΩ, 1%
Vishay
www.national.com
16
LM2734Z Design Examples (Continued)
20130350
FIGURE 12. VBOOST Derived from Series Zener Diode (VOUT
)
15V to 9V/1A
Bill of Materials for Figure 12
Part ID
Part Value
Part Number
Manufacturer
National Semiconductor
TDK
U1
1A Buck Regulator
10µF, 25V, X7R
LM2734ZX
C1, Input Cap
C2, Output Cap
C3, Boost Cap
D1, Catch Diode
D2, Boost Diode
D3, Zener Diode
L1
C3225X7R1E106M
C3216X5R1C226M
C1005X7R1C103K
SS1P3L
22µF, 16V, X5R
TDK
0.01µF, 16V, X7R
0.4VF Schottky 1A, 30VR
TDK
Vishay
@
1VF 50mA Diode
1N4148W
Diodes, Inc.
Diodes, Inc.
Coilcraft
4.3V 350mw SOT-23
2.2µH, 1.8A
BZX84C4V3
ME3220–222MX
CRCW06031023F
CRCW06031022F
CRCW06031003F
R1
102kΩ, 1%
Vishay
R2
10.2kΩ, 1%
Vishay
R3
100kΩ, 1%
Vishay
17
www.national.com
Physical Dimensions inches (millimeters) unless otherwise noted
6-Lead SOT23 Package
NS Package Number MK06A
6-Lead LLP Package
NS Package Number SDE06A
www.national.com
18
Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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