TP5089N [NSC]

TP5089 DTMF (TOUCH-TONE) Generator; TP5089 DTMF （双音频）发电机


型号：	TP5089N
厂家：	National Semiconductor
描述：	TP5089 DTMF (TOUCH-TONE) Generator TP5089 DTMF （双音频）发电机晶体电信集成电路电信电路电话电路光电二极管电机
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December 1991

TP5089 DTMF (TOUCH-TONE) Generator

General Description

Features

3.5V–10V operation when generating tones

2V operation of keyscan and MUTE logic

Static sensing of key closures or logic inputs

On-chip 3.579545 MHz crystal-controlled oscillator

Output amplitudes proportional to supply voltage

High group pre-emphasis

The TP5089 is a low threshold voltage, field-implanted, met-

al gate CMOS integrated circuit. It interfaces directly to a

standard telephone keypad and generates all dual tone mul-

ti-frequency pairs required in tone-dialing systems. The tone

synthesizers are locked to an on-chip reference oscillator

using an inexpensive 3.579545 MHz crystal for high tone

accuracy. The crystal and an output load resistor are the

only external components required for tone generation. A

MUTE OUT logic signal, which changes state when any key

is depressed, is also provided.

Low harmonic distortion

Open emitter-follower low-impedance output

SINGLE TONE INHIBIT pin

Block Diagram

TL/H/5057–1

FIGURE 1

1995 National Semiconductor Corporation

TL/H/5057

RRD-B30M115/Printed in U. S. A.

Absolute Maximum Ratings

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales

Office/Distributors for availability and specifications.

30 C to 60 C

Operating Temperature

Storage Temperature

55 C to

150 C

500 mW

Maximum Power Dissipation

Supply Voltage (V

)

15V

Maximum Voltage at Any Pin

0.3V

0.3V to V

25 C. All other limits are assured by

Electrical Characteristics Unless otherwise noted, limits printed in BOLD characters are guaranteed for V

0 C to 60 C by correlation with 100% electrical testing at T

correlation with other production tests and/or product design and characterization.

3.5V to 10V, T

Parameter

Conditions

Min

Typ

Max

Units

Minimum Supply Voltage for Keysense

and MUTE Logic Functions

Minimum Operating Voltage

for generating tones

3.5

Operating Current

Idle

Mute open

e %

2.5

1.1

Generating Tones

3.5V

Input Resistors

COLUMN and ROW (Pull-Up)

SINGLE TONE INHIBIT (Pull-Down)

TONE DISABLE (Pull-Up)

120

Input Low Level

Input High Level

0.2 V

0.8 V

MUTE OUT Sink Current

3.5V

0.4

(COLUMN and ROW Active)

0.5V

MUTE Out Leakage Current

Output Amplitude

Low Group

240 X

190

510

270

735

250

340

880

mVrms

3.5V

240X

700

340

955

mVrms

10V

Output Amplitude

High Group

240X

470

3.5V

240X

1265

10V

Mean Output DC Offset

3.5V

10V

1.3

4.6

High Group Pre-Emphasis

2.2

2.7

3.2

1 MHz Bandwidth

240X

Dual Tone/Total Harmonic Distortion Ratio

4V, R

Start-Up Time (to 90% Amplitude)

Note 1: R is the external load resistor connected from TONE OUT to V

5 pF, C 0.02 pF.

Note 2: Crystal specification: Parallel resonant 3.579545 MHz, R

150 X, L

100 mH, C

Symbol

Description

Connection Diagram

MUTE Output

The MUTE output is an open-

drain N-channel device that

Dual-In-Line Package

sinks current to V with any

key input and is open when no

key input is sensed. The MUTE

output will switch regardless of

the state of the SINGLE TONE

INHIBIT input.

SINGLE TONE INHIBIT

Input

The SINGLE TONE INHIBIT

input is used to inhibit the

generation of other than valid

tone pairs due to multiple row-

column closures. It has a pull-

down resistor to V , and when

left open or tied to V any

input condition that would

TL/H/5057–2

normally result in a single tone

will now result in no tone, with

all other functions operating

Top View

Order Number TP5089N

See NS Package N16A

normally. When tied to V

single or dual tones may be

generated, see Table II.

Pin Descriptions

Symbol

Description

TONE OUT

This output is the open emitter

of an NPN transistor, the

collector of which is connected

This is the positive voltage

supply to the device, referenced

to V . The collector of the

to V . When an external load

resistor is connected from

TONE OUT transistor is

connected to this pin.

This is the negative voltage

supply. All voltages are

referenced to this pin.

TONE OUT to V , the output

voltage on this pin is the sum of

the high and low group sine-

waves superimposed on a DC

offset. When not generating

tones, this output transistor is

turned OFF to minimize the

device idle current.

OSC IN, OSC OUT

All tone generation timing is

derived from the on-chip

oscillator circuit. A low cost

3.579545 MHz A-cut crystal

(NTSC TV color-burst) is

needed between pins 7 and 8.

Load capacitors and a feedback

resistor are included on-chip for

good start-up and stability. The

oscillator stops when column

inputs are sensed with no valid

input having been detected. The

oscillator is also stopped when

the TONE DISABLE input is

pulled to logic low.

Adjustment of the emitter load

resistor results in variation of

the mean DC current during

tone generation, the sinewave

signal current through the

output transistor, and the output

distortion. Increasing values of

load resistance decrease both

the signal current and distortion.

Functional Description

Row and Column Inputs

When no key is pushed, pull-up

resistors are active on row and

column inputs. A key closure is

recognized when a single row

and a single column are

With no key inputs to the device the oscillator is inhibited,

the output transistor is pulled OFF and device current con-

sumption is reduced to a minimum. Key closures are sensed

statically. Any key closure activates the MUTE output, starts

the oscillator and sets the high group and low group pro-

grammable counters to the appropriate divide ratio. These

counters sequence two ratioed-capacitor D/A converters

through a series of 28 equal duration steps per sine-wave

cycle. The two tones are summed by a mixer amplifier, with

pre-emphasis applied to the high group tone. The output is

an NPN emitter-follower requiring the addition of an external

connected to V , which starts

the oscillator and initiates tone

generation. Negative-true logic

signals simulating key closures

can also be used.

TONE DISABLE

Input

The TONE DISABLE input has

an internal pull-up resistor.

When this input is open or at

logic high, the normal tone

output mode will occur. When

TONE DISABLE input is at logic

low, the device will be in the

inactive mode, TONE OUT will

be at an open circuit state.

load resistor to V . This resistor facilitates adjustment of

the signal current flowing from V

sistor.

through the output tran-

The amplitude of the output tones is directly proportional to

the device supply voltage.

Functional Description (Continued)

TABLE I. Output Frequency Accuracy

Tone

Valid

Standard Tone Output

% Deviation

Group Input DTMF (Hz)

Frequency

from Standard

Low

697

770

852

941

694.8

770.1

852.4

940.0

0.32

0.02

0.03

0.11

Group

High

1209

1336

1477

1633

1206.0

1331.7

1486.5

1639.0

0.24

0.32

0.64

0.37

Group

TABLE II. Functional Truth Table

TONE OUT

SINGLE TONE

INHIBIT

TONE

DISABLE

ROW

COLUMN

MUTE

Low

High

O/C

One

2 or More

One

2 or More

One

2 or More

One

2 or More

Note 1: X is don’t care state.

Note 2: V is the output offset voltage.

TL/H/5057–3

*Adjust R for desired tone amplitude.

FIGURE 2. Typical Application

Lit. 113986

Physical Dimensions inches (millimeters)

Molded Dual-In-Line Package (N)

Order Number TP5089N

NS Package N16A

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant

into the body, or (b) support or sustain life, and whose

failure to perform, when properly used in accordance

with instructions for use provided in the labeling, can

be reasonably expected to result in a significant injury

to the user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

National Semiconductor

Corporation

National Semiconductor

Europe

National Semiconductor

Hong Kong Ltd.

National Semiconductor

Japan Ltd.

1111 West Bardin Road

Arlington, TX 76017

Tel: 1(800) 272-9959

Fax: 1(800) 737-7018

Fax:

(

49) 0-180-530 85 86

13th Floor, Straight Block,

Ocean Centre, 5 Canton Rd.

Tsimshatsui, Kowloon

Hong Kong

Tel: (852) 2737-1600

Fax: (852) 2736-9960

Tel: 81-043-299-2309

Fax: 81-043-299-2408

Email: cnjwge tevm2.nsc.com

Deutsch Tel:

English Tel:

Fran3ais Tel:

Italiano Tel:

(

49) 0-180-530 85 85

49) 0-180-532 78 32

49) 0-180-532 93 58

49) 0-180-534 16 80

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

TP5089N [NSC]

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