NTE1739 [NTE]

Integrated Circuit TV Horizontal/Vertical Countdown Digital Sync System; 集成电路电视机水平/垂直倒计时数字同步系统
NTE1739
型号: NTE1739
厂家: NTE ELECTRONICS    NTE ELECTRONICS
描述:

Integrated Circuit TV Horizontal/Vertical Countdown Digital Sync System
集成电路电视机水平/垂直倒计时数字同步系统

消费电路 商用集成电路 偏转集成电路 电视 监视器 光电二极管
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NTE1739  
Integrated Circuit  
TV Horizontal/Vertical Countdown  
Digital Sync System  
Features:  
D Horizontal Oscillator  
D Vertical Countdown  
D Composite Blanking Output  
D Burst–Gate Output  
D Horizontal Ramp Generator  
D Internal Shunt Regulator  
Description:  
The NTE1739 is a video sync system in a 16–Lead DIP type package designed for use in television,  
monitor or video display products. The NTE1739 contains a horizontal phase–locked oscillator and  
vertical countdown. It also features composite blanking and burst–gate outputs which, when external-  
ly summed, produce the sandcastle pulse necessary for the operation of most chroma/luma circuits.  
The NTE1739 is intended for use in 525–line systems and operates with standard or nonstandard  
input signals. An automatic mode–recognition circuit forces operation into the nonsynchronous mode  
for nonstandard sync input signals.  
Absolute Maximum Ratings:  
DC Supply Current, Pin7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA  
Input Voltage (All Inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1V to V+ + 1V  
Device Dissipation (TA +85°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900mW  
Derate Linearly Above 85°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14mW/°C  
Operating Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40° to +85°C  
Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° to +150°C  
Lead Temperature (During Soldering, 1/16 ±1/32 in. (1.59 ± 0.79mm) from case, 10s max) . . . +265°C  
Circuit Operation  
The master oscillator operates at 8 times the horizontal rate, fH, as determined by the external LC  
connected between Pin5 and Pin6. The master oscillator is divided by 2, 4, and 8 and is then fed to  
the horizontal output amplifier and also to a 10–stage vertical countdown circuit. Horizontal AFC is  
performed by comparing the horizontal ramp input signal on Pin2, derived from the flyback pulse, to  
the horizontal sync signal on Pin3, producing correction voltage. The correction voltage then is ap-  
plied to the master oscillator to phase lock the system.  
The divide by 2 and 4 outputs are used to drive a 10–stage counter for the vertical circuits. The use  
of the countdown system and associated logic circuits assures good noise immunity and the deletion  
of the vertical hold control.  
Circuit Operation (Cont’d)  
The Gain/Window switch input on Pin10 is a logic input which controls the digital window in which the  
system looks for the occurrence of a vertical sync pulse: it also adjusts the phase detector gain for  
the two corresponding vertical windows. The 464th (Pin10 = low) or the 512th (Pin10 = high) clock  
pulse (at 2fH) from the horizontal divider is used to set the start of the vertical sync window. The end  
of the sync window occurs at the 592nd (Pin10 = low) or the 568th (Pin10 = High) clock pulse. If the  
incoming vertical sync pulse occurs regularly at the same time the 525th clock pulse occurs, it is used  
to generate the start of the vertical blanking and vertical sweep; the system is in the standard sync  
mode. If the incoming vertical sync pulse pulse is absent (removed by noise, for example), the  
10stage counter will continue to provide an output pulse at the 525th clock pulse; a 3bit counter  
will count the number of fields where no sync pulse occurred coincident with the 525th clock pulse.  
If no coincidence is detected in 8 sequential fields, the 3bit counter energizes the toggle which shifts  
the mode of operation from standard sync to nonstandard sync.  
In the nonstandard sync mode vertical scan is initiated by the incoming vertical sync pulse. Non stan-  
dard sync operation results when the incoming vertical sync pulse occurs regularly within the vertical  
sync window; 464 to 592 counts (Pin10 = low) or 512 to 568 counts (Pin10 = high) but not at the 525th  
count (Standard Sync Mode). In the nonstandard sync mode if no sync pulse is present, the system  
will free run at a frequency determined by the 592 (Pin10 = low) or 568 (Pin10 = high) count.  
The NTE1739 generates a composite blanking signal and a burstgate (key pulse) which, when  
summed externally, produce the sandcastle pulse necessary for the operation of most Chrom/Lumi-  
nance integrated circuits.  
Electrical Characteristics: (TA = +25° to +70°C unless otherwise specified)  
Parameter  
Pin  
Test Conditions  
Min  
Typ  
Max Unit  
Supply Current  
7
Adjust 24V Supply for 7V on Pin7  
7
14  
mA  
V
Regulator Voltage  
7
7.0  
8.6  
Saturation Voltages  
Horizontal Output  
8
0
0
0.4  
0.4  
V
V
V
V
V
Inverted Horizontal Output  
Vertical Output  
13  
11  
12  
15  
8
0
0.2  
Blanking Output  
0
0.175  
0.175  
Horizontal Ramp Output  
Horizontal VCO Free Running Freq.  
Horizontal VCO Oscillator PullIn  
Horizontal Blanking Width  
Vertical Blanking Width  
Burst Gate Width  
0
No Sync Applied S = B  
15547  
300  
9.5  
1140  
2.98  
20  
15854 Hz  
1
8
For 15734 ±1Hz  
+300  
10.5  
1148  
3.42  
215  
Hz  
µs  
µs  
µs  
ns  
12  
12  
16  
16  
Std NTSC Sync Applied  
Std NTSC Sync Applied  
Std NTSC Sync Applied  
Burst Gate Delay  
From End of Horizontal Sync (Pin3)  
to Start of Burst Gate (Pin16)  
Horizontal Pulse Width  
Vertical Pulse Width  
Horizontal Sync Input  
Vertical Sync Input  
8
11  
Std NTSC Sync Applied  
Std NTSC Sync Applied  
31.4  
504  
32.1  
516  
µs  
µs  
10  
10  
V
PP  
PP  
V
Pin Connection Diagram  
Burst Gate Width Input  
1
16  
15  
Burst Gate Output  
Horiz Ramp Driver  
Output  
Horiz Ramp Input  
Horiz Sync Input  
2
3
14 Flyback Pulse Input  
Inverted Horiz  
Output  
Vert Sync Input  
Filter  
4
5
13  
12 Blanking Output  
11 Vert Output  
VCO Tuning Circuit  
Shunt Regulator  
Horiz Output  
6
7
8
Gain/Window  
Switch Input  
10  
9
GND  
16  
9
.260  
(6.6)  
Max  
1
8
.785 (19.9) Max  
.300 (7.62)  
.200  
5.08)  
Max  
.245  
(6.22)  
Min  
.100 (2.54)  
.700 (17.7)  

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