NTE857SM [NTE]
Integrated Circuit Low-Noise JFET-Input Operational Amplifier; 集成电路低噪声JFET输入运算放大器型号: | NTE857SM |
厂家: | NTE ELECTRONICS |
描述: | Integrated Circuit Low-Noise JFET-Input Operational Amplifier |
文件: | 总3页 (文件大小:31K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NTE857M
NTE857SM
Integrated Circuit
Low–Noise JFET–Input Operational Amplifier
Description:
The NTE857M and NTE857SM are low–noise JFET input operational amplifiers combining two
state–of–the–art linear technologies on a single monolithic integrated circuit. Each internally com-
pensated operational amplifier has well matched high voltage JFET input devices for low input offset
voltage. The BIFET technology provides wide bandwidths and fast slew rates with low input bias cur-
rents, input offset currents, and supply currents. Moreover, these devices exhibit low–noise and low
harmonic distortion making them ideal for use in high–fidelity audio amplifier applications.
Features:
D Available in Two Different Package Types:
8–Lead Mini DIP (NTE857M)
SOIC–8 Surface Mount (NTE857SM)
D Low Input Noise Voltage: 18nV√Hz Typ
D Low Harmonic Distortion: 0.01% Typ
D Low Input Bias and Offset Currents
D High Input Impedance: 1012Ω Typ
D High Slew Rate: 13V/µs Typ
D Wide Gain Bandwidth: 4MHz Typ
D Low Supply Current: 1.4mA per Amp
Absolute Maximum Ratings:
Supply Voltage
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18V
VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18V
Differential Input Voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V
Input Voltage Range (Note 1), VIDR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15V
Output Short–Circuit Duration (Note 2), tS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Power Dissipation, PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 680mW
Derate Above TA = +47°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mW/°C
Operating Ambient Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +70°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° to +150°C
Note 1. The magnitude of the input voltage must not exceed the magnitude of the supply voltage or
15V, whichever is less.
Note 2. The output may be shorted to GND or either supply. Temperature and/or supply voltages
must be limited to ensure that power dissipation ratungs are not exceeded.
Electrical Characteristics: (VCC = +15V, VEE = –15V, TA = +25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
–
Typ
3
Max Unit
10
13
–
mV
mV
Input Offset Voltage
VIO
RS ≤ 10k,
VCM = 0
TA = 0 to +70°C
∆VIO/∆T TA = 0 to +70°C
–
–
Average Temperature
Coefficient of Input Offset
Voltage
–
10
µV/°C
–
–
–
–
–
5
–
50
2
pA
nA
pA
nA
Ω
Input Offset Current
Input Bias Current
Input Resistance
IIO
VCM = 0,
Note 3
TA = 0 to +70°C
TA = 0 to +70°C
30
–
1012
200
7
IIB
VCM = 0,
Note 3
ri
–
Common Mode Input Voltage
Range
VICR
±10 +15, –12
–
V
25
15
24
24
20
70
70
–
150
–
–
–
V/mV
V/mV
V
Large–Signal Voltage Gain
AVOL VO = ±10V,
RL ≤ 2k
TA = 0 to +70°C
TA = 0 to +70°C
RL = 10k
RL ≥ 10k
RL ≥ 2k
28
–
–
Output Voltage Swing
VO
(Peak–to–Peak)
–
V
–
–
V
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
Supply Current (Each Amplifier)
Unity Gain Bandwidth
Slew Rate
CMRR RS ≤ 10k
100
100
1.4
4
–
dB
PSRR RS ≤ 10k
–
dB
ID
2.5
–
mA
MHz
V/µs
µs
BW
–
SR
tr
VIN = 10V, RL = 2k, CL = 100pF
–
13
0.1
10
–
Rise Time
–
–
Overshoot Factor
VIN = 20mV, RL = 2k,
CL = 100pF
–
–
%
Equivalent Input Noise Voltage
Equivalent Input Noise Current
Total Harmonic Distortion
en
in
RS = 100Ω, f = 1000Hz
RS = 100Ω, f = 1000Hz
–
–
–
18
–
–
–
nV/√Hz
pA/√Hz
%
0.01
0.01
THD VO(RMS) = 10V, RS ≤ 1k,
RL ≥ 2k, f = 1000Hz
Channel Separation
AV = 100
–
120
–
dB
Note 3. Input Bias currents of JFET input operational amplifiers approximately double for every 10°C
rise in Junction Temperature. To maintain Junction Temperature as close to Ambient Tem-
perature as possible, pulse techniques must be used during test.
Pin Connection Diagram
Offset Null
Inverting Input (1)
1
2
3
8
7
6
N.C.
V
CC
Non–Inverting Input (1)
Output
4
5
Offset Null
V
EE
NTE857M
8
5
.260 (6.6)
1
4
.390 (9.9)
Max
.300
(7.62)
.155
(3.93)
.100 (2.54)
.145 (3.68)
.300 (7.62)
NTE857SM
.192 (4.9)
8
5
4
.236
(5.99)
.154
(3.91)
1
.050 (1.27)
016
(.406)
.198 (5.03)
061
(1.53)
.006 (.152)
NOTE: Pin1 on Beveled Edge
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