W567B260 [NUVOTON]

The W567Bxxx is a powerful microcontroller (uC) dedicated to speech and melody synthesis applications.;
W567B260
型号: W567B260
厂家: NUVOTON    NUVOTON
描述:

The W567Bxxx is a powerful microcontroller (uC) dedicated to speech and melody synthesis applications.

可编程只读存储器 时钟 外围集成电路
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W567BXXX  
Table of Contents-  
1.  
2.  
3.  
4.  
5.  
GENERAL DESCRIPTION.......................................................................................................... 2  
FEATURES ................................................................................................................................. 3  
PIN DESCRIPTION..................................................................................................................... 4  
BLOCK DIAGRAM ...................................................................................................................... 5  
ELECTRICAL CHARACTERISTICS........................................................................................... 5  
5.1 Absolute Maximum Ratings............................................................................................... 5  
5.2 D.C. Characteristics........................................................................................................... 6  
5.3 A.C. Characteristics ........................................................................................................... 7  
6.  
7.  
APPLICATION CIRCUITS........................................................................................................... 8  
6.1 W567B010~B020 (Ring as main system clock) ................................................................ 8  
6.2 W567B030~B260 (Ring as main system clock) ................................................................ 9  
6.3 W567B010~B020 (Crystal as main system clock)........................................................... 10  
6.4 W567B030~B260 (Crystal as main system clock)........................................................... 11  
REVISION HISTORY ................................................................................................................ 12  
Publication Release Date: May 2009  
- 1 -  
Revision A10  
W567BXXX  
1. GENERAL DESCRIPTION  
The W567Bxxx is a powerful microcontroller (uC) dedicated to speech and melody synthesis  
applications. With the help of the embedded 8-bit microprocessor & dedicated H/W, the W567Bxxx  
can synthesize 4-channel speech+melody simultaneously.  
The two channels of synthesized speech can be in different kinds of format, for example ADPCM and  
MDPCM. The W567Bxxx can provide 4-channel high-quality WinMelodyTM , which can emulate the  
characteristics of musical instruments, such as piano and violin. The output of speech/melody  
channels are mixed together through the on-chip digital mixer to produce colorful effects. With these  
hardware resources, the W567Sxxx is very suitable for high-quality and sophisticated scenario  
applications.  
The W567Bxxx is also capable of transmitting infrared (IR) signals with on-chip carrier generator. As a  
result, toys can be designed to interact with each other for more play values. A serial interface can be  
supported as external memory for memory expansion or content-updateable applications.  
The W567Bxxx family contains several items with different playback duration as shown below: (@5-bit  
MDPCM algorithm, 6KHz sampling rate)  
Item  
*Duration  
Item  
W567B010  
14 sec.  
W567B015  
18 sec.  
W567B020  
26 sec.  
W567B030  
35 sec.  
W567B040  
52 sec.  
W567B060  
60 sec.  
W567B080  
104 sec.  
W567B100  
116 sec.  
W567B120  
129 sec.  
W567B150  
163 sec.  
Duration  
Item  
W567B170  
197 sec.  
W567B210  
232 sec.  
W567B260  
264 sec.  
Duration  
Note:  
*: The duration time is based on 5-bit MDPCM at 6KHz sampling rate. The firmware library and timber library have  
been excluded from user’s ROM space for the duration estimation.  
Publication Release Date: May 2009  
- 2 -  
Revision A10  
W567BXXX  
2. FEATURES  
Wide range of operating voltage:  
8 MHz @ 3.0 volt ~ 5.5 volt  
4 MHz @ 2.4 volt ~ 5.5 volt  
Power management:  
4 ~ 8 MHz system clocks, with Ring type and Crystal type  
Stop mode for stopping all IC operations  
Provides up to 8 inputs, 8 outputs and 24 I/O pins  
Current-type Digital-to-Analog Converter (DAC):  
(8+2)-bit resolution with programmable output current  
F/W speech synthesis with multiple format support: ADPCM/MDPCM/PCM  
Up to 4 speech synthesis1 channels at programmable sample rate  
4 melody channels that can emulate characteristics of musical instruments  
4-input/8-bit-resolution Mixer can mix the speech and melody signals flexibly  
Built-in IR carrier generation circuit for simplifying firmware IR application  
Built-in 5 timers for speech/melody synthesis and general purpose applications  
Built-in 8*7 multiplier  
Built-in Watch-Dog Timer (WDT)  
Built-in Low-Voltage-Reset (LVR)  
Built-in Serial Interface Manager (SIM) in W567B030 ~ B260  
Support PowerScript for developing codes in easy way  
Full-fledged development system  
Source-level ICE debugger  
Event synchronization mechanism  
Compatible with W566B/C & W588S system  
User-friendly GUI environment  
Available package form: (COB is essential)  
1
More speech channels are available for 8-bit PCM format in the remaining melody channels. When used as 2-ch MDPCM  
and 2-ch PCM.  
Publication Release Date: May 2009  
Revision A10  
- 3 -  
W567BXXX  
3. PIN DESCRIPTION  
PIN NAME  
RESETB  
OSCI  
I/O  
In  
FUNCTION  
IC reset input, low active.  
In  
Main-clock oscillation input. Mask option to select main-clock type. When  
Ring type is used. Connect to GND via the oscillation resistor.  
OSCO  
Out  
In  
Main-clock oscillation output. Mask option to select main-clock type.  
IP0[7:0] /  
IP0[7:4]  
General input port with pull-high selection. Each 2 input pins can be  
programmed to generate interrupt request and used to release IC from  
STOP mode.  
BP0[7:0]  
I/O  
General input/output pins. When used as output pin, it can be opendrain  
or CMOS type and it can sink 8mA for high-current applications. When  
used as input pin, there may have a pull-high option and generate  
interrupt request to release IC from STOP mode.  
When BP0[7] is used as output pin, it can be the IR transmission carrier  
for IR applications.  
BP1[7:0]  
BP2[7:0]  
I/O  
I/O  
General input/output pins. When used as output pin, it can be opendrain  
or CMOS type. When used as input pin, there may have a pull-high option  
and generate interrupt request to release IC from STOP mode.  
When serial interface is enabled, BP1[6:4] are used as serial interface  
pins.  
General input/output pins. When used as output pin, it can be opendrain  
or CMOS type. When used as input pin, there may have a pull-high option  
and generate interrupt request to release IC from STOP mode.  
OP0[7:0]  
DAC  
Out  
Out  
General output pins. The pins of OP0 are Inverter-type output.  
Current type DAC speaker output.  
TEST  
In  
Test input, internally pulled low. Do not connect during normal operation.  
Positive power supply for P and peripherals.  
VDD  
Power  
Power  
VSS  
Negative power supply for P and peripherals.  
2VDDOSC  
2VSSOSC  
Power Positive power supply for oscillation.  
Power Negative power supply for oscillation.  
2 In order to get a stable oscillating frequency, W567B030~B260 provides these pins for power supply.  
Publication Release Date: May 2009  
Revision A10  
- 4 -  
W567BXXX  
4. BLOCK DIAGRAM  
BP1[7:0] BP0[7:0] BP2[7:0]  
BP1[6:4]  
OSCO  
Timing  
Generator  
IP0[7:0]  
or  
IP0[7:4]  
Timers  
&
HQ generator  
OSCI  
Interrupt  
Controller  
Serial  
Interface  
I/O  
OP0[7:0]  
8 bits uP  
RESETB  
Address/Data Bus  
Data RAM  
Program ROM  
Speaker  
Driver  
LVR  
Mixer  
WDT  
DAC  
5. ELECTRICAL CHARACTERISTICS  
5.1 Absolute Maximum Ratings  
PARAMETER  
Supply Voltage to Ground Potential  
D.C. Voltage on Any Pin to Ground Potential  
Operating Temperature  
RATING  
UNIT  
-0.3 to +7.0  
-0.3 to VDD +0.3  
0 to +70  
V
V
C  
C  
Storage Temperature  
-55 to +150  
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability  
of the device.  
Publication Release Date: May 2009  
- 5 -  
Revision A10  
W567BXXX  
5.2 D.C. Characteristics  
(VDD VSS = 4.5V, FM = 8 MHz, TA = 25C, No Load unless otherwise specified)  
SPEC.  
PARAMETER  
SYM.  
TEST CONDITIONS  
UNIT  
Min.  
2.4  
Typ.  
Max.  
5.5  
FSYS = 4 MHz  
FSYS = 8 MHz  
-
-
V
V
Operating Voltage  
Operating Current  
VDD  
IOP  
3.0  
5.5  
FSYS = FM, normal  
operation  
-
15  
20  
mA  
Standby Current  
Input Low Voltage  
Input High Voltage  
ISB  
VIL  
STOP mode  
All input pins  
-
1
-
2
A  
VSS  
0.3 VDD  
V
VIH  
IOL  
IOH  
IOL  
IOH  
All input pins  
0.7 VDD  
-
VDD  
V
VDD = 4.5V, VOUT = 1.0V  
VDD = 4.5V, VOUT = 2.6V  
VDD = 3V, VOUT = 0.4V  
VDD = 3V, VOUT = 2.6V  
-
-
25  
-12  
12  
-6  
-
-
-
-
mA  
mA  
mA  
mA  
Output Current (BP0)  
8
-4  
Vout = 0.4V, all output  
pins except BP0  
Output Low Current  
Output High Current  
IOL  
IOH  
4
-
-
mA  
mA  
Vout = 2.4V, all output  
pins except BP0  
-4  
-
-2.4  
-4.0  
-3.0  
-5.0  
-3.6  
-6.0  
DAC Full Scale Current  
IDAC  
ILVR  
IIN  
mA  
uA  
uA  
VDD = 4.5V, RL = 100  
Operation Current of  
Low Voltage Reset  
VDD = 4.5V  
60  
Input current  
BPn, Reset  
VIN = 0V, pull high  
resistance = 450K ohm  
-7.5  
-10  
-12.5  
Publication Release Date: May 2009  
Revision A10  
- 6 -  
W567BXXX  
5.3 A.C. Characteristics  
(VDD-VSS = 4.5V, FM = 8 MHz, TA = 25C; No Load unless otherwise specified)  
SPEC.  
PARAMETER  
SYM.  
TEST CONDITIONS  
UNIT  
Min.  
3.6  
Typ.  
Max.  
4.4  
4
8
-
Ring type, *Rosc = 300 K  
Ring type, *Rosc = 150 K  
FSYS = 8 MHz  
Main-Clock  
FM  
MHz  
7.2  
8.8  
Cycle Time  
TCYC  
125  
DC  
nS  
Main-Clock Wake-up  
Stable Time  
TWSM  
-
3
5
mS  
Ring type, R = 300 K  
FMAX - FMIN  
FMIN  
F  
F
Main-Clock Frequency  
Deviation, Ring type  
-
3
-
7.5  
-
%
RESETB Active Width  
TRES  
After FSYS stable  
4
TCYC  
*: Typical ROSC value for each part number should refer to design guide.  
Publication Release Date: May 2009  
Revision A10  
- 7 -  
W567BXXX  
6. APPLICATION CIRCUITS  
6.1 W567B010~B020 (Ring as main system clock)  
VDD  
+
4.7uF  
IP04  
|
IP07  
Battery  
10  
VDDOSC  
0.1uF  
BP00  
|
BP07  
OSCI  
BP10  
|
BP17  
ROSC  
W567B010  
|
W567B020  
VDD  
/RESET  
Reset  
Switch  
0.1uF  
Speaker  
DAC  
8050  
Rs  
VSS  
VSSOSC  
Notes:  
1. The typical value of Rosc is 150 Kfor 8 MHz and 300 Kfor 4 MHz, and should be connected to GND (VSS).  
2. Please refer to design guide to get typical Rosc value for each part number.  
3. The Rs value is suggested in 270~ 1Kto limit too large DAC output current flowing into transistor.  
4. The capacitor, 4.7F, shunts between VDD and GND is necessary as power stability. But the value of  
capacitor is depend on the application.  
5. The above application circuit is for reference only. No warranty for mass production.  
Publication Release Date: May 2009  
- 8 -  
Revision A10  
W567BXXX  
6.2 W567B030~B260 (Ring as main system clock)  
VDD  
+
4.7uF  
IP00  
|
IP07  
Battery  
10  
VDDOSC  
0.1uF  
BP00  
|
BP07  
BP10  
|
BP17  
OSCI  
ROSC  
W567B030  
|
W567B260  
BP20  
|
BP27  
OP00  
|
OP07  
VDD  
Speaker  
8050  
/RESET  
Reset  
Switch  
DAC  
0.1uF  
Rs  
VSSOSC  
VSS  
Notes:  
1. The typical value of Rosc is 150 Kfor 8 MHz and 300 Kfor 4 MHz, and should be connected to GND (VSS).  
2. Please refer to design guide to get typical Rosc value for each part number.  
3. For W567B030~B260, VSSOSC should be connected to VSS; VDDOSC should be connected to VDD in PCB layout.  
4. The Rs value is suggested in 270~ 1Kto limit too large DAC output current flowing into transistor.  
5. The 10and 0.1uF between VDD, VDDOSC and GND are optional to filter power noise.  
6. The capacitor, 4.7uF, shunts between VDD and GND is necessary as power stability. But the value of capacitor is  
depend on the application.  
7. The above application circuit is for reference only. No warranty for mass production.  
Publication Release Date: May 2009  
- 9 -  
Revision A10  
W567BXXX  
8.  
6.3 W567B010~B020 (Crystal as main system clock)  
VDD  
+
4.7uF  
IP04  
Battery  
|
IP07  
10  
VDDOSC  
0.1uF  
BP00  
|
BP07  
W567B010  
|
OSCI  
4~8MHz Crystal  
(for system clock)  
BP10  
|
BP17  
W567B020  
OSCO  
VDD  
/RESET  
Reset  
Switch  
0.1uF  
Speaker  
DAC  
8050  
Rs  
VSS  
VSSOSC  
Notes:  
1. The Rs value is suggested in 270~ 1Kto limit too large DAC output current flowing into transistor.  
2. The capacitor, 4.7F, shunts between VDD and GND is necessary as power stability. But the value of  
capacitor is depend on the application.  
3. The above application circuit is for reference only. No warranty for mass production.  
Publication Release Date: May 2009  
Revision A10  
- 10 -  
W567BXXX  
6.4 W567B030~B260 (Crystal as main system clock)  
VDD  
+
4.7uF  
IP00  
|
IP07  
Battery  
10  
VDDOSC  
0.1uF  
BP00  
|
BP07  
BP10  
|
BP17  
4~8MHz Crystal  
(for system clock)  
OSCI  
W567B030  
|
W567B260  
BP20  
|
BP27  
OSCO  
OP00  
|
OP07  
VDD  
Speaker  
/RESET  
Reset  
Switch  
DAC  
0.1uF  
8050  
Rs  
VSS  
VSSOSC  
Notes:  
1. For W567B030~B260, VSSOSC should be connected to VSS; VDDOSC should be connected to VDD in PCB layout.  
2. The Rs value is suggested in 270~ 1Kto limit too large DAC output current flowing into transistor.  
3. The 10and 0.1uF between VDD, VDDOSC and GND are optional to filter power noise.  
4. The capacitor, 4.7uF, shunts between VDD and GND is necessary as power stability. But the value of capacitor is  
depend on the application.  
5. The above application circuit is for reference only. No warranty for mass production.  
Publication Release Date: May 2009  
- 11 -  
Revision A10  
W567BXXX  
7. REVISION HISTORY  
VERSION  
DATE  
REASONS FOR CHANGE  
A1  
Oct 2003  
Preliminary release.  
Rename VDD1/VSS1 to VDDOSC/VSSOSC in the Pin Description  
Update application circuit and notes.  
A2  
Nov 2003  
Change the name Low-Voltage-Detect (LVD) to Low-Voltage-Reset (LVR).  
Modify Pull High Resistance as 450K in the DC Characteristics.  
A3  
A4  
A5  
Mar 2004  
Jun 2004  
Jul 2004  
Add the operation current of Low-Voltage-Reset.  
Add W567B010~020 VDDOSC pin and circuit in application circuit  
Create W567B010~B020 crystal mode application circuit  
Create W567B030~B260 crystal mode application circuit  
Add Disclaimer  
A6  
A7  
Aug 2005  
Jan 2006  
Revised the BP0 output current  
Revised up to 4 speech synthesis channel  
A8  
Modify logo  
Nov 2007  
Jul 2008  
May 2009  
A9  
Change logo  
A10  
Correct the value of input current  
Publication Release Date: May 2009  
- 12 -  
Revision A10  
W567BXXX  
Important Notice  
Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any  
malfunction or failure of which may cause loss of human life, bodily injury or severe property  
damage. Such applications are deemed, “Insecure Usage”.  
Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic  
energy control instruments, airplane or spaceship instruments, the control or operation of  
dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all  
types of safety devices, and other applications intended to support or sustain life.  
All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay  
claims to Nuvoton as a result of customer’s Insecure Usage, customer shall indemnify the  
damages and liabilities thus incurred by Nuvoton.  
Publication Release Date: May 2009  
- 13 -  
Revision A10  

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