2N5064T/R [NXP]

Silicon Controlled Rectifier, 0.8 A, 200 V, SCR, TO-92;
2N5064T/R
型号: 2N5064T/R
厂家: NXP    NXP
描述:

Silicon Controlled Rectifier, 0.8 A, 200 V, SCR, TO-92

栅 栅极
文件: 总6页 (文件大小:79K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DISCRETE SEMICONDUCTORSꢃ  
ꢁꢂꢁ
ꢅꢆꢆꢂ  
2N5064  
Thyristor  
sensitive gate  
Product specification  
October 1997  
ꢇꢈꢉ Semiconductors  
Product specification  
Thyristor  
sensitive gate  
2N5064  
GENERAL DESCRIPTION  
QUICK REFERENCE DATA  
Glass passivated sensitive gate  
SYMBOL PARAMETER  
MAX. UNIT  
thyristor in  
intended for use in general purpose  
switching and phase control  
applications. This device is intended  
to be interfaced directly to  
microcontrollers, logic integreated  
circuits and other low power gate  
trigger circuits.  
a
plastic envelope,  
VDRM  
VRRM  
IT(AV)  
IT(RMS)  
ITSM  
,
Repetitive peak off-state voltages  
200  
V
Average on-state current  
RMS on-state current  
Non-repetitive peak on-state current  
0.5  
0.8  
10  
A
A
A
PINNING - TO92 variant  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
anode  
a
k
2
gate  
3
cathode  
g
3
2 1  
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134).  
SYMBOL PARAMETER  
CONDITIONS  
MIN. MAX. UNIT  
VDRM, VRRM Repetitive peak off-state  
voltages  
-
200  
V
IT(AV)  
Average on-state current half sine wave  
Tc 67 ˚C  
-
-
-
-
0.51  
0.255  
0.8  
A
A
A
A
Tc 102 ˚C  
all conduction angles  
IT(RMS)  
ITRM  
RMS on-state current  
Repetitive peak on-state  
current  
8
ITSM  
Non-repetitive peak  
on-state current  
half sine wave; Ta = 25 ˚C prior to surge;  
t = 8.3 ms  
t = 8.3 ms  
Ta = 25˚C, tp = 300μs; f = 120 Hz  
-
10  
A
I2t  
IGM  
VGM  
VRGM  
PGM  
PG(AV)  
Tstg  
Tj  
I2t for fusing  
-
-
-
-
-
0.4  
1
5
A2s  
A
V
Peak gate current  
Peak gate voltage  
Peak reverse gate voltage  
Peak gate power  
Average gate power  
Storage temperature  
Operating junction  
temperature  
5
V
Ta = 25˚C  
Ta = 25˚C, over any 16 ms period  
0.1  
0.01  
150  
125  
W
W
˚C  
˚C  
-
-65  
-65  
October 1997  
1
Rev 1.200  
ꢀꢁꢂ Semiconductors  
Product specification  
Thyristor  
sensitive gate  
2N5064  
THERMAL RESISTANCES  
SYMBOL PARAMETER  
CONDITIONS  
see note:1  
MIN. TYP. MAX. UNIT  
Rth j-c  
Thermal resistance  
junction to case  
-
-
75  
K/W  
Rth j-a  
Thermal resistance  
junction to ambient  
-
200  
-
K/W  
STATIC CHARACTERISTICS  
Tc = 25 ˚C, RGK = 1 kΩ unless otherwise stated  
SYMBOL PARAMETER CONDITIONS  
MIN. TYP. MAX. UNIT  
IGT  
Gate trigger current  
Tc = 25 ˚C  
Tc = -65 ˚C  
-
-
-
-
200  
350  
μA  
μA  
VD = VDRM(max); RL = 100 Ω; gate open  
circuit  
IL  
IH  
VT  
VGT  
Latching current  
Holding current  
On-state voltage  
Gate trigger voltage  
VD = 12 V; RGK = 1 kΩ  
VD = 12 V; RGK = 1 kΩ  
IT = 1.2 A peak; tp = 300 μs; δ ≤ 0.01  
Tj = 25 ˚C  
Tj = -65 ˚C  
Tj = 125 ˚C  
-
-
-
-
-
-
-
-
-
-
6
5
1.7  
0.8  
1.2  
-
mA  
mA  
V
V
V
-
0.1  
V
VD = VDRM(max); RL = 100 Ω; gate open  
circuit  
ID, IR  
Off-state leakage current VD = VDRM(max); VR = VRRM(max)  
Tj = 25 ˚C  
Tj = 125 ˚C  
-
-
-
-
10  
50  
μA  
μA  
DYNAMIC CHARACTERISTICS  
Tc = 25 ˚C, RGK = 1 kΩ unless otherwise stated  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
dVD/dt  
Critical rate of rise of  
VDM = 67% VDRM(max); Tj = 125 ˚C;  
exponential waveform; RGK = 1 kΩ  
ITM = 2 A; VD = VDRM(max); IG = 10 mA;  
dIG/dt = 0.1 A/μs  
VDM = 67% VDRM(max); Tj = 125 ˚C;  
ITM = 1.6 A; VR = 35 V; dITM/dt = 30 A/μs;  
dVD/dt = 2 V/μs; RGK = 1 kΩ  
-
-
-
25  
2
-
-
-
V/μs  
μs  
off-state voltage  
Gate controlled turn-on  
time  
Circuit commutated  
turn-off time  
tgt  
tq  
100  
μs  
1 This measurement is made with the case mounted "flat side down" on a heatsink and held in position by means of  
a metal clamp over the curved surface.  
October 1997  
2
Rev 1.200  
ꢀꢁꢂ Semiconductors  
Product specification  
Thyristor  
sensitive gate  
2N5064  
MECHANICAL DATA  
Dimensions in mm  
Net Mass: 0.2 g  
2.54  
0.66  
0.56  
1.6  
4.2 max  
4.8 max  
5.2 max  
2.5 max  
12.7 min  
0.48  
0.40  
0.40  
min  
3 2 1  
Fig.1. TO92; plastic envelope.  
Notes  
1. Epoxy meets UL94 V0 at 1/8".  
October 1997  
3
Rev 1.200  
NXP Semiconductors  
Legal information  
DATA SHEET STATUS  
DOCUMENT  
STATUS(1)  
PRODUCT  
STATUS(2)  
DEFINITION  
Objective data sheet  
Development  
This document contains data from the objective specification for product  
development.  
Preliminary data sheet  
Product data sheet  
Qualification  
Production  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Notes  
1. Please consult the most recently issued document before initiating or completing a design.  
2. The product status of device(s) described in this document may have changed since this document was published  
and may differ in case of multiple devices. The latest product status information is available on the Internet at  
URL http://www.nxp.com.  
DEFINITIONS  
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reserves the right to make changes to information  
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Semiconductors and customer have explicitly agreed  
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agreement be valid in which the NXP Semiconductors  
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those described in the Product data sheet.  
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not designed, authorized or warranted to be suitable for  
use in life support, life-critical or safety-critical systems or  
equipment, nor in applications where failure or malfunction  
of an NXP Semiconductors product can reasonably be  
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Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
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Limited warranty and liability Information in this  
document is believed to be accurate and reliable.  
However, NXP Semiconductors does not give any  
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Applications Applications that are described herein for  
any of these products are for illustrative purposes only.  
NXP Semiconductors makes no representation or  
warranty that such applications will be suitable for the  
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In no event shall NXP Semiconductors be liable for any  
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accepts no liability for any assistance with applications or  
customer product design. It is customer’s sole  
responsibility to determine whether the NXP  
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for any reason whatsoever, NXP Semiconductors’  
aggregate and cumulative liability towards customer for  
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sale of NXP Semiconductors.  
Semiconductors product is suitable and fit for the  
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for the planned application and use of customer’s third  
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Legal information  
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Quick reference data The Quick reference data is an  
extract of the product data given in the Limiting values and  
Characteristics sections of this document, and as such is  
not complete, exhaustive or legally binding.  
Limiting values Stress above one or more limiting  
values (as defined in the Absolute Maximum Ratings  
System of IEC 60134) will cause permanent damage to  
the device. Limiting values are stress ratings only and  
(proper) operation of the device at these or any other  
conditions above those given in the Recommended  
operating conditions section (if present) or the  
Characteristics sections of this document is not warranted.  
Constant or repeated exposure to limiting values will  
permanently and irreversibly affect the quality and  
reliability of the device.  
Non-automotive qualified products Unless this data  
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In the event that customer uses the product for design-in  
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Semiconductors’ product specifications.  
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This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions  
and disclaimers. No changes were made to the content, except for the legal definitions and disclaimers.  
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© NXP B.V. 2011  
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Printed in The Netherlands  

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