74ABT16543BB,518 [NXP]
IC ABT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PQFP52, 10 X 10 MM, 2 MM HEIGHT, PLASTIC, MS-022, SOT-379-2, QFP-52, Bus Driver/Transceiver;
| 型号： | 74ABT16543BB,518 |
| 厂家： | 
NXP |
| 描述： | IC ABT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PQFP52, 10 X 10 MM, 2 MM HEIGHT, PLASTIC, MS-022, SOT-379-2, QFP-52, Bus Driver/Transceiver 信息通信管理 输出元件 逻辑集成电路 |
| 文件： | 总17页 (文件大小：98K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74ABT16543
16-bit latched transceiver with dual enable; 3-state
Rev. 04 — 26 May 2005
Product data sheet
1. General description
The 74ABT16543 high-performance BiCMOS device combines low static and dynamic
power dissipation with high speed and high output drive.
The 74ABT16543 16-bit registered transceiver contains two sets of D-type latches for
temporary storage of data flowing in either direction. Separate latch enable (nLEAB,
nLEBA) and output enable (nOEAB, nOEBA) inputs are provided for each register to
permit independent control of data transfer in either direction. The outputs are guaranteed
to sink 64 mA.
2. Features
■ Two 8-bit octal transceivers with D-type latch
■ Live insertion and extraction permitted
■ Power-up 3-state
■ Power-up reset
■ Multiple VCC and GND pins minimize switching noise
■ Back-to-back registers for storage
■ Separate controls for data flow in each direction
■ Output capability: +64 mA and −32 mA
■ Latch-up protection exceeds 500 mA per JEDEC Std 78
■ ESD protection:
◆ MIL STD 883 method 3015: exceeds 2000 V
◆ Machine model: exceeds 200 V
3. Quick reference data
Table 1:
Quick reference data
Tamb = 25 °C; GND = 0 V
Symbol Parameter
Conditions
Min
Typ
2.5
2.2
3
Max Unit
tPLH
tPHL
CI
propagation delay nAx to nBx CL = 50 pF; VCC = 5 V
propagation delay nAx to nBx CL = 50 pF; VCC = 5 V
-
-
-
-
-
-
-
-
ns
ns
pF
pF
input capacitance
I/O capacitance
VI = 0 V or VCC
CI/O
ICC
VO = 0 V or VCC; 3-state
7
quiescent supply current
VCC = 5.5 V; VI = GND
or VCC
outputs 3-state
-
-
0.55
9
-
-
mA
mA
outputs LOW-state
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
4. Ordering information
Table 2:
Ordering information
Type number
Package
Temperature range Name
Description
Version
74ABT16543BB
−40 °C to +85 °C
QFP52
plastic quad flat package; 52 leads (lead length
SOT379-2
1.6 mm); body width 10 × 10 × 2 mm
5. Functional diagram
50 51
1
2
3
5
6
7
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
1EAB
49
44
48
45
1EBA
1OEAB
1OEBA
47
46
1LEAB
1LEBA
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
42 41 39 38 37 36 35 34
8
9
10 11 12 13 15 16
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
2EAB
18
23
19
22
2EBA
2OEAB
2OEBA
20
21
2LEAB
2LEBA
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
33 32 31 29 28 27 25 24
001aad030
Fig 1. Logic symbol
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
2 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
46
44
45
47
49
48
21
1EN3
G1
7EN9
G7
1OEBA
1EBA
2OEBA
2EBA
23
22
20
18
19
1LEBA
1OEAB
1EAB
2LEBA
2OEAB
2EAB
1C5
2EN4
G2
7C11
8EN10
G8
8C12
1LEAB
2LEAB
2C6
50
42
8
33
3
5D
9
11D
10
1A0
1B0
2A0
2B0
6D
12D
4
51
1
41
39
38
37
36
35
34
9
32
31
29
28
27
25
24
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2B1
2B2
2B3
2B4
2B5
2B6
2B7
10
11
12
13
15
16
2
3
5
6
7
001aad032
Fig 2. IEC logic symbol
nOEBA
nEBA
nLEBA
nOEAB
nEAB
nLEAB
LE
D
nA1
nB1
LE
D
8 IDENTICAL
CHANNELS
001aac924
to 7 other channels
Fig 3. Logic diagram
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
3 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
6. Pinning information
6.1 Pinning
1
2
39
38
37
36
35
34
33
32
31
30
29
28
27
1A2
1A3
1A4
GND
1A5
1A6
1A7
2A0
2A1
2A2
2A3
2A4
2A5
1B2
1B3
1B4
1B5
1B6
1B7
2B0
2B1
2B2
GND
2B3
2B4
2B5
3
4
5
6
7
16543
8
9
10
11
12
13
001aad034
Fig 4. Pin configuration QFP52
6.2 Pin description
Table 3:
Pin description
Symbol
1A2
1A3
1A4
GND
1A5
1A6
1A7
2A0
2A1
2A2
2A3
2A4
2A5
VCC
2A6
Pin
1
Description
1 data input or output 2; A-side
1 data input or output 3; A-side
1 data input or output 4; A-side
ground (0 V)
2
3
4
5
1 data input or output 5; A-side
1 data input or output 6; A-side
1 data input or output 7; A-side
2 data input or output 0; A-side
2 data input or output 1; A-side
2 data input or output 2; A-side
2 data input or output 3; A-side
2 data input or output 4; A-side
2 data input or output 5; A-side
supply voltage
6
7
8
9
10
11
12
13
14
15
2 data input or output 6; A-side
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
4 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
Table 3:
Symbol
2A7
Pin description …continued
Description
Pin
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
2 data input or output 7; A-side
ground (0 V)
GND
2EAB
2LEAB
2OEAB
2OEBA
2LEBA
2EBA
2B7
A-to-B output enable input (active LOW)
A-to-B latch enable input (active LOW)
A-to-B enable input (active LOW)
B-to-A output enable input (active LOW)
B-to-A latch enable input (active LOW)
B-to-A enable input (active LOW)
2 data input or output 7; B-side
2 data input or output 6; B-side
supply voltage
2B6
VCC
2B5
2 data input or output 5; B-side
2 data input or output 4; B-side
2 data input or output 3; B-side
ground (0 V)
2B4
2B3
GND
2B2
2 data input or output 2; B-side
2 data input or output 1; B-side
2 data input or output 0; B-side
1 data input or output 7; B-side
1 data input or output 6; B-side
1 data input or output 5; B-side
1 data input or output 4; B-side
1 data input or output 3; B-side
1 data input or output 2; B-side
positive supply voltage
2B1
2B0
1B7
1B6
1B5
1B4
1B3
1B2
VCC
1B1
1 data input or output 1; B-side
1 data input or output 0; B-side
ground (0 V)
1B0
GND
1EBA
1LEBA
1OEBA
1OEAB
1LEAB
1EAB
1A0
B-to-A output enable input (active LOW)
B-to-A latch enable input (active LOW)
B-to-A enable input (active LOW)
A-to-B output enable input (active LOW)
A-to-B latch enable input (active LOW)
A-to-B enable input (active LOW)
1 data input or output 0; A-side
1 data input or output 1; A-side
supply voltage
1A1
VCC
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
5 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
7. Functional description
7.1 Function table
Table 4:
Input
Function table[1]
Output
Status
nOEAB or
nOEBA
nEAB or
nEBA
nLEAB or
nLEBA
nAx or nBx nBx or nAx
H
X
L
L
L
L
L
L
L
X
H
↑
X
X
L
L
↑
X
X
h
I
Z
disabled
Z
disabled
Z
disabled + latch
disabled + latch
latch + display
latch + display
transparent
transparent
hold
↑
Z
L
L
L
L
L
h
I
H
L
↑
L
L
H
H
L
X
H
L
NC
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH transition of nLEAB, nLEBA, nEAB or
nEBA;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH transition of nLEAB, nLEBA, nEAB or
nEBA;
X = don t care;
Z = high-impedance off state;
↑ = LOW-to-HIGH transition;
NC= no change.
7.2 Description
The 74ABT16543 contains two sets of eight D-type latches, with separate control pins for
each set. Using data flow from A to B as an example, when the A-to-B enable (nEAB)
input and the A-to-B latch enable (nLEAB) input are LOW the A-to-B path is transparent.
A subsequent LOW-to-HIGH transition of the nLEAB signal puts the A data into the
latches where it is stored and the B outputs no longer change with the A inputs. With
nEAB and nOEAB both LOW, the 3-state B output buffers are active and display the data
present at the outputs of the A latches.
Control of data flow from B to A is similar, but using the nEBA, nLEBA, and nOEBA inputs.
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
6 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
8. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter
Conditions
Min
−0.5
−1.2
−0.5
Max
+7.0
+7.0
+5.5
Unit
V
VCC
VI
supply voltage
input voltage
output voltage
[1]
[1]
V
VO
output in OFF-state or
HIGH-state
V
IIK
IOK
IO
input diode current
output diode current
output current
VI < 0 V
-
−18
mA
mA
mA
mA
°C
VO < 0 V
-
−50
output in LOW-state
output in HIGH-state
-
128
-
−64
[2]
Tj
junction temperature
storage temperature
-
+150
+150
Tstg
−65
°C
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal
environment can create junction temperatures which are detrimental to reliability.
9. Recommended operating conditions
Table 6:
Recommended operating conditions
Symbol Parameter
Conditions
Min
4.5
0
Typ
Max
5.5
VCC
-
Unit
V
VCC
VI
supply voltage
-
-
-
-
-
-
-
-
input voltage
V
VIH
HIGH-level input voltage
LOW-level input voltage
HIGH-level output current
LOW-level output current
input transition rise or fall rate
ambient temperature
2.0
-
V
VIL
0.8
−32
64
V
IOH
-
mA
mA
ns/V
°C
IOL
-
∆t/∆V
Tamb
0
10
in free air
−40
+85
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
7 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
10. Static characteristics
Table 7:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
Min
Typ
Max Unit
Tamb = 25 °C
VIK
input clamp voltage
VCC = 4.5 V; IIK = −18 mA
VCC = 4.5 V; VI = VIL or VIH
IOH = −3 mA
-
-
−1.2
V
VOH
HIGH-level output voltage
2.5
2.0
2.9
2.4
-
-
V
V
IOH = −32 mA
VCC = 5.0 V; VI = VIL or VIH
IOH = −3 mA
3.0
3.4
-
V
V
V
VOL
VRST
ILI
LOW-level output voltage
power-up output voltage
VCC = 4.5 V; VI = VIL or VIH; IOL = 64 mA
VCC = 5.5 V; IO = 1 mA; VI = GND or VCC
VCC = 5.5 V; VI = GND or 5.5 V
-
-
-
0.36 0.55
0.13 0.55
[1]
[2]
input leakage current of
control pins
±0.01 ±1.0 µA
IOFF
power-off leakage current
VCC = 0.0 V; VO or VI ≤ 4.5 V
-
-
±2.0 ±100 µA
IPU, IPD power-up or power-down
down 3-state output current
VCC = 2.1 V; VO = 0.0 V or VCC; VI = GND or
±1.0 ±50
µA
VCC; VnOEAB and VnOEBA = don’t care
IOZ
3-state output current
VCC = 5.5 V; VI = VIL or VIH
outputs HIGH-state at VO = 5.5 V
outputs LOW-state at VO = 0.0 V
-
1.0
−1.0 −10
1.0 50
10
µA
µA
µA
-
ICEX
IO
output HIGH leakage current VCC = 5.5 V; VO = 5.5 V; VI = GND or VCC
-
[3]
output current
VCC = 5.5 V; VO = 2.5 V
VI = 0 V or VCC
−50
−100 −200 mA
CI
input capacitance
I/O capacitance
-
-
3
7
-
-
pF
pF
CI/O
ICC
VO = 0 V or VCC; 3-state
VCC = 5.5 V; VI = GND or VCC
outputs HIGH-state
outputs LOW-state
quiescent supply current
-
-
-
-
0.55
9
2
mA
mA
mA
µA
19
2
outputs 3-state
0.55
5.0
[4]
∆ICC
additional supply current per VCC = 5.5 V; one input at 3.4 V; other inputs
50
input pin
at VCC or GND
Tamb = −40 °C to +85 °C
VIK
input clamp voltage
VCC = 4.5 V; IIK = −18 mA
VCC = 4.5 V; VI = VIL or VIH
IOH = −3 mA
-
-
−1.2
V
VOH
HIGH-level output voltage
2.5
2.0
-
-
-
-
V
V
IOH = −32 mA
VCC = 5.0 V; VI = VIL or VIH
IOH = −3 mA
3.0
-
-
V
V
V
VOL
VRST
ILI
LOW-level output voltage
power-up output voltage
VCC = 4.5 V; VI = VIL or VIH; IOL = 64 mA
VCC = 5.5 V; IO = 1 mA; VI = GND or VCC
VCC = 5.5 V; VI = GND or 5.5 V
0.55
0.55
[1]
-
-
-
-
input leakage current of
control pins
±1.0 µA
IOFF
power-off leakage current
VCC = 0.0 V; VO or VI ≤ 4.5 V
-
-
±100 µA
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
8 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
Table 7:
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
Min
Typ
Max Unit
[2]
IPU, IPD power-up or power-down
down 3-state output current
VCC = 2.1 V; VO = 0.0 V or VCC; VI = GND or
-
-
±50
µA
VCC; VnOEAB and VnOEBA = don’t care
IOZ
3-state output current
VCC = 5.5 V; VI = VIL or VIH
outputs HIGH-state at VO = 5.5 V
outputs LOW-state at VO = 0.0 V
-
-
-
-
-
10
µA
µA
µA
-
−10
50
ICEX
IO
output HIGH leakage current VCC = 5.5 V; VO = 5.5 V; VI = GND or VCC
-
[3]
output current
VCC = 5.5 V; VO = 2.5 V
VCC = 5.5 V; VI = GND or VCC
outputs HIGH-state
−50
−200 mA
ICC
quiescent supply current
-
-
-
-
-
-
-
-
2
mA
mA
mA
µA
outputs LOW-state
19
2
outputs 3-state
[4]
∆ICC
additional supply current per VCC = 5.5 V; one input at 3.4 V; other inputs
input pin at VCC or GND
50
[1] For valid test results, data must not be loaded into the latches after applying the power.
[2] This parameter is valid for any VCC between 0 V and 2.1 V, with a transition time of up to 10 ms; From VCC = 2.1 V to VCC = 5 V ± 10 %
a transition time of up to 100 µs is permitted.
[3] Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
[4] This is the increase in supply current for each input at 3.4 V.
11. Dynamic characteristics
Table 8:
Dynamic characteristics
GND = 0 V; for test circuit see Figure 10.
Symbol Parameter
Conditions
Min
Typ
Max Unit
Tamb = 25 °C; VCC = 5.0 V
tPLH
tPHL
tPZH
tPZL
tPHZ
propagation delay
nAx to nBx, nBx to nAx
nLEBA to nAx, nLEAB to nBx
propagation delay
see Figure 6
see Figure 5
1.0
1.0
2.5
3.1
3.3
4.3
ns
ns
nAx to nBx, nBx to nAx
nLEBA to nAx, nLEAB to nBx
output enable time
see Figure 6
see Figure 5
see Figure 7
1.0
1.2
2.2
3.0
4.4
4.8
ns
ns
nOEBA to nAx, nOEAB to nBx
nEBA to nAx, nEAB to nBx
output enable time
1.0
1.0
3.3
3.4
4.3
4.9
ns
ns
see Figure 8
see Figure 7
nOEBA to nAx, nOEAB to nBx
nEBA to nAx, nEAB to nBx
output disable time
1.1
1.2
3.3
3.4
5.9
6.5
ns
ns
nOEBA to nAx, nOEAB to nBx
nEBA to nAx, nEAB to nBx
1.9
2.0
3.5
3.4
5.0
5.6
ns
ns
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
9 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
Table 8:
Dynamic characteristics …continued
GND = 0 V; for test circuit see Figure 10.
Symbol Parameter
Conditions
Min
Typ
Max Unit
tPLZ
tsu(H)
tsu(L)
th(H)
th(L)
tWL
output disable time
see Figure 8
nOEBA to nAx, nOEAB to nBx
nEBA to nAx, nEAB to nBx
set-up time HIGH
1.6
1.7
2.6
2.6
4.2
5.1
ns
ns
see Figure 9
see Figure 9
see Figure 9
see Figure 9
see Figure 9
nAx to nLEAB, nBx to nLEBA
nAx to nEAB, nBx to nEBA
set-up time LOW
1.5
1.5
0.4
0.2
-
-
ns
ns
nAx to nLEAB, nBx to nLEBA
nAx to nEAB, nBx to nEBA
hold time HIGH
+3.5 −0.1
+3.5 −0.3
-
-
ns
ns
nAx to nLEAB, nBx to nLEBA
nAx to nEAB, nBx to nEBA
hold time LOW
1.5
1.5
0.2
0.3
-
-
ns
ns
nAx to nLEAB, nBx to nLEBA
nAx to nEAB, nBx to nEBA
pulse width LOW
+2.0 −0.3
+2.0 −0.2
-
-
-
ns
ns
ns
4.0
3.1
Tamb = −40 °C to +85 °C; VCC = 5.0 V ± 0.5 V
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tsu(H)
propagation delay
nAx to nBx, nBx to nAx
nLEBA to nAx, nLEAB to nBx
propagation delay
see Figure 6
see Figure 5
1.0
1.0
-
-
3.8
5.2
ns
ns
nAx to nBx, nBx to nAx
nLEBA to nAx, nLEAB to nBx
output enable time
see Figure 6
see Figure 5
see Figure 7
1.0
1.2
-
-
5.1
5.6
ns
ns
nOEBA to nAx, nOEAB to nBx
nEBA to nAx, nEAB to nBx
output enable time
1.0
1.0
-
-
5.2
6.2
ns
ns
see Figure 8
see Figure 7
see Figure 8
see Figure 9
nOEBA to nAx, nOEAB to nBx
nEBA to nAx, nEAB to nBx
output disable time
1.1
1.2
-
-
7.0
7.8
ns
ns
nOEBA to nAx, nOEAB to nBx
nEBA to nAx, nEAB to nBx
output disable time
1.9
2.0
-
-
5.7
6.6
ns
ns
nOEBA to nAx, nOEAB to nBx
nEBA to nAx, nEAB to nBx
set-up time HIGH
1.6
1.7
-
-
4.6
5.4
ns
ns
nAx to nLEAB, nBx to nLEBA
nAx to nEAB, nBx to nEBA
1.5
1.5
-
-
-
-
ns
ns
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
10 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
Table 8:
Dynamic characteristics …continued
GND = 0 V; for test circuit see Figure 10.
Symbol Parameter
Conditions
Min
Typ
Max Unit
tsu(L)
th(H)
th(L)
tWL
set-up time LOW
see Figure 9
nAx to nLEAB, nBx to nLEBA
nAx to nEAB, nBx to nEBA
hold time HIGH
3.5
3.5
-
-
-
-
ns
ns
see Figure 9
see Figure 9
see Figure 9
nAx to nLEAB, nBx to nLEBA
nAx to nEAB, nBx to nEBA
hold time LOW
1.5
1.5
-
-
-
-
ns
ns
nAx to nLEAB, nBx to nLEBA
nAx to nEAB, nBx to nEBA
pulse width LOW
2.0
2.0
4.0
-
-
-
-
-
-
ns
ns
ns
12. Waveforms
3.0 V
nLEAB or nLEBA
GND
V
V
M
M
t
t
PLH
PHL
V
OH
nAx or nBx
V
M
V
M
V
OL
001aac925
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 5. Inverting input to output propagation delay
3.0 V
nAx or nBx
GND
V
M
V
M
t
t
PHL
PLH
V
OH
nBx or nAx
V
V
M
M
V
OL
001aac926
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 6. Non-inverting input to output propagation delay
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
11 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
3.0 V
nOEAB, nOEBA,
V
V
M
M
t
nEAB, nEBA
GND
t
PZH
PHZ
V
OH
V
− 0.3 V
OH
nAx or nBx output
V
M
V
OL
001aac929
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 7. 3-state output enable time to HIGH-level and output disable time from HIGH-level
state
3.0 V
nOEAB, nOEBA,
V
M
V
M
nEAB, nEBA
GND
t
t
PLZ
PZL
V
OH
nAx or nBx output
V
M
V
OL
+ 0.3 V
V
OL
001aac928
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 8. 3-state output enable time to LOW-level and output disable time from LOW-level
state
3.0 V
V
V
V
V
M
nAx, nBx
GND
M
M
M
t
t
t
t
h(L)
su(H)
h(H)
su(L)
t
WL
3.0 V
nLEAB, nLEBA,
V
V
M
M
nEAB, nEBA
GND
001aac927
VM = 1.5 V.
The shaded areas indicate when the input is permitted to change for predictable output
performance.
Fig 9. Data set-up and hold times and latch enable pulse width
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
12 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
t
W
V
I
90 %
90 %
negative
pulse
V
V
M
M
10 %
0 V
t
(t )
f
t
(t )
TLH r
THL
t
(t )
t
(t )
THL f
TLH
r
V
I
90 %
positive
pulse
V
M
V
M
10 %
10 %
0 V
t
W
001aac221
VM = 1.5 V.
a. Input pulse definition
V
EXT
V
CC
R
L
V
V
O
I
PULSE
GENERATOR
DUT
C
L
R
L
R
T
mna616
Test data is given in Table 9.
Definitions test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = Test voltage for switching times.
b. Test circuit
Fig 10. Load circuitry for switching times
Table 9:
Input
VI
Test data
Load
CL
VEXT
fi
tW
tr, tf
RL
tPHZ, tPZH tPLZ, tPZL tPLH, tPHL
3.0 V
1 MHz
500 ns
≤ 2.5 ns 50 pF
500 Ω
open
7.0 V
open
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
13 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
13. Package outline
QFP52: plastic quad flat package; 52 leads (lead length 1.6 mm); body 10 x 10 x 2 mm
SOT379-2
y
X
A
27
39
40
26
Z
E
e
H
A
E
2
E
A
(A )
3
A
1
w M
p
θ
b
L
p
pin 1 index
L
14
52
detail X
13
1
v
M
A
Z
D
e
w M
b
p
D
B
H
v
M
B
D
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.25 2.2
0.10 1.8
0.40 0.23 10.1 10.1
0.22 0.11 9.9 9.9
13.45 13.45
12.95 12.95
1.03
0.73
1.31 1.31
0.90 0.90
mm
2.45
0.25
0.65
1.6
0.2 0.13 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-11-03
03-02-25
SOT379-2
MS-022
Fig 11. Package outline SOT379-2 (QFP52)
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
14 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
14. Revision history
Table 10: Revision history
Document ID
74ABT16543_4
Modifications:
Release date Data sheet status
20050526 Product data sheet
Change notice Doc. number
Supersedes
-
9397 750 15046 74ABT16543_3
• The format of this data sheet has been redesigned to comply with the new presentation and
information standard of Philips Semiconductors.
• Section 2 “Features”: Changed JEDEC Std 17 to JEDEC Std 78
• QFP52 package information added to and (T)SSOP56 packages removed from Section 4
“Ordering information”, Section 5 “Functional diagram”, Section 6 “Pinning information” and
Section 13 “Package outline”
74ABT16543_3
20020403
Product data sheet
-
9397 750 09692
-
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
15 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
15. Data sheet status
Level Data sheet status[1] Product status[2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
16. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
18. Trademarks
Notice — All referenced brands, product names, service names and
17. Disclaimers
trademarks are the property of their respective owners.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
19. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 15046
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 26 May 2005
16 of 17
74ABT16543
Philips Semiconductors
16-bit latched transceiver with dual enable; 3-state
20. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7
7.1
7.2
Functional description . . . . . . . . . . . . . . . . . . . 6
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7
Recommended operating conditions. . . . . . . . 7
Static characteristics. . . . . . . . . . . . . . . . . . . . . 8
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 16
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Contact information . . . . . . . . . . . . . . . . . . . . 16
9
10
11
12
13
14
15
16
17
18
19
© Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 26 May 2005
Document number: 9397 750 15046
Published in The Netherlands
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