74ABT16827ADGG,112_技术文档

INTEGRATED CIRCUITS

74ABT16827A

74ABTH16827A

20-bit buffer/line driver, non-inverting

(3-State)

Product specification

2002 Dec 17

Supersedes data of 1998 Feb 27

Philips

Semiconductors

Philips Semiconductors

Product data

74ABT16827A

74ABTH16827A

20-bit buffer/line driver, non-inverting (3-State)

FEATURES

DESCRIPTION

The 74ABT16827A high-performance BiCMOS device combines

low static and dynamic power dissipation with high speed and high

output drive.

• Multiple V and GND pins minimize switching noise

CC

• Live insertion/extraction permitted

• 3-State output buffers

• Power-up 3-State

• 74ABTH16827A incorporates bus-hold data inputs which

eliminate the need for external pull-up resistors to hold unused

inputs

The 74ABT16827A 20-bit buffers provide high performance bus

interface buffering for wide data/address paths or buses carrying

parity. They have NOR Output Enables (nOE1, nOE2) for maximum

control flexibility.

Two options are available, 74ABT16827A which does not have the

bus-hold feature and 74ABTH16827A which incorporates the

bus-hold feature.

• Output capability: +64 mA / –32 mA

• Latch-up protection exceeds 500 mA per Jedec Std 17

• ESD protection exceeds 2000 V per MIL STD 883 Method 3015

and 200 V per Machine Model

QUICK REFERENCE DATA

CONDITIONS

= 25 °C; GND = 0 V

SYMBOL

PARAMETER

TYPICAL UNIT

T

amb

t

Propagation delay

nAx to nYx

1.7

1.4

PLH

PHL

C = 50 pF; V = 5 V

ns

L

CC

C

Input capacitance

Output capacitance

V = 0 V or V

CC

4

6

pF

IN

I

C

V = 0 V or V ; 3-State

O CC

OUT

CCZ

I

Outputs disabled; V = 5.5 V

500

9

µA

mA

CC

Quiescent supply current

I

Outputs LOW; V = 5.5 V

CCL

CC

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

–40 °C to +85 °C

PART NUMBER

74ABT16827ADL

DWG NUMBER

SOT371-1

56-Pin Plastic SSOP Type III

56-Pin Plastic TSSOP Type II

–40 °C to +85 °C

74ABT16827ADGG

74ABTH16827ADGG

SOT364-1

–40 °C to +85 °C

SOT364-1

PIN DESCRIPTION

PIN NUMBER

SYMBOL

FUNCTION

55, 54, 52, 51, 49, 48, 47, 45, 44, 43,

42, 41, 40, 38, 37, 36, 34, 33, 31, 30

1A0 – 1A9

2A0 – 2A9

Data inputs

2, 3, 5, 6, 8, 9, 10, 12, 13, 14,

15, 16, 17, 19, 20, 21, 23, 24, 26, 27

1Y0 – 1Y9

2Y0 – 2Y9

Data outputs

1, 56,

28, 29

1OE0, 1OE1

2OE0, 2OE1

Output enable inputs (active-LOW)

4, 11, 18, 25, 32, 39, 46, 53

7, 22, 35, 50

GND

Ground (0 V)

V

CC

Positive supply voltage

2

2002 Dec 17

853-1824 29295

Philips Semiconductors

Product data

74ABT16827A

74ABTH16827A

20-bit buffer/line driver, non-inverting (3-State)

PIN CONFIGURATION

LOGIC SYMBOL (IEEE/IEC)

&

1

56

28

29

1OE1

1Y0

1

2

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

1OE2

1A0

EN1

1OE2

2OE1

2OE2

&

1Y1

3

1A1

EN2

GND

1Y2

4

GND

1A2

5

55

54

52

51

49

48

47

45

44

2

3

1Y0

1Y1

1Y2

1Y3

1Y4

1Y5

1Y6

1Y7

1Y8

1

1A0

1A1

1A2

1Y3

6

1A3

V

7

V

CC

5

1Y4

1Y5

1Y6

GND

1Y7

1Y8

1Y9

2Y0

2Y1

2Y2

GND

2Y3

2Y4

2Y5

8

1A4

1A5

1A6

GND

1A7

1A8

1A9

2A0

2A1

2A2

GND

2A3

2A4

2A5

6

1A3

1A4

9

8

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

9

1A5

10

12

13

1A6

1A7

1A8

43

42

41

40

38

37

36

34

33

31

30

14

15

16

17

19

20

21

23

24

26

27

1A9

2A0

1Y9

2Y0

2

1

2A1

2Y1

2Y2

2Y3

2Y4

2A2

2A3

2A4

2A5

2A6

2Y5

2Y6

V

CC

2A7

2A8

2A9

2Y7

2Y8

2Y9

2Y6

2Y7

2A6

2A7

GND

2Y8

GND

2A8

SH00012

2Y9

2A9

FUNCTION TABLE

2OE1

2OE2

INPUTS

OUTPUTS

SH00010

OPERATING MODE

nOEx

nAx

nYx

L

H

Z

Transparent

LOGIC SYMBOL

H

55

54

52

51

49

48

47

45

44

43

H

X

High impedance

1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 1A9

X

Z

H

L

=

Don’t care

High impedance “off” state

HIGH voltage level

=

1

1OE1

1OE2

56

LOW voltage level

1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 1Y7 1Y8 1Y9

2

3

5

6

8

9

10

34

12

33

13

31

14

30

42

41

40

38

37

36

2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 2A9

28

29

2OE1

2OE2

2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7 2Y8 2Y9

15

16

17

19

20

21

23

24

26

27

SH00011

3

2002 Dec 17

Philips Semiconductors

Product data

74ABT16827A

74ABTH16827A

20-bit buffer/line driver, non-inverting (3-State)

LOGIC DIAGRAM

nA0

nA1

nA2

nA3

nA4

nA5

nA6

nA7

nA8

nA9

nOE1

nOE2

nY0

nY1

nY2

nY3

nY4

nY5

nY6

nY7

nY8

nY9

SH00013

1, 2

ABSOLUTE MAXIMUM RATINGS

SYMBOL

PARAMETER

DC supply voltage

CONDITIONS

RATING

–0.5 to +7.0

–18

UNIT

V

CC

I

IK

DC input diode current

V < 0 V

I

mA

V

3

V

I

DC input voltage

–1.2 to +7.0

–50

I

DC output diode current

V

O

< 0 V

mA

V

OK

3

V

OUT

DC output voltage

Output in Off or HIGH state

Output in LOW state

–0.5 to +5.5

128

mA

°C

I

DC output current

OUT

Output in HIGH state

–64

T

stg

Storage temperature range

–65 to 150

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the

device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to

absolute-maximum-rated conditions for extended periods may affect device reliability.

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction

temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150 °C.

3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

LIMITS

SYMBOL

PARAMETER

UNIT

MIN

4.5

0

MAX

V

CC

DC supply voltage

5.5

V

I

Input voltage

V

CC

V

HIGH-level input voltage

LOW-level Input voltage

HIGH-level output current

LOW-level output current

Input transition rise or fall rate

2.0

–

V

IH

V

0.8

–32

64

V

IL

I

–

mA

ns/V

°C

OH

I

OL

–

∆t/∆v

0

10

T

amb

Operating free-air temperature range

–40

+85

4

2002 Dec 17

Philips Semiconductors

Product data

74ABT16827A

74ABTH16827A

20-bit buffer/line driver, non-inverting (3-State)

DC ELECTRICAL CHARACTERISTICS

LIMITS

T

= –40 °C

to +85 °C

amb

SYMBOL

PARAMETER

T

amb

= +25 °C

UNIT

TEST CONDITIONS

MIN

TYP

–0.9

2.9

MAX

MIN

MAX

V

Input clamp voltage

V

= 4.5 V; I = –18 mA

–1.2

V

IK

CC

IK

= 4.5 V; I = –3 mA; V = V or V

2.5

3.0

2.0

2.5

3.0

2.0

OH

I

IL

IH

V

OH

HIGH-level output voltage

= 5.0 V; I = –3 mA; V = V or V

3.4

V

OH

I

IL

= 4.5 V; I = –32 mA; V = V or V

IH

2.4

V

OH

I

IL

V

OL

LOW-level output voltage

Input leakage current

= 4.5 V; I = 64 mA; V = V or V

IH

0.42

0.55

±1.0

1

0.55

±1.0

1

V

OL

I

IL

I

= 5.5 V; V = GND or 5.5 V

±0.01

0.01

±0.01

0.01

–1

µA

I

= 5.5 V; V = 5.5 V

I

= 5.5 V; V = V or GND

Control pins

±1

1

±1

1

Input leakage current

74ABTH16827A

I

CC

I

= 5.5 V; V = V

I

4

Data pins

= 5.5 V; V = 0

–3

–5

I

= 4.5 V; V = 0.8 V

35

I

5

Bus Hold current A inputs

74ABTH16827A

I

µA

= 4.5 V; V = 2.0 V

–75

HOLD

I

= 5.5 V; V = 0 to 5.5 V

±800

I

Power-off leakage current

Power-up/down 3-State

= 0.0 V; V = 4.5 V; V = 0 V or 5.5 V

±5.0

±100

±50

±100

±50

µA

OFF

O

I

V

CC

V

OE

= 2.1 V; V = 0.5 V; V = GND or V

;

O

I

CC

I

/I

PU PD

3

output current

= Don’t care

I

3-State output High current

3-State output Low current

V

= 5.5 V; V = 2.7 V; V = V or V

1.0

10

µA

OZH

CC

O

I

IL

IH

I

V

= 5.5 V; V = 0.5 V; V = V or V

–1.0

–10

OZL

O

I

IL

Output HIGH leakage

current

I

V

CC

= 5.5 V; V = 5.5 V; V = GND or V

1.0

50

µA

CEX

O

I

CC

1

I

Output current

V

= 5.5 V; V = 2.5 V

–50

–70

0.5

9

–180

1

–50

–180

1

mA

O

CC

O

I

= 5.5 V; Outputs HIGH, V = GND or V

CCH

I

CC

I

Quiescent supply current

= 5.5 V; Outputs LOW, V = GND or V

19

CCL

I

CC

= 5.5 V; Outputs 3-State;

I

0.5

0.2

1

mA

CCZ

V = GND or V

I

CC

Additional supply current

V

CC

= 5.5 V; one input at 3.4 V,

∆I

CC

2

per input pin

other inputs at V or GND

CC

NOTES:

1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

2. This is the increase in supply current for each input at 3.4 V.

3. This parameter is valid for any V between 0 V and 2.1 V with a transition time of up to 10 msec. From V = 2.1 V to V = 5 V ± 10% a

CC

transition time of up to 100 µsec is permitted.

4. Unused pins at V or GND.

CC

5. This is the bus hold overdrive current required to force the input to the opposite logic state.

AC CHARACTERISTICS

GND = 0 V, t = t = 2.5 ns, C = 50 pF, R = 500 Ω

R

F

L

LIMITS

T

V

= +25 °C

= +5.0 V

T

= –40 °C to +85 °C

amb

CC

amb

V

SYMBOL

PARAMETER

WAVEFORM

UNIT

= +5.0 V ±0.5 V

CC

MIN

TYP

MAX

MIN

MAX

t

Propagation delay

nAx to nYx

1.0

0.6

1.7

1.4

2.4

2.0

1.0

0.6

2.7

2.3

PLH

PHL

1

2

ns

t

Output enable time

to HIGH and LOW level

1.0

3.0

4.1

4.0

1.0

5.0

PZH

PZL

t

Output disable time

from HIGH and LOW level

2.0

1.6

3.2

2.4

4.3

3.2

2.0

1.6

5.0

3.5

PHZ

PLZ

5

2002 Dec 17

Philips Semiconductors

Product data

74ABT16827A

74ABTH16827A

20-bit buffer/line driver, non-inverting (3-State)

AC WAVEFORMS

3.0V or V

CC

whichever

is less

nOEx INPUT

V

M

t

M

nAx INPUT

V

M

t

PZL

PLZ

3.5V

0V

t

PLH

PHL

V

OH

nYx OUTPUT

V

M

V

+ 0.3V

– 0.3V

OL

V

M

V

M

nYx

OUTPUT

OL

t

PHZ

PZH

OL

V

OH

0V

SA00071

SA00016

Waveform 1. Input (nAx) to Output (nYx) Propagation Delays

Waveform 2. 3-State Output Enable and Disable Times

TEST CIRCUIT AND WAVEFORM

t

W

V

AMP (V)

CC

90%

7.0V

NEGATIVE

PULSE

V

M

10%

90%

R

L

0V

(t

V

OUT

IN

PULSE

GENERATOR

D.U.T.

t

(t

)

t

TLH

)

THL

F

R

)

t

(t )

R

L

C

TLH

R

THL F

T

L

AMP (V)

90%

M

POSITIVE

PULSE

V

M

Test Circuit for 3-State Outputs

10%

t

W

0V

SWITCH POSITION

V

= 1.5V

M

TEST

SWITCH

Input Pulse Definition

t

closed

PLZ

closed

open

PZL

All other

INPUT PULSE REQUIREMENTS

DEFINITIONS

R = Load resistor; see AC CHARACTERISTICS for value.

L

FAMILY

Amplitude

3.0V

Rep. Rate

1MHz

t

F

W

R

C = Load capacitance includes jig and probe capacitance;

L

see AC CHARACTERISTICS for value.

74ABT/H16

500ns 2.5ns 2.5ns

R = Termination resistance should be equal to Z

T

of

OUT

pulse generators.

SA00018

6

2002 Dec 17

Philips Semiconductors

Product data

74ABT16827A

74ABTH16827A

20-bit buffer/line driver, non-inverting (3-State)

SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm

SOT371-1

7

2002 Dec 17

Philips Semiconductors

Product data

74ABT16827A

74ABTH16827A

20-bit buffer/line driver, non-inverting (3-State)

TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm

SOT364-1

8

2002 Dec 17

Philips Semiconductors

Product data

74ABT16827A

74ABTH16827A

20-bit buffer/line driver, non-inverting (3-State)

REVISION HISTORY

Rev

Date

Description

_2

20021217

Product data (9397 750 10858); ECN 853-1824 29295 of 12 December 2002.

Supersedes data of 27 February 1998 (9397 750 03504).

Modifications:

• Ordering information table: remove “North America” column; remove 74ABTH16827ADL package offering.

_1

19980227

Product specification (9397 750 03504). ECN 853-1824 19025 of 27 February 1998.

9

2002 Dec 17

Philips Semiconductors

Product data

74ABT16827A

74ABTH16827A

20-bit buffer/line driver, non-inverting (3-State)

Data sheet status

Product

status

Definitions

[1]

Level

Data sheet status

[2] [3]

I

Objective data

Development

This data sheet contains data from the objective specification for product development.

Philips Semiconductors reserves the right to change the specification in any manner without notice.

II

Preliminary data

Product data

Qualification

Production

This data sheet contains data from the preliminary specification. Supplementary data will be published

at a later date. Philips Semiconductors reserves the right to change the specification without notice, in

order to improve the design and supply the best possible product.

III

This data sheet contains data from the product specification. Philips Semiconductors reserves the

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant

changes will be communicated via a Customer Product/Process Change Notification (CPCN).

[1] Please consult the most recently issued data sheet before initiating or completing a design.

[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL

http://www.semiconductors.philips.com.

[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see

the relevant data sheet or data handbook.

Limitingvaluesdefinition— Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given

in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no

representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be

expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree

to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described

or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated

viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys

nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,

copyright, or mask work right infringement, unless otherwise specified.

Koninklijke Philips Electronics N.V. 2002

Contact information

For additional information please visit

http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

Date of release: 12-02

9397 750 10858

For sales offices addresses send e-mail to:

sales.addresses@www.semiconductors.philips.com.

Document order number:

Philips

Semiconductors

10

2002 Dec 17


型号：	74ABT16827ADGG,112
厂家：	NXP
描述：	74ABT(H)16827A - 20-bit buffer/line driver, non-inverting (3-State) TSSOP 56-Pin 驱动信息通信管理光电二极管逻辑集成电路
文件：	总10页 (文件大小：115K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

74ABT16827ADGG,112 [NXP]

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