74ABT20PW [NXP]
Dual 4-input NAND gate; 两个4输入与非门型号: | 74ABT20PW |
厂家: | NXP |
描述: | Dual 4-input NAND gate |
文件: | 总3页 (文件大小:49K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Philips Semiconductors
Product specification
Dual 4-input NAND gate
74ABT20
QUICK REFERENCE DATA
LOGIC DIAGRAM
CONDITIONS
1
2
T
= 25°C;
GND = 0V
A0
B0
SYMBOL PARAMETER
TYPICAL UNIT
amb
6
Y0
Propagation
delay
An, Bn, Cn, Dn
to Yn
4
5
C0
D0
t
t
2.7
ns
PLH
PHL
2.2
C = 50pF;
L
V
CC
= 5V
t
t
Output to
Output skew
OSLH
OSHL
9
0.3
3
ns
pF
µA
A1
B1
10
Input
capacitance
8
C
I
V = 0V or V
I CC
IN
Y1
12
13
C1
Total supply
current
Outputs disabled;
= 5.5V
50
V
= Pin 14
CC
D1
CC
V
CC
GND = Pin 7
SA00352
PIN CONFIGURATION
LOGIC SYMBOL (IEEE/IEC)
A0
B0
NC
C0
D0
1
2
3
4
5
14
V
CC
1
&
13 D1
12 C1
11 NC
10 B1
2
4
6
5
Y0
6
7
9
8
A1
Y1
GND
9
SA00350
10
12
8
PIN DESCRIPTION
13
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
SF00068
1, 2, 4, 5, 9,
10, 12, 13
An, Bn,
Cn, Dn
Data inputs
FUNCTION TABLE
6, 8
7
Yn
Data outputs
INPUTS
OUTPUT
GND
Ground (0V)
An
L
Bn
X
Cn
X
Dn
X
Yn
H
H
H
H
L
14
V
CC
Positive supply voltage
X
L
X
X
LOGIC SYMBOL
X
X
L
X
1
2
4
5
9
10 12 13
X
X
X
L
H
H
H
H
NOTES:
A0 B0 C0 D0 A1 B1 C1 D1
H
L
X
= High voltage level
= Low voltage level
= Don’t care
Y0 Y1
V
= Pin 14
CC
GND = Pin 7
6
8
SA00351
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74ABT20 N
DWG NUMBER
SOT27-1
14-Pin Plastic DIP
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74ABT20 N
74ABT20 D
74ABT20 DB
74ABT20 PW
14-Pin plastic SO
74ABT20 D
SOT108-1
SOT337-1
SOT402-1
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
74ABT20 DB
74ABT20PW DH
1
1995 Sep 22
853-1811 15793
Philips Semiconductors
Product specification
Dual 4-input NAND gate
74ABT20
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
CONDITIONS
RATING
–0.5 to +7.0
–18
UNIT
V
V
CC
I
IK
DC supply voltage
DC input diode current
V < 0
I
mA
V
3
V
I
DC input voltage
–1.2 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
DC output voltage
output in Off or High state
output in Low state
–0.5 to +5.5
40
OUT
OUT
I
DC output current
mA
°C
T
stg
Storage temperature range
–65 to 150
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
4.5
0
MAX
V
CC
DC supply voltage
5.5
V
V
V
I
Input voltage
V
CC
V
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
2.0
V
IH
V
0.8
–15
20
V
IL
I
mA
mA
ns/V
°C
OH
I
OL
∆t/∆v
0
10
T
amb
Operating free-air temperature range
–40
+85
DC ELECTRICAL CHARACTERISTICS
LIMITS
T
= –40°C
to +85°C
amb
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
UNIT
MIN
TYP
MAX
MIN
MAX
V
Input clamp voltage
V
V
V
V
V
V
V
V
V
= 4.5V; I = –18mA
–0.9
2.9
–1.2
–1.2
V
V
IK
CC
CC
CC
CC
CC
CC
CC
CC
CC
IK
V
OH
High-level output voltage
Low-level output voltage
Input leakage current
= 4.5V; I = –15mA; V = V or V
2.5
2.5
OH
I
IL
IH
V
OL
= 4.5V; I = 20mA; V = V or V
IH
0.35
±0.01
±5.0
5.0
0.5
±1.0
±100
50
0.5
±1.0
±100
50
V
OL
I
IL
I
= 5.5V; V = GND or 5.5V
µA
µA
µA
mA
µA
I
I
I
Power-off leakage current
Output High leakage current
= 0.0V; V or V ≤ 4.5V
O I
OFF
CEX
I
= 5.5V; V = 5.5V; V = GND or V
O I CC
1
I
O
Output current
= 5.5V; V = 2.5V
–50
–75
2
–180
50
–50
–180
50
O
I
Quiescent supply current
= 5.5V; V = GND or V
I CC
CC
Additional supply current per
= 5.5V; One data input at 3.4V, other
∆I
CC
0.25
500
500
µA
2
input pin
inputs at V or GND
CC
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flop or latch after applying the power.
2
1995 Sep 22
Philips Semiconductors
Product specification
Dual 4-input NAND gate
74ABT20
AC CHARACTERISTICS
GND = 0V; t = t = 2.5ns; C = 50pF, R = 500Ω
R
F
L
L
LIMITS
T
V
= +25°C
= +5.0V
T
= –40°C to +85°C
amb
CC
amb
V
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +5.0V ±0.5V
CC
MIN
TYP
MAX
MIN
MAX
t
t
Propagation delay
An, Bn, Cn, Dn to Yn
1.0
1.0
2.7
2.2
3.9
3.4
1.0
1.0
4.6
3.8
PLH
PHL
1
2
ns
ns
t
t
Output to Output skew
An or Bn to Yn
OSHL
OSLH
0.3
0.5
0.5
1
NOTE:
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same
device. The specification applies to any outputs switching in the the same direction, either HIGH–to-LOW (t ) or LOW-to-HIGH (t );
OSHL OSLH
parameter guaranteed by design.
AC WAVEFORMS
V
M
= 1.5V, V = GND to 3.0V
IN
An, Bn,
Cn, Dn
INPUT
V
V
M
t
M
t
PHL
PLH
OUTPUT
t
PHL
MIN
V
V
M
M
Yn
t
PLH
MIN
OUTPUT N
same part
SA00353
Waveform 1. Propagation Delay for Inverting Outputs
t
t
PHL
PLH
MAX
MAX
t
t
OSHL
OSLH
SA00381
Waveform 2. Common edge skew
TEST CIRCUIT AND WAVEFORMS
t
AMP (V)
W
90%
90%
V
CC
NEGATIVE
PULSE
V
V
M
M
10%
10%
90%
0V
(t
V
V
OUT
IN
t
t
(t
(t
)
t
TLH
)
PULSE
GENERATOR
THL
F
R
D.U.T.
)
t
(t )
R
TLH
R
THL F
L
R
C
T
L
AMP (V)
90%
M
POSITIVE
PULSE
V
V
M
10%
10%
Test Circuit for Outputs
t
0V
W
V
M
= 1.5V
Input Pulse Definition
DEFINITIONS
R = Load resistor; see AC CHARACTERISTICS for value.
L
INPUT PULSE REQUIREMENTS
C = Load capacitance includes jig and probe capacitance;
FAMILY
L
Amplitude
3.0V
Rep. Rate
1MHz
t
t
t
see AC CHARACTERISTICS for value.
W
R
F
R = Termination resistance should be equal to Z
of
T
OUT
pulse generators.
500ns 2.5ns
2.5ns
74ABT
SH00067
3
1995 Sep 22
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