74ABT2953PW [NXP]

Octal registered transceiver, inverting 3-State; 八路寄存收发器,反相三态
74ABT2953PW
型号: 74ABT2953PW
厂家: NXP    NXP
描述:

Octal registered transceiver, inverting 3-State
八路寄存收发器,反相三态

总线驱动器 总线收发器 触发器 逻辑集成电路 光电二极管 输出元件 信息通信管理
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Philips Semiconductors  
Product specification  
Octal registered transceiver, inverting (3-State)  
74ABT2953  
FEATURES  
8-bit registered transceiver  
DESCRIPTION  
The 74ABT2953 high-performance BiCMOS device combines low  
static and dynamic power dissipation with high speed and high  
output drive.  
Independent registers for A and B buses  
Output capability: +64mA/–32mA  
The 74ABT2953 device is an 8-bit registered inverting transceiver.  
Two 8-bit back-to-back registers store data flowing in both directions  
between two bidirectional buses. Data applied to the inputs is  
entered and stored on the rising edge of the Clock (CPXX) provided  
that the Clock Enable (CEXX) is Low. The data is then present at  
the 3-State output buffers, but is only accessible when the Output  
Enable (OEXX) is Low. Data flow from A inputs to B outputs is the  
same as for B inputs to A outputs.  
Latch-up protection exceeds 500mA per Jedec Std 17  
ESD protection exceeds 2000V per MIL STD 883 Method 3015  
and 200V per Machine Model  
Live insertion/extraction permitted  
Power-up 3-State  
Power-up reset  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
t
t
Propagation delay  
PLH  
PHL  
C = 50pF; V = 5V  
5.0  
4
ns  
pF  
pF  
nA  
L
CC  
CPBA to An or CPAB to Bn  
Input capacitance  
C
V = 0V or V  
I CC  
IN  
Outputs disabled;  
= 0V or V  
C
I/O capacitance  
7
I/O  
V
O
CC  
I
Total supply current  
Outputs disabled; V =5.5V  
500  
CCZ  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
74ABT2953 N  
DWG NUMBER  
SOT222-1  
24-Pin Plastic DIP  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
74ABT9253 N  
74ABT2953 D  
74ABT2953 DB  
74ABT2953 PW  
24-Pin plastic SO  
74ABT2953 D  
SOT137-1  
24-Pin Plastic SSOP Type II  
24-Pin Plastic TSSOP Type I  
74ABT2953 DB  
74ABT2953PW DH  
SOT340-1  
SOT355-1  
PIN CONFIGURATION  
PIN DESCRIPTION  
PIN NUMBER  
SYMBOL  
NAME AND FUNCTION  
CPAB /  
CPBA  
Clock input A to B / Clock input  
B to A  
10, 14  
24  
B7  
B6  
1
2
3
4
5
6
7
8
9
V
CC  
23 A7  
22 A6  
21 A5  
20 A4  
19 A3  
18 A2  
17 A1  
16 A0  
CEAB /  
CEBA  
Clock enable input A to B / Clock  
enable input B to A  
11, 13  
B5  
B4  
16, 17, 18, 19,  
20, 21, 22, 23  
A0 – A7  
B0 – B7  
Data inputs/outputs (A side)  
Data outputs/outputs (B side)  
Output enable inputs  
B3  
B2  
1, 2, 3, 4, 5, 6,  
7, 8  
B1  
B0  
OEAB /  
OEBA  
9, 15  
OEAB  
CPAB 10  
CEAB 11  
GND 12  
15  
14  
13  
OEBA  
CPBA  
CEBA  
12  
24  
GND  
Ground (0V)  
V
CC  
Positive supply voltage  
TOP VIEW  
SA00305  
1
1995 Sep 06  
853-1555 15702  
Philips Semiconductors  
Product specification  
Octal registered transceiver, inverting (3-State)  
74ABT2953  
LOGIC SYMBOL  
LOGIC SYMBOL (IEEE/IEC)  
11  
13  
15  
9
EN1  
EN2  
EN3  
EN4  
16 17 18 19 20 21 22 23  
10  
14  
A0 A1 A2 A3 A4 A5 A6 A7  
CPAB  
C5  
C6  
10  
11  
CEAB  
OEBA  
OEAB  
15  
9
16  
17  
18  
19  
20  
21  
22  
23  
8
7
6
5
4
3
2
1
2, 3, 6 1, 4, 5  
14  
13  
CPBA  
CEBA  
B0 B1 B2 B3 B4 B5 B6 B7  
8
7
6
5
4
3
2
1
SA00306  
SA00307  
FUNCTION TABLE for Register An or Bn  
FUNCTION TABLE for Output Enable  
INPUTS  
CPXX  
X
INTERNAL  
OPERATING  
INPUTS  
OEXX  
H
INTERNAL  
An or Bn  
OUTPUTS  
Z
OPERATING  
MODE  
An or  
Bn  
Q
CEXX  
Q
MODE  
X
Disable outputs  
X
H
NC  
Hold data  
Load data  
L
L
L
H
H
L
Enable outputs  
L
H
L
L
L
H
H = High voltage level  
H = High voltage level  
L
= Low voltage level  
= Don’t care  
L
= Low voltage level  
= Low-to-High transition  
= Don’t care  
X
XX= AB or BA  
= High impedance ”off” state  
X
Z
XX= AB or BA  
NC= No change  
1, 2  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
DC supply voltage  
CONDITIONS  
RATING  
–0.5 to +7.0  
–18  
UNIT  
V
V
CC  
I
IK  
DC input diode current  
V < 0  
I
mA  
V
3
V
I
DC input voltage  
–1.2 to +7.0  
–50  
I
DC output diode current  
V
O
< 0  
mA  
V
OK  
3
V
DC output voltage  
output in Off or High state  
output in Low state  
–0.5 to +5.5  
128  
OUT  
OUT  
I
DC output current  
mA  
°C  
T
stg  
Storage temperature range  
–65 to 150  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction  
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.  
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2
1995 Sep 06  
Philips Semiconductors  
Product specification  
Octal registered transceiver, inverting (3-State)  
74ABT2953  
LOGIC DIAGRAM  
11  
CEAB  
10  
CPAB  
9
OEAB  
DETAIL A  
CE  
Q
16  
A0  
D
CP  
CE  
CP  
Q
8
D
B0  
17  
18  
19  
20  
21  
22  
23  
7
A1  
A2  
A3  
A4  
A5  
A6  
A7  
B1  
6
B2  
5
B3  
4
DETAIL A X 7  
B4  
3
B5  
2
B6  
1
B7  
13  
CEBA  
14  
15  
CPBA  
OEBA  
SA00308  
3
1995 Sep 06  
Philips Semiconductors  
Product specification  
Octal registered transceiver, inverting (3-State)  
74ABT2953  
RECOMMENDED OPERATING CONDITIONS  
SYMBOL  
PARAMETER  
LIMITS  
UNIT  
Min  
4.5  
0
Max  
5.5  
V
DC supply voltage  
V
V
CC  
V
Input voltage  
V
CC  
I
V
High-level input voltage  
Low-level Input voltage  
High-level output current  
Low-level output current  
Input transition rise or fall rate  
2.0  
V
IH  
V
0.8  
–32  
64  
V
IL  
I
mA  
mA  
ns/V  
°C  
OH  
I
OL  
t/v  
0
10  
T
amb  
Operating free-air temperature range  
–40  
+85  
DC ELECTRICAL CHARACTERISTICS  
LIMITS  
T
= –40°C  
to +85°C  
amb  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
T
amb  
= +25°C  
UNIT  
Min  
Typ  
Max  
Min  
Max  
V
Input clamp voltage  
V
V
V
V
V
= 4.5V; I = –18mA  
–0.9  
3.2  
–1.2  
–1.2  
V
V
V
V
V
IK  
CC  
CC  
CC  
CC  
CC  
IK  
= 4.5V; I = –3mA; V = V or V  
2.5  
3.0  
2.0  
2.5  
3.0  
2.0  
OH  
I
IL  
IH  
V
OH  
High-level output voltage  
= 5.0V; I = –3mA; V = V or V  
3.7  
OH  
I
IL  
IH  
= 4.5V; I = –32mA; V = V or V  
IH  
2.3  
OH  
I
IL  
V
OL  
Low-level output voltage  
Power-up output low  
= 4.5V; I = 64mA; V = V or V  
IH  
0.42  
0.55  
0.55  
0.55  
0.55  
OL  
I
IL  
V
RST  
V
CC  
= 5.5V; I = 1mA; V = GND or V  
CC  
0.13  
V
O
I
3
voltage  
I
I
Input leakage Control pins  
V
V
= 5.5V; V = GND or 5.5V  
±0.01  
±5  
±1.0  
±1.0  
µA  
µA  
CC  
I
current  
Data pins  
= 5.5V; V = GND or 5.5V  
±100  
±100  
CC  
I
I
Power-off leakage current  
Power-up/down 3-State  
V
= 0.0V; V or V 4.5V  
±5.0  
±5.0  
±100  
±50  
±100  
±50  
µA  
µA  
OFF  
CC  
O
I
V
CC  
V
= 2.1V; V = 0.5V; V = GND or V  
;
O
I
CC  
I
/
PU IPD  
4
output current  
Don’t care  
OE =  
I
3-State output High current  
3-State output Low current  
Output High leakage current  
V
V
V
V
V
V
V
= 5.5V; V = 2.7V; V = V or V  
5.0  
–5.0  
5.0  
50  
–50  
50  
50  
–50  
50  
µA  
µA  
µA  
mA  
µA  
mA  
OZH  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
O
I
IL  
IH  
I
= 5.5V; V = 0.5V; V = V or V  
O I IL  
OZL  
IH  
I
= 5.5V; V = 5.5V; V = GND or V  
O I  
CEX  
CC  
1
I
O
Output current  
= 5.5V; V = 2.5V  
–50  
–65  
110  
20  
–180  
250  
30  
–50  
–180  
250  
30  
O
I
= 5.5V; Outputs High, V = GND or V  
CCH  
I
CC  
I
Quiescent supply current  
= 5.5V; Outputs Low, V = GND or V  
CCL  
I
CC  
= 5.5V; Outputs 3-State;  
I
110  
0.3  
250  
1.5  
250  
1.5  
µA  
CCZ  
V = GND or V  
I
CC  
Additional supply current per  
V
CC  
= 5.5V; one input at 3.4V,  
I  
mA  
CC  
2
input pin  
other inputs at V or GND  
CC  
NOTES:  
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.  
2. This is the increase in supply current for each input at 3.4V.  
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.  
4. This parameter is valid for any V between 0V and 2.1V, with a transition time of up to 10msec. From V = 2.1V to V = 5V ± 10% a  
CC  
CC  
CC  
transition time of up to 100µsec is permitted.  
4
1995 Sep 06  
Philips Semiconductors  
Product specification  
Octal registered transceiver, inverting (3-State)  
74ABT2953  
AC CHARACTERISTICS  
GND = 0V; t = t = 2.5ns; C = 50pF, R = 500Ω  
R
F
L
L
LIMITS  
T
V
= +25°C  
= +5.0V  
T
= –40°C to +85°C  
amb  
CC  
amb  
V
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
= +5.0V ±0.5V  
CC  
Min  
Typ  
Max  
Min  
Max  
f
Maximum clock frequency  
1
1
150  
200  
150  
MHz  
ns  
MAX  
t
t
Propagation delay  
CPBA to An, CPAB to Bn  
2.0  
2.5  
5.1  
5.7  
6.6  
7.2  
2.0  
2.5  
7.6  
8.2  
PLH  
PHL  
t
t
Output enable time  
OEBA to An, OEAB to Bn  
3
4
1.0  
2.2  
4.0  
5.3  
4.8  
6.2  
1.0  
2.2  
5.8  
7.5  
PZH  
PZL  
ns  
ns  
t
Output disable time  
OEBA to An, OEAB to Bn  
3
4
2.0  
1.5  
6.1  
5.6  
7.6  
7.1  
2.0  
1.5  
8.1  
7.6  
PHZ  
t
PLZ  
AC SETUP REQUIREMENTS  
LIMITS  
T
V
= +25°C  
= +5.0V  
T
= –40°C to +85°C  
amb  
CC  
amb  
V
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
= +5.0V ±0.5V  
CC  
Min  
Typ  
Min  
t (H)  
t (L)  
s
Setup time  
An to CPAB or Bn to CPBA  
4.0  
3.0  
2.5  
1.1  
4.0  
3.0  
S
2
2
2
2
1
ns  
ns  
ns  
ns  
ns  
t (H)  
Hold time  
An to CPAB or Bn to CPBA  
0.0  
0.0  
–1.0  
–2.0  
0.0  
0.0  
h
t (L)  
h
t (H)  
Setup time  
CEAB to CPAB, CEBA to CPBA  
3.5  
2.5  
2.0  
0.9  
3.5  
2.5  
s
t (L)  
s
t (H)  
Hold time  
CEAB to CPAB, CEBA to CPBA  
0.0  
0.0  
–0.5  
–1.0  
0.0  
0.0  
h
t (L)  
h
t (H)  
CPAB or CPBA pulse width,  
High or Low  
3.0  
3.5  
2.0  
1.1  
3.0  
3.5  
w
t (L)  
w
AC WAVEFORMS  
V
M
= 1.5V, V = GND to 3.0V  
IN  
1/f  
MAX  
An, Bn  
CEAB,  
CEBA  
V
V
V
V
M
M
M
M
CPBA or  
CPAB  
V
V
V
t
M
t
M
M
t (H)  
t (L)  
s
t
(H)  
t
(L)  
s
h
h
(H)  
t (L)  
w
w
CPAB,  
CPBA  
V
V
M
t
M
PHL  
PLH  
SA00309  
An or Bn  
V
V
M
M
Waveform 2. Data Setup and Hold Times  
SA00087  
Waveform 1. Propagation Delay, Clock Input to Output, Clock  
Pulse Width, and Maximum Clock Frequency  
OEAB,  
OEBA  
OEAB,  
OEBA  
V
V
M
V
V
M
M
t
M
t
t
t
PZL  
PLZ  
PZH  
PHZ  
V
–0.3V  
OH  
An, Bn  
An, Bn  
V
V
M
M
V
+0.3V  
0V  
OL  
0V  
SA00310  
SA00311  
Waveform 3. 3-State Output Enable Time to High Level and  
Output Disable Time from High Level  
Waveform 4. 3-State Output Enable Time to Low Level and  
Output Disable Time from Low Level  
5
1995 Sep 06  
Philips Semiconductors  
Product specification  
Octal registered transceiver, inverting (3-State)  
74ABT2953  
TEST CIRCUIT AND WAVEFORMS  
V
t
W
AMP (V)  
90%  
CC  
90%  
7.0V  
NEGATIVE  
PULSE  
V
V
M
M
10%  
10%  
90%  
R
R
L
L
0V  
V
V
OUT  
IN  
PULSE  
GENERATOR  
D.U.T.  
t
t
(t  
(t  
)
t
t
(t )  
R
THL  
F
TLH  
)
(t )  
F
R
C
TLH  
R
THL  
T
L
AMP (V)  
90%  
M
POSITIVE  
PULSE  
V
V
M
Test Circuit for 3-State Outputs  
10%  
10%  
t
W
0V  
SWITCH POSITION  
V
= 1.5V  
M
TEST  
SWITCH  
closed  
closed  
open  
Input Pulse Definition  
t
t
PLZ  
PZL  
All other  
INPUT PULSE REQUIREMENTS  
DEFINITIONS  
R = Load resistor; see AC CHARACTERISTICS for value.  
L
FAMILY  
Amplitude  
3.0V  
Rep. Rate  
1MHz  
t
t
t
F
W
R
C = Load capacitance includes jig and probe capacitance;  
L
see AC CHARACTERISTICS for value.  
74ABT  
500ns 2.5ns 2.5ns  
R = Termination resistance should be equal to Z  
T
of  
OUT  
pulse generators.  
SA00012  
6
1995 Sep 06  

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