74ABT32N,112 [NXP]
74ABT32 - Quad 2-input OR gate DIP 14-Pin;
| 型号： | 74ABT32N,112 |
| 厂家： | 
NXP |
| 描述： | 74ABT32 - Quad 2-input OR gate DIP 14-Pin 栅 信息通信管理 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总10页 (文件大小：105K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ABT32
Quad 2-input OR gate
Product specification
IC23 Data Handbook
1995 Sep 22
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-input OR gate
74ABT32
QUICK REFERENCE DATA
LOGIC DIAGRAM
CONDITIONS
1
2
A0
3
6
T
= 25°C;
GND = 0V
SYMBOL PARAMETER
TYPICAL UNIT
amb
Y0
B0
4
5
A1
B1
Propagation
delay
An, Bn to Yn
Y1
Y2
Y3
t
2.3
ns
PLH
t
1.9
PHL
C = 50pF;
L
CC
9
A2
B2
8
V
= 5V
10
t
t
Output to
Output skew
OSLH
OSHL
0.4
3
ns
pF
µA
12
13
11
A3
B3
V
= Pin 14
CC
Input
capacitance
GND = Pin 7
C
V = 0V or V
I CC
IN
SA00356
Total supply
current
Outputs disabled;
= 5.5V
I
50
CC
V
CC
LOGIC SYMBOL (IEEE/IEC)
PIN CONFIGURATION
1
1
2
3
6
A0
B0
Y0
A1
B1
1
2
3
4
5
14
V
CC
13 B3
12 A3
11 Y3
10 B2
4
5
9
8
10
Y1
6
7
9
8
A2
Y2
GND
12
13
SA00354
11
PIN DESCRIPTION
PIN
NUMBER
SF00041
SYMBOL
NAME AND FUNCTION
1, 2, 4, 5, 9,
10, 12, 13
FUNCTION TABLE
An, Bn
Data inputs
INPUTS
OUTPUT
3, 6, 8, 11
Yn
Data outputs
An
L
Bn
Yn
L
7
GND
Ground (0V)
L
H
L
14
V
CC
Positive supply voltage
L
H
H
H
H
LOGIC SYMBOL
H
H
1
2
4
5
9
10 12 13
NOTES:
H
L
= High voltage level
= Low voltage level
A0 B0 A1 B1 A2 B2 A3 B3
Y0 Y1 Y2 Y3
V
= Pin 14
CC
3
6
8
11
GND = Pin 7
SA00355
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74ABT32 N
DWG NUMBER
14-Pin Plastic DIP
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74ABT32 N
74ABT32 D
74ABT32 DB
74ABT32 PW
SOT27-1
SOT108-1
SOT337-1
SOT402-1
14-Pin plastic SO
74ABT32 D
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
74ABT32 DB
74ABT32PW DH
2
1995 Sep 22
853-1812 15793
Philips Semiconductors
Product specification
Quad 2-input OR gate
74ABT32
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
CONDITIONS
RATING
–0.5 to +7.0
–18
UNIT
V
V
CC
I
IK
DC supply voltage
DC input diode current
V < 0
I
mA
V
3
V
I
DC input voltage
–1.2 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
DC output voltage
output in Off or High state
output in Low state
–0.5 to +5.5
40
OUT
OUT
I
DC output current
mA
°C
T
stg
Storage temperature range
–65 to 150
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
4.5
0
MAX
V
CC
DC supply voltage
5.5
V
V
V
I
Input voltage
V
CC
V
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
2.0
V
IH
V
0.8
–15
20
V
IL
I
mA
mA
ns/V
°C
OH
I
OL
∆t/∆v
0
10
T
amb
Operating free-air temperature range
–40
+85
DC ELECTRICAL CHARACTERISTICS
LIMITS
T
= –40°C
to +85°C
amb
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
UNIT
MIN
TYP
MAX
MIN
MAX
V
Input clamp voltage
V
V
V
V
V
V
V
V
V
= 4.5V; I = –18mA
–0.9
2.9
–1.2
–1.2
V
V
IK
CC
CC
CC
CC
CC
CC
CC
CC
CC
IK
V
OH
High-level output voltage
Low-level output voltage
Input leakage current
= 4.5V; I = –15mA; V = V or V
2.5
2.5
OH
I
IL
IH
V
OL
= 4.5V; I = 20mA; V = V or V
IH
0.35
±0.01
±5.0
5.0
0.5
±1.0
±100
50
0.5
±1.0
±100
50
V
OL
I
IL
I
= 5.5V; V = GND or 5.5V
µA
µA
µA
mA
µA
I
I
I
Power-off leakage current
Output High leakage current
= 0.0V; V or V ≤ 4.5V
O I
OFF
CEX
I
= 5.5V; V = 5.5V; V = GND or V
O I CC
1
I
O
Output current
= 5.5V; V = 2.5V
–50
–75
2
–180
50
–50
–180
50
O
I
Quiescent supply current
= 5.5V; V = GND or V
I CC
CC
Additional supply current per
= 5.5V; One data input at 3.4V, other
∆I
CC
0.25
500
500
µA
2
input pin
inputs at V or GND
CC
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flop or latch after applying the power.
3
1995 Sep 22
Philips Semiconductors
Product specification
Quad 2-input OR gate
74ABT32
AC CHARACTERISTICS
GND = 0V; t = t = 2.5ns; C = 50pF, R = 500Ω
R
F
L
L
LIMITS
T
V
= +25°C
= +5.0V
T
= –40°C to +85°C
amb
CC
amb
V
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +5.0V ±0.5V
CC
MIN
TYP
MAX
MIN
MAX
t
t
Propagation delay
An, Bn to Yn
1.0
1.0
2.3
1.9
3.4
2.9
1.0
1.0
3.8
3.2
PLH
PHL
1
ns
ns
t
t
Output to Output skew
An or Bn to Yn
OSHL
OSLH
0.4
0.5
0.5
1
NOTE:
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same
device. The specification applies to any outputs switching in the the same direction, either HIGH–to-LOW (t
parameter guaranteed by design.
) or LOW-to-HIGH (t
);
OSHL
OSLH
AC WAVEFORMS
V
M
= 1.5V, V = GND to 3.0V
IN
INPUT
An, Bn
V
V
M
M
t
t
PLH
PHL
OUTPUT
t
PHL
MIN
Yn
V
M
V
M
t
PLH
MIN
OUTPUT N
same part
SA00358
Waveform 1. Propagation delay for inverting outputs
t
t
PHL
PLH
MAX
MAX
t
t
OSHL
OSLH
SA00381
Waveform 2. Common edge skew
TEST CIRCUIT AND WAVEFORMS
t
AMP (V)
W
90%
90%
V
CC
NEGATIVE
PULSE
V
V
M
M
10%
10%
90%
0V
V
V
OUT
IN
t
t
(t
(t
)
t
TLH
(t
)
R
PULSE
GENERATOR
THL
F
D.U.T.
)
t
(t
)
F
R
TLH
R
THL
L
R
C
T
L
AMP (V)
90%
M
POSITIVE
PULSE
V
V
M
10%
10%
Test Circuit for Outputs
t
0V
W
V
M
= 1.5V
Input Pulse Definition
DEFINITIONS
R = Load resistor; see AC CHARACTERISTICS for value.
L
INPUT PULSE REQUIREMENTS
C = Load capacitance includes jig and probe capacitance;
FAMILY
L
Amplitude
3.0V
Rep. Rate
1MHz
t
t
t
see AC CHARACTERISTICS for value.
W
R
F
R = Termination resistance should be equal to Z
of
OUT
T
pulse generators.
500ns 2.5ns
2.5ns
74ABT
SH00067
4
1995 Sep 22
Philips Semiconductors
Product specification
Quad 2-input OR gate
74ABT32
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
5
1995 Sep 22
Philips Semiconductors
Product specification
Quad 2-input OR gate
74ABT32
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
6
1995 Sep 22
Philips Semiconductors
Product specification
Quad 2-input OR gate
74ABT32
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
7
1995 Sep 22
Philips Semiconductors
Product specification
Quad 2-input OR gate
74ABT32
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
8
1995 Sep 22
Philips Semiconductors
Product specification
Quad 2-input OR gate
74ABT32
NOTES
9
1995 Sep 22
Philips Semiconductors
Product specification
Quad 2-input OR gate
74ABT32
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
Copyright Philips Electronics North America Corporation 1995
All rights reserved. Printed in U.S.A.
(print code)
Date of release: July 1994
9397-750-04848
Document order number:
相关型号：
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