74ABT534AD,118 [NXP]

74ABT534AD;
74ABT534AD,118
型号: 74ABT534AD,118
厂家: NXP    NXP
描述:

74ABT534AD

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INTEGRATED CIRCUITS  
74ABT534A  
Octal D-type flip-flop, inverting  
(3-State)  
Product specification  
IC23 Data Handbook  
1997 Feb 03  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop, inverting (3-State)  
74ABT534A  
FEATURES  
8-bit positive edge triggered register  
DESCRIPTION  
The 74ABT534A high-performance BiCMOS device combines low  
static and dynamic power dissipation with high speed and high  
output drive.  
3-State output buffers  
Output capability: +64mA/–32mA  
The 74ABT534A is an 8-bit, edge triggered register coupled to eight  
3-State output buffers. The two sections of the device are controlled  
independently by the clock (CP) and Output Enable (OE) control  
gates.  
Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17  
ESD protection exceeds 2000 V per MIL STD 883 Method 3015  
and 200 V per Machine Model  
The register is fully edge triggered. The state of each D input, one  
set-up time before the Low-to-High clock transition, is transferred to  
the corresponding flip-flop’s output.  
Power-up 3-State  
The 3-State output buffers are designed to drive heavily loaded  
3-State buses, MOS memories, or MOS microprocessors. The  
active-Low Output Enable (OE) controls all eight 3-State buffers  
independent of the clock operation.  
When OE is Low, the stored data appears at the outputs. When OE  
is High, the outputs are in the High-impedance “OFF” state, which  
means they will neither drive nor load the bus.  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
t
t
Propagation delay  
CP to Qn  
3.3  
3.6  
PLH  
PHL  
C = 50pF; V = 5V  
ns  
L
CC  
C
Input capacitance  
Output capacitance  
Total supply current  
V = 0V or V  
CC  
3.5  
6.5  
pF  
pF  
µA  
IN  
I
C
Outputs disabled; V = 0V or V  
O CC  
OUT  
CCZ  
I
Outputs disabled; V =5.5V  
100  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
74ABT534A N  
DWG NUMBER  
SOT146-1  
20-Pin Plastic DIP  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
74ABT534A N  
74ABT534A D  
74ABT534A DB  
74ABT534A PW  
20-Pin plastic SO  
74ABT534A D  
SOT163-1  
20-Pin Plastic SSOP Type II  
20-Pin Plastic TSSOP Type I  
74ABT534A DB  
74ABT534APW DH  
SOT339-1  
SOT360-1  
PIN CONFIGURATION  
PIN DESCRIPTION  
PIN NUMBER SYMBOL  
FUNCTION  
1
OE  
Output enable input (active-Low)  
Data inputs  
OE  
Q0  
D0  
D1  
Q1  
Q2  
D2  
D3  
Q3  
1
2
3
4
5
20  
19  
18  
17  
16  
V
CC  
3, 4, 7, 8,  
13, 14, 17, 18  
Q7  
D0-D7  
D7  
D6  
Q6  
Q5  
D5  
D4  
Q4  
2, 5, 6, 9,  
12, 15, 16, 19  
Q0-Q7  
Inverting 3-State outputs  
Clock pulse input  
(active rising edge)  
11  
CP  
6
7
8
9
15  
14  
13  
12  
10  
20  
GND  
Ground (0V)  
V
CC  
Positive supply voltage  
GND 10  
11 CP  
SA00161  
2
1997 Feb 03  
853-1910 17722  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop, inverting (3-State)  
74ABT534A  
LOGIC SYMBOL  
LOGIC SYMBOL (IEEE/IEC)  
1
EN  
11  
3
4
7
8
13 14 17 18  
C1  
3
2
D0 D1 D2 D3 D4 D5 D6 D7  
CP  
1D  
4
7
5
11  
1
6
OE  
8
9
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7  
13  
14  
17  
18  
12  
15  
2
5
6
9
12 15 16 19  
16  
19  
SA00162  
SA00163  
FUNCTION TABLE  
H
h
=
=
High voltage level  
High voltage level one set-up time prior to the Low-to-High  
clock transition  
Low voltage level  
Low voltage level one set-up time prior to the Low-to-High  
clock transition  
OPERATING  
MODE  
INPUTS  
CP  
INTERNAL  
REGISTER  
OUTPUTS  
Q0 – Q7  
L
l
=
=
OE  
Dn  
L
L
l
h
L
H
H
L
Latch and read  
register  
NC= No change  
X
Z
=
=
=
=
Don’t care  
L
X
NC  
NC  
Hold  
High impedance “off” state  
Low-to-High clock transition  
not a Low-to-High clock transition  
H
H
X
Dn  
NC  
Dn  
Z
Z
Disable  
outputs  
LOGIC DIAGRAM  
D0  
3
D1  
D2  
D3  
D4  
13  
D5  
14  
D6  
17  
D7  
18  
4
7
8
D
D
D
D
D
D
D
D
CP  
Q
CP  
Q
CP  
Q
CP  
Q
CP  
Q
CP  
Q
CP  
Q
CP Q  
11  
1
CP  
OE  
2
5
6
9
12  
Q4  
15  
Q5  
16  
Q6  
19  
Q7  
Q0  
Q1  
Q2  
Q3  
SA00164  
3
1997 Feb 03  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop, inverting (3-State)  
74ABT534A  
1, 2  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
DC supply voltage  
CONDITIONS  
RATING  
UNIT  
V
CC  
I
IK  
–0.5 to +7.0  
–18  
V
mA  
V
DC input diode current  
V < 0  
I
3
V
I
DC input voltage  
–1.2 to +7.0  
–50  
I
DC output diode current  
V
O
< 0  
mA  
V
OK  
3
V
DC output voltage  
output in Off or High state  
output in Low state  
–0.5 to +5.5  
128  
OUT  
OUT  
I
DC output current  
mA  
°C  
T
stg  
Storage temperature range  
–65 to 150  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction  
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.  
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
SYMBOL  
PARAMETER  
UNIT  
Min  
4.5  
0
Max  
V
CC  
DC supply voltage  
5.5  
V
V
V
I
Input voltage  
V
CC  
V
High-level input voltage  
Low-level Input voltage  
High-level output current  
Low-level output current  
Input transition rise or fall rate  
2.0  
V
IH  
V
0.8  
–32  
64  
V
IL  
I
mA  
mA  
ns/V  
°C  
OH  
I
OL  
t/v  
0
5
T
amb  
Operating free-air temperature range  
–40  
+85  
4
1997 Feb 03  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop, inverting (3-State)  
74ABT534A  
DC ELECTRICAL CHARACTERISTICS  
LIMITS  
T
= –40°C  
to +85°C  
amb  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
T
amb  
= +25°C  
UNIT  
Min  
Typ  
Max  
Min  
Max  
V
Input clamp voltage  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 4.5V; I = –18mA  
–0.9  
2.9  
–1.2  
–1.2  
V
V
V
V
V
IK  
IK  
= 4.5V; I = –3mA; V = V or V  
2.5  
3.0  
2.0  
2.5  
3.0  
2.0  
OH  
I
IL  
IH  
IH  
V
OH  
High-level output voltage  
Low-level output voltage  
= 5.0V; I = –3mA; V = V or V  
3.4  
OH  
I
IL  
= 4.5V; I = –32mA; V = V or V  
IH  
2.4  
OH  
I
IL  
V
OL  
= 4.5V; I = 64mA; V = V or V  
IH  
0.42  
0.55  
0.55  
OL  
I
IL  
I
Input leakage current  
V
V
= 5.5V; V = GND or 5.5V  
±0.01  
±5.0  
±1.0  
±1.0  
µA  
µA  
I
CC  
I
I
Power-off leakage current  
Power-up/down 3-State  
= 0.0V; V or V 4.5V  
±100  
±100  
OFF  
CC  
I
O
V
CC  
V
OE  
= 2.0V; V = 0.5V; V = GND or V  
;
O
I
CC  
CC  
I
/I  
±5.0  
±50  
±50  
µA  
PU PD  
3
output current  
= V  
CC  
I
3-State output High current  
3-State output Low current  
Output High leakage current  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 5.5V; V = 2.7V; V = V or V  
0.1  
–0.1  
0.1  
10  
–10  
50  
10  
–10  
50  
µA  
µA  
µA  
mA  
µA  
mA  
OZH  
O
I
IL  
IH  
IH  
I
= 5.5V; V = 0.5V; V = V or V  
O I IL  
OZL  
I
= 5.5V; V = 5.5V; V = GND or V  
CEX  
O
I
1
I
O
Output current  
= 5.5V; V = 2.5V  
–50  
–100  
100  
24  
–180  
250  
30  
–50  
–180  
250  
30  
O
I
= 5.5V; Outputs High, V = GND or V  
CCH  
I
CC  
I
Quiescent supply current  
= 5.5V; Outputs Low, V = GND or V  
CCL  
I
CC  
= 5.5V; Outputs 3-State;  
I
100  
0.5  
250  
1.5  
250  
1.5  
µA  
CCZ  
V = GND or V  
I
CC  
Additional supply current per  
V
CC  
= 5.5V; one input at 3.4V,  
I  
CC  
mA  
2
input pin  
other inputs at V or GND  
CC  
NOTES:  
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.  
2. This is the increase in supply current for each input at 3.4V.  
3
This parameter is valid for any V between 0V and 2.1V with a transition time of up to 10msec. For V = 2.1V to V = 5V " 10%, a  
CC CC CC  
transition time of up to 100µsec is permitted.  
AC CHARACTERISTICS  
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω  
R
F
L
L
LIMITS  
Max  
T
= -40 to  
+85 C  
= +5.0V ±0.5V  
amb  
o
T
V
= +25 C  
amb  
CC  
o
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
= +5.0V  
V
CC  
Min  
Typ  
Min  
Max  
f
Maximum clock frequency  
1
1
125  
350  
125  
ns  
ns  
MAX  
1
1
1
1
1
t
t
Propagation delay  
CP to Qn  
2.0  
2.4  
3.3  
3.6  
4.2  
4.7  
2.0  
2.4  
5.0  
5.1  
PLH  
PHL  
1
t
t
Output enable time  
to High and Low level  
3
4
1.0  
2.6  
3.1  
3.9  
4.2  
4.9  
1.0  
2.6  
5.0  
5.5  
PZH  
PZL  
ns  
ns  
1
1
1
1
1
1
1
1
t
t
Output disable time  
from High and Low level  
3
4
1.8  
1.6  
3.3  
2.8  
4.3  
3.6  
1.8  
1.6  
4.6  
4.1  
PHZ  
PLZ  
1
1
NOTE:  
1. This datasheet limit may vary among suppliers.  
5
1997 Feb 03  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop, inverting (3-State)  
74ABT534A  
AC SETUP REQUIREMENTS  
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω  
R
F
L
L
LIMITS  
T
= -40 to  
+85 C  
= +5.0V ±0.5V  
amb  
o
T
V
= +25 C  
amb  
CC  
o
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
= +5.0V  
V
CC  
Min  
Typ  
Min  
1
1
1
1
t (H)  
t (L)  
s
Setup time, High or Low  
Dn to CP  
1.0  
1.0  
0.4  
0.3  
1.0  
1.0  
s
2
2
1
ns  
ns  
ns  
t (H)  
Hold time, High or Low  
Dn to CP  
0.5  
0.5  
–0.3  
–0.4  
0.5  
0.5  
h
t (L)  
h
1
1
1
1
t (H)  
CP pulse width  
High or Low  
1.5  
2.0  
0.8  
1.0  
1.5  
2.0  
w
t (L)  
w
NOTE:  
1. This datasheet limit may vary among suppliers.  
AC WAVEFORMS  
V
M
= 1.5V, V = GND to 3.0V  
IN  
1/f  
MAX  
V
V
V
V
V
Dn  
CP  
M
M
M
M
CP  
Qn  
V
V
V
M
M
t
M
t (H)  
t
(H)  
t (L)  
s
t (L)  
h
s
h
t
(H)  
t (L)  
w
w
t
PLH  
PHL  
V
M
M
V
V
M
M
NOTE: The shaded areas indicate when the input is permitted  
to change for predictable output performance.  
SA00165  
SA00107  
Waveform 2. Data Setup and Hold Times  
Waveform 1. Propagation Delay, Clock Input to Output, Clock  
Pulse Width, and Maximum Clock Frequency  
V
V
M
OE  
Qn  
M
t
V
V
M
OE  
Qn  
M
t
t
PZH  
PHZ  
t
PZL  
PLZ  
V
–0.3V  
0V  
OH  
V
M
V
M
V
+0.3V  
OL  
SA00166  
SA00167  
Waveform 3. 3-State Output Enable Time to High Level and  
Output Disable Time from High Level  
Waveform 4. 3-State Output Enable Time to Low Level and  
Output Disable Time from Low Level  
6
1997 Feb 03  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop, inverting (3-State)  
74ABT534A  
TEST CIRCUIT AND WAVEFORM  
V
t
W
AMP (V)  
90%  
CC  
90%  
7.0V  
NEGATIVE  
PULSE  
V
V
M
M
10%  
10%  
90%  
R
L
0V  
(t  
V
V
OUT  
IN  
PULSE  
GENERATOR  
D.U.T.  
t
t
(t  
(t  
)
t
t
)
THL  
F
TLH  
R
)
(t )  
F
R
R
L
C
TLH  
R
THL  
T
L
AMP (V)  
90%  
M
POSITIVE  
PULSE  
V
V
M
Test Circuit for 3-State Outputs  
10%  
10%  
t
W
0V  
SWITCH POSITION  
V
= 1.5V  
M
TEST  
SWITCH  
closed  
closed  
open  
Input Pulse Definition  
t
t
PLZ  
PZL  
All other  
INPUT PULSE REQUIREMENTS  
DEFINITIONS  
R = Load resistor; see AC CHARACTERISTICS for value.  
L
FAMILY  
Amplitude  
3.0V  
Rep. Rate  
1MHz  
t
t
t
F
W
R
C = Load capacitance includes jig and probe capacitance;  
L
see AC CHARACTERISTICS for value.  
74ABT  
500ns 2.5ns 2.5ns  
R = Termination resistance should be equal to Z  
T
of  
OUT  
pulse generators.  
SA00012  
7
1997 Feb 03  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop, inverting (3-State)  
74ABT534A  
DIP20: plastic dual in-line package; 20 leads (300 mil)  
SOT146-1  
8
1997 Feb 03  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop, inverting (3-State)  
74ABT534A  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
9
1997 Feb 03  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop, inverting (3-State)  
74ABT534A  
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm  
SOT339-1  
10  
1997 Feb 03  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop, inverting (3-State)  
74ABT534A  
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm  
SOT360-1  
11  
1997 Feb 03  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop, inverting (3-State)  
74ABT534A  
DEFINITIONS  
Data Sheet Identification  
Product Status  
Definition  
This data sheet contains the design target or goal specifications for product development. Specifications  
may change in any manner without notice.  
Objective Specification  
Formative or in Design  
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to make changes at any time without notice in order to improve design  
and supply the best possible product.  
Preliminary Specification  
Product Specification  
Preproduction Product  
Full Production  
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes  
at any time without notice, in order to improve design and supply the best possible product.  
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,  
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,  
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes  
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting  
or modification.  
LIFE SUPPORT APPLICATIONS  
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,  
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected  
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips  
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully  
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1997  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
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74ABT534A; Octal  
D-type flip-flop,  
inverting (3-State)  
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General description  
The 74ABT534A high-performance BiCMOS device combines low static and dynamic power dissipation with high  
speed and high output drive.  
Catalog by  
System  
Cross-reference  
Packages  
The 74ABT534A is an 8-bit, edge triggered register coupled to eight 3-State output buffers. The two sections of the  
device are controlled independently by the clock (CP) and Output Enable (OE) control gates.  
End of Life  
information  
Distributors Go  
Here!  
The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock  
transition, is transferred to the corresponding flip-flop’s output.  
The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS  
microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the clock  
operation.  
Models  
SoC solutions  
When OE is Low, the stored data appears at the outputs. When OE is High, the outputs are in the High-impedance  
'OFF' state, which means they will neither drive nor load the bus.  
to
Features  
8-bit positive edge triggered register  
3-State output buffers  
Output capability: +64mA/-32mA  
Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17  
ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model  
Power-up 3-State  
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Applications  
AN203_2: Test Fixtures for High Speed Logic (date 02-Apr-98)  
Down  
AN2301: Simulation Support for Philips' Advanced BiCMOS Products  
Down  
 
to
Datasheet  
Type number Title  
Publication release Datasheet status  
date  
Page  
count  
File size Datasheet  
(kB)  
74ABT534A Octal D-type  
flip-flop,  
2/3/1997  
Product specification 12  
122  
Download  
Down  
inverting (3-  
State)  
to
Blockdiagram(s)  
Block diagram of  
74ABT534AD  
to
Parametrics  
Type number Package  
Description Propagation Voltage No. Power  
Logic  
Output  
Delay(ns)  
of Dissipation  
Switching Drive  
Pins Considerations Levels  
Capability  
Octal D-  
Type Flip-  
Flop;  
SOT163  
74ABT534AD  
(SO20)  
Positive-  
Edge  
Trigger;  
Inverting (3-  
State)  
5 Volts  
+
4~6  
20 None  
20 None  
20 None  
20 None  
TTL  
TTL  
TTL  
TTL  
High  
Octal D-  
Type Flip-  
Flop;  
Positive-  
Edge  
Trigger;  
Inverting (3-  
State)  
SOT339-1  
74ABT534ADB  
5 Volts  
+
4~6  
4~6  
4~6  
High  
High  
High  
(SSOP20)  
Octal D-  
Type Flip-  
Flop;  
Positive-  
Edge  
Trigger;  
Inverting (3-  
State)  
SOT146-1  
74ABT534AN  
5 Volts  
+
(DIP20)  
Octal D-  
Type Flip-  
Flop;  
Positive-  
Edge  
SOT360-1  
74ABT534APW  
5 Volts  
+
(TSSOP20)  
Trigger;  
Inverting (3-  
State)  
to
Products, packages, availability and ordering  
Type number  
North American Ordering code Marking/Packing Package Device  
Buy online  
IC packing info  
type number  
(12NC)  
status  
Down  
SOT163  
(SO20)  
Standard Marking  
* Tube  
Full production  
74ABT534AD 74ABT534AD 9352 419 20112  
-
-
-
-
order this  
order this  
order this  
order this  
Standard Marking  
9352 419 20118 * Reel Pack,  
SOT163  
(SO20)  
74ABT534AD-  
T
Full production  
Full production  
Full production  
SMD, 13"  
SOT339-1  
(SSOP20)  
Standard Marking  
* Tube  
74ABT534ADB 74ABT534ADB 9352 419 30112  
Standard Marking  
9352 419 30118 * Reel Pack,  
SOT339-1  
(SSOP20)  
74ABT534ADB-  
T
SMD, 13"  
SOT146-1  
(DIP20)  
Standard Marking  
* Tube  
Full production  
Full production  
74ABT534AN 74ABT534AN 9352 419 50112  
-
-
order this  
order this  
SOT360-1  
Standard Marking  
* Tube  
74ABT534APW 74ABT534APW 9352 419 40112  
74ABT534APW-  
(TSSOP20)  
Standard Marking  
SMD, 13"  
SOT360-1  
Full production  
9352 419 40118 * Reel Pack,  
(TSSOP20)  
-
order this  
T
Products in the above table are all in production. Some variants are discontinued; click here for information on these  
variants.  
to
Similar products  
74ABT534A links to the similar products page containing an overview of products that are similar in function  
Produ  
or related to the type number(s) as listed on this page. The similar products page includes products from the same  
catalog tree(s), relevant selection guides and products from the same functional category.  
to
Support & tools  
ABT family characteristics, Family specifications(date 01-Mar-98)  
Down  
Introduction to Advanced BiCMOS Logic Products(date 01-Mar-98)  
Down  
Advanced BiCMOS features(date 01-Jan-98)  
Down  
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