74AHC04PW-T [NXP]

IC AHC/VHC/H/U/V SERIES, HEX 1-INPUT INVERT GATE, PDSO14, 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14, Gate;
74AHC04PW-T
型号: 74AHC04PW-T
厂家: NXP    NXP
描述:

IC AHC/VHC/H/U/V SERIES, HEX 1-INPUT INVERT GATE, PDSO14, 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14, Gate

栅 输入元件 光电二极管 逻辑集成电路 触发器
文件: 总15页 (文件大小:110K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
74AHC04; 74AHCT04  
hex inverter  
Rev. 6 — 7 November 2011  
Product data sheet  
1. General description  
The 74AHC04; 74AHCT04 is a high-speed Si-gate CMOS device and is pin compatible  
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard  
No. 7-A.  
The 74AHC04; 74AHCT04 provides six inverting buffers.  
2. Features and benefits  
Balanced propagation delays  
Inputs accept voltages higher than VCC  
Input levels:  
For 74AHC04: CMOS level  
For 74AHCT04: TTL level  
ESD protection:  
HBM EIA/JESD22-A114F exceeds 2000 V  
MM EIA/JESD22-A115-A exceeds 200 V  
CDM EIA/JESD22-C101C exceeds 1000 V  
Multiple package options  
Specified from 40 C to +85 C and from 40 C to +125 C  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range  
Name  
Description  
Version  
74AHC04  
74AHC04D  
40 C to +125 C  
40 C to +125 C  
40 C to +125 C  
SO14  
plastic small outline package; 14 leads;  
body width 3.9 mm  
SOT108-1  
74AHC04PW  
74AHC04BQ  
TSSOP14  
DHVQFN14  
plastic thin shrink small outline package; 14 leads; SOT402-1  
body width 4.4 mm  
plastic dual in-line compatible thermal enhanced SOT762-1  
very thin quad flat package; no leads;  
14 terminals; body 2.5 3 0.85 mm  
 
 
 
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
Table 1.  
Ordering information …continued  
Type number  
Package  
Temperature range  
Name  
Description  
Version  
74AHCT04  
74AHCT04D  
40 C to +125 C  
40 C to +125 C  
40 C to +125 C  
SO14  
plastic small outline package; 14 leads;  
body width 3.9 mm  
SOT108-1  
74AHCT04PW  
74AHCT04BQ  
TSSOP14  
DHVQFN14  
plastic thin shrink small outline package; 14 leads; SOT402-1  
body width 4.4 mm  
plastic dual in-line compatible thermal enhanced SOT762-1  
very thin quad flat package; no leads;  
14 terminals; body 2.5 3 0.85 mm  
4. Functional diagram  
1
1
3
2
1
1
1
1
1
1Y  
1A  
2A  
3A  
4A  
5A  
6A  
2
4
1
3
4
2Y  
3Y  
4Y  
5Y  
6Y  
5
6
6
5
9
8
8
9
10  
12  
11  
13  
11  
13  
10  
12  
mna343  
mna342  
Fig 1. Logic symbol  
Fig 2. IEC logic symbol  
Y
A
mna341  
Fig 3. Logic diagram (one inverter)  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
2 of 15  
 
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
5. Pinning information  
5.1 Pinning  
terminal 1  
index area  
2
3
4
5
6
13  
12  
11  
10  
9
1Y  
2A  
2Y  
3A  
3Y  
6A  
6Y  
5A  
5Y  
4A  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1Y  
V
CC  
6A  
6Y  
5A  
5Y  
4A  
4Y  
04  
2A  
(1)  
GND  
2Y  
04  
3A  
3Y  
001aac442  
GND  
8
Transparent top view  
001aac441  
(1) The die substrate is attached to the exposed die pad  
using conductive die attach material. It can not be used  
as a supply pin or input.  
Fig 4. Pin configuration SO14 and TSSOP14  
Fig 5. Pin configuration DHVQFN14  
5.2 Pin description  
Table 2.  
Symbol  
Pin description  
Pin  
Description  
1A, 2A, 3A, 4A, 5A, 6A 1, 3, 5, 9, 11, 13 data input  
1Y, 2Y, 3Y, 4Y, 5Y, 6Y 2, 4, 6, 8, 10, 12 data output  
GND  
VCC  
7
ground (0 V)  
14  
supply voltage  
6. Functional description  
Table 3.  
Function table[1]  
Input nA  
Output nY  
L
H
L
H
[1] H = HIGH voltage level;  
L = LOW voltage level.  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
3 of 15  
 
 
 
 
 
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
7. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
0.5  
0.5  
20  
20  
25  
-
Max  
+7.0  
+7.0  
-
Unit  
V
VCC  
VI  
supply voltage  
input voltage  
V
[1]  
[1]  
IIK  
input clamping current  
output clamping current  
output current  
VI < 0.5 V  
mA  
mA  
mA  
mA  
mA  
C  
IOK  
IO  
VO <0.5 V or VO > VCC + 0.5 V  
VO =0.5 V to (VCC + 0.5 V)  
+20  
+25  
+75  
-
ICC  
IGND  
Tstg  
Ptot  
supply current  
ground current  
75  
65  
-
storage temperature  
total power dissipation  
+150  
500  
[2]  
Tamb = 40 C to +125 C  
mW  
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] For SO14 packages: above 70 C the value of Ptot derates linearly at 8 mW/K.  
For TSSOP14 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K.  
For DHVQFN14 packages: above 60 C the value of Ptot derates linearly at 4.5 mW/K.  
8. Recommended operating conditions  
Table 5.  
Operating conditions  
Symbol Parameter  
74AHC04  
Conditions  
Min  
Typ  
Max  
Unit  
VCC  
VI  
supply voltage  
2.0  
5.0  
5.5  
V
input voltage  
0
-
5.5  
V
VO  
output voltage  
0
-
VCC  
+125  
100  
20  
V
Tamb  
t/V  
ambient temperature  
input transition rise and fall rate  
40  
+25  
C  
ns/V  
ns/V  
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
-
-
-
-
74AHCT04  
VCC  
VI  
supply voltage  
4.5  
0
5.0  
5.5  
V
input voltage  
-
5.5  
V
VO  
output voltage  
0
-
VCC  
+125  
20  
V
Tamb  
t/V  
ambient temperature  
input transition rise and fall rate  
40  
-
+25  
-
C  
ns/V  
VCC = 4.5 V to 5.5 V  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
4 of 15  
 
 
 
 
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
9. Static characteristics  
Table 6.  
Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 C  
Min Typ  
40 C to +85 C 40 C to +125 C Unit  
Max  
Min  
Max  
Min  
Max  
74AHC04  
VIH  
HIGH-level  
input voltage  
VCC = 2.0 V  
1.5  
-
-
-
-
-
-
-
-
1.5  
-
-
1.5  
-
-
V
V
V
V
V
V
VCC = 3.0 V  
2.1  
2.1  
2.1  
VCC = 5.5 V  
3.85  
-
3.85  
-
3.85  
-
VIL  
LOW-level  
input voltage  
VCC = 2.0 V  
-
-
-
0.5  
0.9  
1.65  
-
-
-
0.5  
0.9  
1.65  
-
-
-
0.5  
0.9  
1.65  
VCC = 3.0 V  
VCC = 5.5 V  
VOH  
HIGH-level  
VI = VIH or VIL  
output voltage  
IO = 50 A; VCC = 2.0 V  
IO = 50 A; VCC = 3.0 V  
IO = 50 A; VCC = 4.5 V  
1.9  
2.9  
4.4  
2.0  
3.0  
4.5  
-
-
-
-
-
-
1.9  
2.9  
-
-
-
-
-
1.9  
2.9  
-
-
-
-
-
V
V
V
V
V
4.4  
4.4  
IO = 4.0 mA; VCC = 3.0 V 2.58  
IO = 8.0 mA; VCC = 4.5 V 3.94  
VI = VIH or VIL  
2.48  
3.80  
2.40  
3.70  
-
VOL  
LOW-level  
output voltage  
IO = 50 A; VCC = 2.0 V  
IO = 50 A; VCC = 3.0 V  
IO = 50 A; VCC = 4.5 V  
IO = 4.0 mA; VCC = 3.0 V  
IO = 8.0 mA; VCC = 4.5 V  
-
-
-
-
-
-
0
0
0
-
0.1  
0.1  
-
-
-
-
-
-
0.1  
0.1  
-
-
-
-
-
-
0.1  
0.1  
V
V
0.1  
0.1  
0.1  
V
0.36  
0.36  
0.1  
0.44  
0.44  
1.0  
0.55  
0.55  
2.0  
V
-
V
II  
input leakage VI = 5.5 V or GND;  
current VCC = 0 V to 5.5 V  
-
A  
ICC  
CI  
supply current VI = VCC or GND; IO = 0 A;  
VCC = 5.5 V  
-
-
-
2.0  
10  
-
-
20  
10  
-
-
40  
10  
A  
input  
VI = VCC or GND  
3
pF  
capacitance  
74AHCT04  
VIH  
HIGH-level  
input voltage  
VCC = 4.5 V to 5.5 V  
VCC = 4.5 V to 5.5 V  
2.0  
-
-
-
-
2.0  
-
-
2.0  
-
-
V
V
VIL  
LOW-level  
0.8  
0.8  
0.8  
input voltage  
VOH  
HIGH-level  
output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 50 A  
4.4  
4.5  
-
-
-
4.4  
-
-
4.4  
-
-
V
V
IO = 8.0 mA  
3.94  
3.80  
3.70  
VOL  
LOW-level  
output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 50 A  
-
-
-
0
-
0.1  
0.36  
0.1  
-
-
-
0.1  
0.44  
1.0  
-
-
-
0.1  
0.55  
2.0  
V
IO = 8.0 mA  
V
II  
input leakage VI = 5.5 V or GND;  
current VCC = 0 V to 5.5 V  
-
A  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
5 of 15  
 
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
Table 6.  
Static characteristics …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit  
Min Typ  
Max  
Min  
Max  
Min  
Max  
ICC  
supply current VI = VCC or GND; IO = 0 A;  
VCC = 5.5 V  
-
-
2.0  
-
20  
-
40  
A  
ICC  
additional  
per input pin;  
-
-
1.35  
10  
-
-
1.5  
10  
-
-
1.5  
10  
mA  
supply current VI = VCC 2.1 V; other pins  
at VCC or GND; IO = 0 A;  
VCC = 4.5 V to 5.5 V  
CI  
input  
VI = VCC or GND  
-
3
pF  
capacitance  
10. Dynamic characteristics  
Table 7.  
Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7.  
Symbol Parameter Conditions  
74AHC04  
25 C  
Min Typ[1] Max  
40 C to +85 C 40 C to +125 C Unit  
Min  
Max  
Min  
Max  
[2]  
tpd  
propagation nA to nY; see Figure 6  
delay  
VCC = 3.0 V to 3.6 V  
CL = 15 pF  
-
-
4.0  
8.5  
1.0  
1.0  
10.5  
13  
1.0  
1.0  
11.0  
14.5  
ns  
ns  
CL = 50 pF  
6.0 11.4  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
-
-
-
3.0  
4.5  
5.5  
7.5  
-
1.0  
1.0  
-
6.5  
8.5  
-
1.0  
1.0  
-
7.0  
9.5  
-
ns  
ns  
pF  
CL = 50 pF  
[3]  
CPD  
power  
fi = 1 MHz; VI = GND to VCC  
13.5  
dissipation  
capacitance  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
6 of 15  
 
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
Table 7.  
Dynamic characteristics …continued  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7.  
Symbol Parameter Conditions  
25 C  
Min Typ[1] Max  
40 C to +85 C 40 C to +125 C Unit  
Min  
Max  
Min  
Max  
74AHCT04; VCC = 4.5 V to 5.5 V  
[2]  
[3]  
tpd  
propagation nA to nY; see Figure 6  
delay  
CL = 15 pF  
-
-
-
3.0  
4.5  
6.7  
7.7  
-
1.0  
1.0  
-
7.5  
8.5  
-
1.0  
1.0  
-
8.5  
10.0  
-
ns  
ns  
pF  
CL = 50 pF  
CPD  
power  
fi = 1 MHz; VI = GND to VCC  
13.9  
dissipation  
capacitance  
[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).  
[2] tpd is the same as tPLH and tPHL  
.
[3] CPD is used to determine the dynamic power dissipation (PD in W).  
PD = CPD VCC2 fi N + (CL VCC2 fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
(CL VCC2 fo) = sum of the outputs.  
11. Waveforms  
V
I
V
V
M
nA input  
M
GND  
t
t
PHL  
PLH  
V
OH  
V
V
M
nY output  
M
V
mna344  
OL  
Measurement points are given in Table 8.  
OH and VOL are typical output voltage drop that occur with the output load.  
V
Fig 6. Input to output propagation delay  
Table 8.  
Type  
Measurement points  
Input  
Output  
VM  
VM  
74AHC04  
0.5 VCC  
1.5 V  
0.5 VCC  
0.5 VCC  
74AHCT04  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
7 of 15  
 
 
 
 
 
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
V
M
M
10 %  
GND  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
M
M
10 %  
GND  
t
W
V
CC  
V
V
O
I
G
DUT  
R
T
C
L
001aah768  
Test data is given in Table 9.  
Definitions test circuit:  
RT = termination resistance should be equal to output impedance Zo of the pulse generator.  
CL = load capacitance including jig and probe capacitance.  
Fig 7. Load circuitry for measuring switching times  
Table 9.  
Type  
Test data  
Input  
VI  
Load  
Test  
tr, tf  
CL  
74AHC04  
VCC  
3.0 V  
3.0 ns  
3.0 ns  
15 pF, 50 pF  
15 pF, 50 pF  
tPLH, tPHL  
tPLH, tPHL  
74AHCT04  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
8 of 15  
 
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
12. Package outline  
SO14: plastic small outline package; 14 leads; body width 3.9 mm  
SOT108-1  
D
E
A
X
v
c
y
H
M
A
E
Z
8
14  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
7
e
detail X  
w
M
b
p
0
2.5  
scale  
5 mm  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
8.75  
8.55  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.75  
1.27  
0.05  
1.05  
0.25  
0.01  
0.25  
0.1  
0.25  
0.01  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.35  
0.014 0.0075 0.34  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.024  
0.028  
0.012  
inches  
0.041  
0.01 0.004  
0.069  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT108-1  
076E06  
MS-012  
Fig 8. Package outline SOT108-1 (SO14)  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
9 of 15  
 
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm  
SOT402-1  
D
E
A
X
c
y
H
v
M
A
E
Z
8
14  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
7
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
5.1  
4.9  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.72  
0.38  
mm  
1.1  
0.65  
0.25  
1
0.2  
0.13  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT402-1  
MO-153  
Fig 9. Package outline SOT402-1 (TSSOP14)  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
10 of 15  
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;  
14 terminals; body 2.5 x 3 x 0.85 mm  
SOT762-1  
B
A
D
A
A
1
E
c
detail X  
terminal 1  
index area  
C
terminal 1  
index area  
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
6
L
1
7
8
E
h
e
14  
13  
9
D
h
X
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
(1)  
(1)  
UNIT  
A
1
b
c
E
e
e
1
y
D
D
E
L
v
w
y
h
h
1
max.  
0.05 0.30  
0.00 0.18  
3.1  
2.9  
1.65  
1.35  
2.6  
2.4  
1.15  
0.85  
0.5  
0.3  
mm  
0.05  
0.1  
1
0.2  
0.5  
2
0.1  
0.05  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-10-17  
03-01-27  
SOT762-1  
- - -  
MO-241  
- - -  
Fig 10. Package outline SOT762-1 (DHVQFN14)  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
11 of 15  
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
13. Abbreviations  
Table 10. Abbreviations  
Acronym  
CDM  
Description  
Charged Device Model  
CMOS  
DUT  
Complementary Metal-Oxide Semiconductor  
Device Under Test  
ESD  
ElectroStatic Discharge  
HBM  
Human Body Model  
LSTTL  
MM  
Low-power Schottky Transistor-Transistor Logic  
Machine Model  
14. Revision history  
Table 11. Revision history  
Document ID  
Release date  
20111107  
Data sheet status  
Change notice  
Supersedes  
74AHC_AHCT04 v.6  
Modifications:  
Product data sheet  
-
74AHC_AHCT04 v.5  
Legal pages updated.  
74AHC_AHCT04 v.5  
74AHC_AHCT04 v.4  
74AHC_AHCT04 v.3  
74AHC_AHCT04 v.2  
74AHC_AHCT04 v.1  
20110411  
20080514  
20050207  
19990927  
19990225  
Product data sheet  
-
-
-
-
-
74AHC_AHCT04 v.4  
74AHC_AHCT04 v.3  
74AHC_AHCT04 v.2  
74AHC_AHCT04 v.1  
-
Product data sheet  
Product data sheet  
Product specification  
Product specification  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
12 of 15  
 
 
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
15. Legal information  
15.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
malfunction of an NXP Semiconductors product can reasonably be expected  
15.2 Definitions  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
15.3 Disclaimers  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
13 of 15  
 
 
 
 
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
non-automotive qualified products in automotive equipment or applications.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
15.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
16. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
74AHC_AHCT04  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 7 November 2011  
14 of 15  
 
 
74AHC04; 74AHCT04  
NXP Semiconductors  
hex inverter  
17. Contents  
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 1  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
5
5.1  
5.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
6
Functional description . . . . . . . . . . . . . . . . . . . 3  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Recommended operating conditions. . . . . . . . 4  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12  
7
8
9
10  
11  
12  
13  
14  
15  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
15.1  
15.2  
15.3  
15.4  
16  
17  
Contact information. . . . . . . . . . . . . . . . . . . . . 14  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2011.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 7 November 2011  
Document identifier: 74AHC_AHCT04  
 

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