74AHCT1G66GV,125 [NXP]

74AHC(T)1G66 - Single-pole single-throw analog switch TSOP 5-Pin;
74AHCT1G66GV,125
型号: 74AHCT1G66GV,125
厂家: NXP    NXP
描述:

74AHC(T)1G66 - Single-pole single-throw analog switch TSOP 5-Pin

PC 光电二极管
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74AHC1G66; 74AHCT1G66  
Single-pole single-throw analog switch  
Rev. 04 — 18 December 2008  
Product data sheet  
1. General description  
74AHC1G66 and 74AHCT1G66 are high-speed Si-gate CMOS devices. They are  
single-pole single-throw analog switches. The switch has two input/output pins (Yand Z)  
and an active HIGH enable input pin (E). When pin E is LOW, the analog switch is turned  
off.  
2. Features  
I Very low ON resistance:  
N 26 (typ.) at VCC = 3.0 V  
N 16 (typ.) at VCC = 4.5 V  
N 14 (typ.) at VCC = 5.5 V  
I High noise immunity  
I Low power dissipation  
I Balanced propagation delays  
I Multiple package options  
I ESD protection:  
N HMB JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
N CDM JESD22-C101C exceeds 1000 V  
I Specified from 40 °C to +85 °C and 40 °C to +125 °C  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range  
40 °C to +125 °C  
Name  
Description  
Version  
74AHC1G66GW  
74AHCT1G66GW  
74AHC1G66GV  
74AHCT1G66GV  
TSSOP5  
plastic thin shrink small outline package;  
5 leads; body width 1.25 mm  
SOT353-1  
40 °C to +125 °C  
SC-74A  
plastic surface-mounted package; 5 leads  
SOT753  
 
 
 
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
4. Marking  
Table 2.  
Marking codes  
Type number  
Marking  
AL  
74AHC1G66GW  
74AHCT1G66GW  
74AHC1G66GV  
74AHCT1G66GV  
CL  
A66  
C66  
5. Functional diagram  
Z
Y
E
Z
E
Y
V
mna628  
CC  
001aag487  
Fig 1. Logic symbol  
Fig 2. Logic diagram  
6. Pinning information  
6.1 Pinning  
74AHC1G66  
74AHCT1G66  
1
2
3
5
4
Y
Z
V
E
CC  
GND  
001aai834  
Fig 3. Pin configuration SOT353-1 and SOT753  
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
2 of 17  
 
 
 
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
6.2 Pin description  
Table 3.  
Pin description  
Symbol  
Pin  
1
Description  
Y
independent input or output  
independent input or output  
ground (0 V)  
Z
2
GND  
E
3
4
enable input (active HIGH)  
supply voltage  
VCC  
5
7. Functional description  
Table 4.  
Function table[1]  
Input E  
Switch  
OFF  
L
H
ON  
[1] H = HIGH voltage level; L = LOW voltage level.  
8. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC  
IIK  
Parameter  
Conditions  
Min  
0.5  
20  
-
Max  
+7.0  
-
Unit  
V
supply voltage  
[1]  
[1]  
input clamping current  
switch clamping current  
switch current  
VI < 0.5 V  
mA  
mA  
mA  
mA  
mA  
°C  
ISK  
VI < 0.5 V or VI > VCC + 0.5 V  
0.5 V < VO < VCC + 0.5 V  
±20  
±25  
75  
ISW  
-
ICC  
supply current  
-
IGND  
Tstg  
Ptot  
ground current  
75  
65  
-
-
storage temperature  
total power dissipation  
+150  
250  
[2]  
Tamb = 40 °C to +125 °C  
mW  
[1] The input and output voltage ratings may be exceeded if the input and output voltage ratings are observed.  
[2] For TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.  
9. Recommended operating conditions  
Table 6.  
Recommended operating conditions  
Voltages are referenced to GND (ground = 0 V).[1]  
Symbol Parameter Conditions  
74AHC1G66  
74AHCT1G66  
Unit  
Min  
2.0  
0
Typ  
Max  
5.5  
Min  
4.5  
0
Typ  
Max  
VCC  
VI  
supply voltage  
input voltage  
switch voltage  
5.0  
5.0  
5.5  
5.5  
V
V
V
-
-
5.5  
-
-
VSW  
0
VCC  
0
VCC  
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
3 of 17  
 
 
 
 
 
 
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
Table 6.  
Recommended operating conditions …continued  
Voltages are referenced to GND (ground = 0 V).[1]  
Symbol Parameter  
Conditions  
74AHC1G66  
74AHCT1G66  
Unit  
Min  
Typ  
Max  
+125  
100  
20  
Min  
Typ  
Max  
+125 °C  
Tamb  
ambient temperature  
40  
+25  
40  
+25  
[2]  
[2]  
t/V  
input transition rise and VCC = 3.3 ± 0.3 V  
-
-
-
-
-
-
-
-
-
ns/V  
ns/V  
fall rate  
VCC = 5.0 ± 0.5 V  
20  
[1] To avoid drawing VCC current out of pin Z, when switch current flows in pin Y, the voltage drop across the bidirectional switch must not  
exceed 0.4 V. If the switch current flows into pin Z, no VCC current will flow out of terminal Y. In this case there is no limit for the voltage  
drop across the switch, but the voltage at pins Yand Z may not exceed VCC or GND.  
[2] Applies to control signal levels.  
10. Static characteristics  
Table 7.  
Static characteristics  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
74AHC1G66  
VIH  
HIGH-level  
input voltage  
VCC = 2.0 V  
VCC = 3.0 V  
VCC = 5.5 V  
VCC = 2.0 V  
VCC = 3.0 V  
VCC = 5.5 V  
1.5  
-
-
-
-
-
-
-
-
-
1.5  
-
-
1.5  
-
-
V
2.1  
2.1  
2.1  
V
3.85  
-
3.85  
-
3.85  
-
V
VIL  
LOW-level  
input voltage  
-
-
-
-
0.5  
0.9  
1.65  
0.1  
-
-
-
-
0.5  
0.9  
1.65  
1.0  
-
-
-
-
0.5  
0.9  
1.65  
2.0  
V
V
V
II  
input leakage VI = 5.5 V or GND;  
µA  
current  
VCC = 5.5 V  
IS(OFF)  
OFF-state  
leakage  
current  
Y or Z; VCC = 5.5 V;  
see Figure 4  
-
-
-
-
0.1  
0.1  
-
-
1.0  
1.0  
-
-
4.0  
4.0  
µA  
µA  
IS(ON)  
ON-state  
leakage  
current  
Y or Z; VCC = 5.5 V;  
see Figure 5  
ICC  
CI  
supply current E, Y or Z = VCC or GND;  
CC = 5.5 V  
-
-
-
-
1.0  
10  
10  
-
-
-
10  
10  
10  
-
-
-
40  
10  
10  
µA  
pF  
pF  
V
input  
E input  
2.0  
4.0  
capacitance  
CS(ON) ON-state  
capacitance  
Y or Z input or output  
74AHCT1G66  
VIH  
VIL  
II  
HIGH-level  
input voltage  
VCC = 4.5 V to 5.5 V  
VCC = 4.5 V to 5.5 V  
2.0  
-
-
-
-
2.0  
-
2.0  
-
V
LOW-level  
input voltage  
-
-
0.8  
0.1  
-
-
0.8  
1.0  
-
-
0.8  
2.0  
V
input leakage VI = 5.5 V or GND;  
current CC = 5.5 V  
µA  
V
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
4 of 17  
 
 
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
Table 7.  
Static characteristics …continued  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
IS(OFF)  
OFF-state  
leakage  
current  
Y or Z; VCC = 5.5 V;  
see Figure 4  
-
-
0.1  
-
1.0  
-
4.0  
µA  
µA  
IS(ON)  
ON-state  
leakage  
current  
Y or Z; VCC = 5.5 V;  
see Figure 5  
-
-
0.1  
-
1.0  
-
4.0  
ICC  
supply current E, Y or Z = VCC or GND;  
CC = 5.5 V  
-
-
-
-
1.0  
-
-
10  
-
-
40  
µA  
V
ICC  
additional  
per input pin; VI = 3.4 V;  
1.35  
1.5  
1.5  
mA  
supply current other inputs at VCC or GND;  
IO = 0 A; VCC = 5.5 V  
CI  
input  
capacitance  
E input  
-
-
2.0  
4.0  
10  
10  
-
-
10  
10  
-
-
10  
10  
pF  
pF  
CS(ON) ON-state  
capacitance  
Y or Z input or output  
10.1 Test circuits  
V
V
CC  
CC  
E
Y
E
Y
V
V
IH  
IL  
Z
Z
I
I
I
S
S
S
GND  
GND  
V
V
V
V
I
O
I
O
001aai835  
001aai836  
VI = VCC or GND and VO = GND or VCC  
.
VI = VCC or GND and VO = open circuit.  
Fig 4. Test circuit for measuring OFF-state  
leakage current  
Fig 5. Test circuit for measuring ON-state  
leakage current  
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
5 of 17  
 
 
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
10.2 ON resistance  
Table 8.  
ON resistance  
At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graph see Figure 7 [1]  
.
Symbol Parameter  
Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Typ max  
Max  
Max  
74AHC1G66 and 74AHCT1G66  
RON(peak) ON resistance VI = VCC to GND; see Figure 6  
(peak)  
ISW = 1.0 mA; VCC = 2.0 V  
148[1]  
-
-
-
ISW = 10 mA; VCC = 3.0 V to 3.6 V 28  
ISW = 10 mA; VCC = 4.5 V to 5.5 V 15  
RON(rail) ON resistance VI = GND; see Figure 6  
(rail)  
50  
30  
70  
40  
110  
60  
ISW = 1.0 mA; VCC = 2.0 V  
30  
-
-
-
ISW = 10 mA; VCC = 3.0 V to 3.6 V 20  
ISW = 10 mA; VCC = 4.5 V to 5.5 V 15  
VI = VCC; see Figure 6  
50  
22  
65  
26  
90  
40  
ISW = 1.0 mA; VCC = 2.0 V  
28  
-
-
-
ISW = 10 mA; VCC = 3.0 V to 3.6 V 18  
ISW = 10 mA; VCC = 4.5 V to 5.5 V 13  
50  
22  
65  
26  
90  
40  
[1] At supply voltages approaching 2 V, the analog switch ON resistance becomes extremely non-linear. Therefore it is recommended that  
these devices be used to transmit digital signals only, when using this supply voltage.  
10.3 ON resistance test circuit and graphs  
mna630  
40  
R
ON  
()  
30  
V
= 3.0 V  
CC  
V
SW  
20  
10  
0
V
CC  
4.5 V  
E
Y
5.5 V  
V
IH  
Z
GND  
V
I
I
SW  
0
2
4
6
V (V)  
I
001aag490  
RON = VSW / ISW  
.
Tamb = 25 °C.  
Fig 6. Test circuit for measuring ON resistance  
Fig 7. Typical ON resistance as a function of  
input voltage  
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
6 of 17  
 
 
 
 
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
11. Dynamic characteristics  
Table 9.  
Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V); CL = 50 pF; unless otherwise specified; For test circuit see Figure 10.  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Typ[1] max  
Max  
Max  
74AHC1G66  
[2]  
[2]  
tpd  
propagation  
delay  
Y to Z or Z to Y; see Figure 8  
VCC = 2.0 V  
2.2  
1.0  
0.6  
5.0  
2.0  
1.0  
6.0  
3.0  
2.0  
7.0  
4.0  
3.0  
ns  
ns  
ns  
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
E to Y or Z; see Figure 9  
VCC = 2.0 V; CL = 15 pF  
VCC = 2.0 V  
ten  
enable time  
7.0  
11.0  
4.0  
25.0  
35.0  
11.0  
33.0  
46.0  
14.0  
40.0  
57.0  
18.0  
ns  
ns  
ns  
VCC = 3.0 V to 3.6 V;  
CL = 15 pF  
VCC = 3.0 V to 3.6 V  
5.8  
3.0  
15.0  
8.0  
20.0  
10.0  
25.0  
13.0  
ns  
ns  
VCC = 4.5 V to 5.5 V;  
CL = 15 pF  
VCC = 4.5 V to 5.5 V  
E to Y or Z; see Figure 9  
VCC = 2.0 V; CL = 15 pF  
VCC = 2.0 V  
4.0  
11.0  
13.0  
17.0  
ns  
[2]  
tdis  
disable time  
9.0  
13.0  
6.0  
25.0  
35.0  
11.0  
33.0  
46.0  
14.0  
40.0  
57.0  
18.0  
ns  
ns  
ns  
VCC = 3.0 V to 3.6 V;  
CL = 15 pF  
VCC = 3.0 V to 3.6 V  
8.4  
5.0  
15.0  
8.0  
20.0  
10.0  
25.0  
13.0  
ns  
ns  
VCC = 4.5 V to 5.5 V;  
CL = 15 pF  
VCC = 4.5 V to 5.5 V  
VI = GND to VCC  
6.1  
13  
11.0  
-
13.0  
-
17.0  
-
ns  
[3]  
CPD  
power  
pF  
dissipation  
capacitance  
74AHCT1G66  
tpd propagation  
[2]  
[2]  
Y to Z or Z to Y; see Figure 8  
VCC = 4.5 V to 5.5 V  
delay  
0.7  
1.0  
2.0  
3.0  
ns  
ten  
enable time  
E to Y or Z; see Figure 9  
VCC = 4.5 V to 5.5 V;  
CL = 15 pF  
3.0  
4.7  
7.0  
10.0  
13.0  
13.0  
17.0  
ns  
ns  
VCC = 4.5 V to 5.5 V  
10.0  
[2]  
tdis  
disable time  
E to Y or Z; see Figure 9  
VCC = 4.5 V to 5.5 V;  
CL = 15 pF  
5.0  
6.5  
8.0  
10.0  
13.0  
13.0  
17.0  
ns  
ns  
VCC = 4.5 V to 5.5 V  
11.0  
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
7 of 17  
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
Table 9.  
Dynamic characteristics …continued  
Voltages are referenced to GND (ground = 0 V); CL = 50 pF; unless otherwise specified; For test circuit see Figure 10.  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Typ[1] max  
Max  
Max  
[3]  
CPD  
power  
VI = GND to VCC  
15  
-
-
-
pF  
dissipation  
capacitance  
[1] All typical values are measured at VCC = 2.0 V, VCC = 3.3 V, VCC = 5.0 V and Tamb = 25 °C.  
[2] tpd is the same as tPLH and tPHL  
ten is the same as tPZL and tPZH  
tdis is the same as tPLZ and tPHZ  
.
.
.
[3] CPD is used to determine the dynamic power dissipation PD (µW).  
PD = CPD × VCC2 × fi + Σ ((CL × CSW) × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
CSW = maximum switch capacitance in pF (see Table 7);  
VCC = supply voltage in Volt;  
Σ ((CL × CSW) × VCC2 × fo) = sum of outputs.  
11.1 Waveforms and test circuit  
V
I
V
Y or Z input  
M
GND  
t
t
PLH  
PHL  
V
OH  
V
M
Z or Y output  
V
OL  
mna667  
Measurement points are given in Table 10.  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Fig 8. Input (Y or Z) to output (Z or Y) propagation delays  
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
8 of 17  
 
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
V
I
E
V
M
GND  
t
t
PZL  
PLZ  
V
CC  
output  
Y or Z  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PZH  
PHZ  
V
OH  
V
Y
output  
Y or Z  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
switch  
enabled  
switch  
enabled  
switch  
disabled  
mna668  
Measurement points are given in Table 10.  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Fig 9. Enable and disable times  
Table 10. Measurement points  
Type  
Input  
VM  
Output  
VM  
VX  
VY  
74AHC1G66  
0.5VCC  
1.5 V  
0.5VCC  
1.5 V  
VOL + 0.3 V  
VOL + 0.3 V  
V
V
OH 0.3 V  
74AHCT1G66  
OH 0.3 V  
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
9 of 17  
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
V
CC  
CC  
V
V
O
I
R
L
S1  
G
open  
DUT  
R
T
C
L
001aad983  
Test data is given in Table 11.  
Definitions for test circuit:  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
CL = Load capacitance including jig and probe capacitance.  
RL = Load resistance.  
S1 = Test selection switch.  
Fig 10. Test circuit for measuring switching times  
Table 11. Test data  
Type  
Input  
VI  
Load  
CL  
S1 position  
tPHL, tPLH  
open  
tr, tf  
RL  
tPZH, tPHZ  
GND  
tPZL, tPLZ  
VCC  
74AHC1G66  
GND to VCC 3 ns  
3 ns  
15 pF, 50 pF 1 kΩ  
15 pF, 50 pF 1 kΩ  
74AHCT1G66 GND to 3 V  
open  
GND  
VCC  
11.2 Additional dynamic characteristics  
Table 12. Additional dynamic characteristics for 74AHC1G66 and 74AHCT1G66  
GND = 0 V; tr = tf = 3.0 ns; CL = 50 pF; unless otherwise specified. All typical values are measured at Tamb = 25 °C.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
THD  
total harmonic  
distortion  
fi = 1 kHz; RL = 10 k; see Figure 11  
VCC = 3.0 V to 3.6 V  
-
-
0.025  
0.015  
-
-
%
%
VCC = 4.5 V to 5.5 V  
fi = 10 kHz; RL = 10 k; see Figure 11  
VCC = 3.0 V to 3.6 V; VI = 2.5 V  
VCC = 4.5 V to 5.5 V; VI = 4.0 V  
-
-
0.025  
0.015  
-
-
%
%
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
10 of 17  
 
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
Table 12. Additional dynamic characteristics for 74AHC1G66 and 74AHCT1G66 …continued  
GND = 0 V; tr = tf = 3.0 ns; CL = 50 pF; unless otherwise specified. All typical values are measured at Tamb = 25 °C.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
f(3dB)  
3 dB frequency  
response  
RL = 50 ; CL = 10 pF;  
see Figure 12 and 13  
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
-
-
230  
280  
-
-
MHz  
MHz  
[1]  
αiso  
isolation (OFF-state) RL = 600 ; fi = 1 MHz; see Figure 14  
VCC = 3.0 V to 3.6 V; VI = 2.5 V  
-
-
50  
50  
-
-
dB  
dB  
VCC = 4.5 V to 5.5 V; VI = 4.0 V  
[1] Adjust input voltage VI to 0 dBm level (0 dBm =1 mW into 50 ).  
11.3 Test circuits and graphs  
V
V
CC  
CC  
E
V
IH  
2R  
L
10 µF  
Y/Z  
Z/Y  
V
O
f
2R  
L
C
L
D
i
001aai678  
Test conditions:  
VCC = 3.0 V to 3.6 V; VI = 2.5 V (p-p).  
VCC = 4.5 V to 5.5 V; VI = 4.0 V (p-p).  
Fig 11. Test circuit for measuring total harmonic distortion  
V
V
CC  
CC  
E
V
IH  
2R  
L
L
0.1 µF  
Y/Z  
Z/Y  
V
O
f
2R  
C
L
dB  
i
001aai680  
With fi = 1 MHz adjust the switch input voltage for a 0 dBm level at the switch output, (0 dBm = 1 mW into 50 ). Then increase  
the input fi frequency until the dB meter reads 3 dB.  
Fig 12. Test circuit for measuring the 3 dB frequency response  
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
11 of 17  
 
 
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
001aai837  
4
(dB)  
2
0
2  
4  
4
5
6
7
8
9
10  
10  
10  
10  
10  
10  
f (Hz)  
i
Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 ; RSOURCE = 1 k.  
Fig 13. Typical 3 dB frequency response  
V
V
CC  
CC  
E
V
IL  
2R  
L
0.1 µF  
Y/Z  
Z/Y  
V
O
f
C
L
2R  
L
dB  
i
001aai679  
Adjust the switch input voltage for a 0 dBm level (0 dBm = 1 mW into 600 ).  
Fig 14. Test circuit for measuring isolation (OFF-state)  
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
12 of 17  
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
12. Package outline  
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm  
SOT353-1  
D
E
A
X
c
y
H
v
M
A
E
Z
5
4
A
2
A
(A )  
3
A
1
θ
L
L
p
1
3
e
w M  
b
p
detail X  
e
1
0
1.5  
3 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
A
A
A
b
c
D
E
e
e
1
H
L
L
p
UNIT  
v
w
y
Z
θ
1
2
3
p
E
max.  
0.1  
0
1.0  
0.8  
0.30  
0.15  
0.25  
0.08  
2.25  
1.85  
1.35  
1.15  
2.25  
2.0  
0.46  
0.21  
0.60  
0.15  
7°  
0°  
mm  
1.1  
0.65  
1.3  
0.15  
0.425  
0.3  
0.1  
0.1  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
00-09-01  
03-02-19  
SOT353-1  
MO-203  
SC-88A  
Fig 15. Package outline SOT353-1 (TSSOP5)  
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
13 of 17  
 
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
Plastic surface-mounted package; 5 leads  
SOT753  
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
p
1
2
3
detail X  
e
b
p
w
M B  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
UNIT  
A
A
1
b
c
D
E
e
H
L
Q
v
w
y
p
p
E
0.100  
0.013  
0.40  
0.25  
1.1  
0.9  
0.26  
0.10  
3.1  
2.7  
1.7  
1.3  
3.0  
2.5  
0.6  
0.2  
0.33  
0.23  
mm  
0.95  
0.2  
0.2  
0.1  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
02-04-16  
06-03-16  
SOT753  
SC-74A  
Fig 16. Package outline SOT753 (SC-74A)  
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
14 of 17  
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
13. Abbreviations  
Table 13. Abbreviations  
Acronym  
CDM  
Description  
Charged Device Model  
CMOS  
DUT  
Complementary Metal-Oxide Semiconductor  
Device Under Test  
ESD  
ElectroStatic Discharge  
Human Body Model  
HBM  
MM  
Machine Model  
14. Revision history  
Table 14. Revision history  
Document ID  
Release date  
20081218  
Data sheet status  
Change notice  
Supersedes  
74AHC_AHCT1G66_4  
Modifications:  
Product data sheet  
-
74AHC_AHCT1G66_3  
The format of this data sheet has been redesigned to comply with the new identity  
guidelines of NXP Semiconductors.  
Legal texts have been adapted to the new company name where appropriate.  
Package SOT353 changed to SOT353-1 in Table 1 and Figure 15.  
Quick Reference Data and Soldering sections removed.  
Section 2 “Features” updated.  
74AHC_AHCT1G66_3  
74AHC_AHCT1G66_2  
74AHC_AHCT1G66_1  
20020606  
20020215  
20010129  
Product specification  
Product specification  
Product specification  
-
-
-
74AHC_AHCT1G66_2  
74AHC_AHCT1G66_1  
-
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
15 of 17  
 
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
15. Legal information  
15.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
malfunction of an NXP Semiconductors product can reasonably be expected  
15.2 Definitions  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
15.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
15.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
16. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
74AHC_AHCT1G66_4  
© NXP B.V. 2008. All rights reserved.  
Product data sheet  
Rev. 04 — 18 December 2008  
16 of 17  
 
 
 
 
 
 
74AHC1G66; 74AHCT1G66  
NXP Semiconductors  
Single-pole single-throw analog switch  
17. Contents  
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 1  
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
6
6.1  
6.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
7
8
9
Functional description . . . . . . . . . . . . . . . . . . . 3  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Recommended operating conditions. . . . . . . . 3  
10  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4  
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
ON resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 6  
ON resistance test circuit and graphs. . . . . . . . 6  
10.1  
10.2  
10.3  
11  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7  
Waveforms and test circuit . . . . . . . . . . . . . . . . 8  
Additional dynamic characteristics . . . . . . . . . 10  
Test circuits and graphs . . . . . . . . . . . . . . . . . 11  
11.1  
11.2  
11.3  
12  
13  
14  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15  
15  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 16  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
15.1  
15.2  
15.3  
15.4  
16  
17  
Contact information. . . . . . . . . . . . . . . . . . . . . 16  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2008.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 18 December 2008  
Document identifier: 74AHC_AHCT1G66_4  
 

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