74ALVC245BQ [NXP]
Octal bus transceiver; 3-state; 八路总线收发器;三态
| 型号： | 74ALVC245BQ |
| 厂家： | 
NXP |
| 描述： | Octal bus transceiver; 3-state |
| 文件： | 总14页 (文件大小：93K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74ALVC245
Octal bus transceiver; 3-state
Rev. 02 — 7 January 2008
Product data sheet
1. General description
The 74ALVC245 is an octal transceiver featuring non-inverting 3-state bus compatible
outputs in both send and receive directions. The 74ALVC245 features an output enable
input (OE) for easy cascading and send/receive input (DIR) for direction control. OE
controls the outputs, so that the buses are effectively isolated.
2. Features
■ Wide supply voltage range from 1.65 V to 3.6 V
■ Complies with JEDEC standard:
◆ JESD8-7 (1.65 V to 1.95 V)
◆ JESD8-5 (2.3 V to 2.5 V)
◆ JESD8B/JESD36 (2.7 V to 3.6 V)
■ 3.6 V tolerant inputs/outputs
■ CMOS low-power consumption
■ Direct interface with TTL levels (2.7 V to 3.6 V)
■ Power-down mode
■ Latch-up performance exceeds 250 mA
■ ESD protection:
◆ HBM JESD22-A114E exceeds 2000 V
◆ MM JESD22-A115-A exceeds 200 V
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
−40 °C to +85 °C
Name
Description
Version
74ALVC245D
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74ALVC245PW −40 °C to +85 °C
74ALVC245BQ −40 °C to +85 °C
TSSOP20
plastic thin shrink small outline package; 20 leads; SOT360-1
body width 4.4 mm
DHVQFN20 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 20 terminals;
body 2.5 × 4.5 × 0.85 mm
SOT764-1
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
4. Functional diagram
DIR
1
OE
19
18
17
A0
2
B0
B1
A1
3
A2
4
19
1
G3
B2
B3
B4
B5
B6
B7
3EN1
3EN2
16
15
A3
5
1
A4
6
18
2
2
14
13
12
11
3
4
5
6
7
8
9
17
16
15
14
13
12
11
A5
7
A6
8
A7
9
mna175
mna174
Fig 1. Logic symbol
Fig 2. IEC logic symbol
74ALVC245_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 7 January 2008
2 of 14
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
5. Pinning information
5.1 Pinning
terminal 1
index area
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
A0
OE
B0
B1
B2
B3
B4
B5
B6
A1
A2
A3
A4
A5
A6
A7
1
2
20
19
18
17
16
15
14
13
12
11
DIR
A0
V
CC
OE
B0
B1
B2
B3
B4
B5
B6
B7
3
A1
245
4
A2
5
A3
245
6
A4
(1)
GND
7
A5
8
A6
9
A7
001aac432
10
GND
001aac431
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
a supply pin or input.
Fig 3. Pin configuration SO20, TSSOP20
Fig 4. Pin configuration DHVQFN20
5.2 Pin description
Table 2.
Symbol
DIR
Pin description
Pin
Description
1
direction control
data input/output
A[0:7]
B[0:7]
2, 3, 4, 5, 6, 7, 8, 9
18, 17, 16, 15, 14, 13, 12, data input/output
11
GND
OE
10
19
20
ground (0 V)
output enable input (active LOW)
supply voltage
VCC
6. Functional description
Table 3.
Function table[1]
Input
OE
L
Input/output
DIR
L
An
Bn
A = B
input
Z
input
B = A
Z
L
H
H
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
74ALVC245_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 7 January 2008
3 of 14
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Min
−0.5
−0.5
−50
-
Max
+4.6
+4.6
-
Unit
V
supply voltage
input voltage
V
[1]
IIK
input clamping current
output clamping current
output voltage
VI < 0 V
mA
mA
IOK
VO > VCC or VO < 0 V
output HIGH or LOW state
output 3-state
±50
[2]
[2]
[3]
VO
−0.5
−0.5
−0.5
-
VCC + 0.5 V
+4.6
+4.6
±50
100
-
V
power-down mode, VCC = 0 V
VO = 0 V to VCC
V
IO
output current
mA
mA
mA
°C
ICC
IGND
Tstg
Ptot
supply current
-
ground current
−100
−65
storage temperature
total power dissipation
+150
Tamb = −40 °C to +85 °C
SO20 package
[4]
[5]
[6]
-
-
-
500
500
500
mW
mW
mW
TSSOP20 package
DHVQFN20 package
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.
[4] Ptot derates linearly with 8 mW/K above 70 °C.
[5] Ptot derates linearly with 5.5 mW/K above 60 °C.
[6] Ptot derates linearly with 4.5 mW/K above 60 °C.
8. Recommended operating conditions
Table 5.
Symbol
VCC
Recommended operating conditions
Parameter
Conditions
Min
Max
3.6
3.6
VCC
3.6
3.6
+85
20
Unit
V
supply voltage
input voltage
output voltage
1.65
VI
0
V
VO
output HIGH or LOW state
output 3-state
0
V
0
V
power-down mode, VCC = 0 V
0
V
Tamb
ambient temperature
−40
°C
ns/V
ns/V
∆t/∆V
input transition rise and fall rate VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 3.6 V
-
-
10
74ALVC245_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 7 January 2008
4 of 14
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
−40 °C to +85 °C
Unit
Min
Typ[1]
Max
VIH
HIGH-level input voltage VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
0.65 × VCC
-
-
-
-
-
-
-
V
V
V
V
V
V
1.7
-
VCC = 2.7 V to 3.6 V
2.0
-
0.35 × VCC
0.7
VIL
LOW-level input voltage
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
-
-
-
0.8
VOH
HIGH-level output voltage VI = VIH or VIL
IO = 100 µA; VCC = 1.65 V to 3.6 V
V
CC − 0.2
1.25
1.8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
IO = 6 mA; VCC = 1.65 V
IO = 12 mA; VCC = 2.3 V
IO = 18 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 18 mA; VCC = 3.0 V
IO = 24 mA; VCC = 3.0 V
1.7
2.2
2.4
2.2
VOL
LOW-level output voltage VI = VIH or VIL
IO = −100 µA; VCC = 1.65 V to 3.6 V
IO = −6 mA; VCC = 1.65 V
-
-
-
-
-
-
-
-
-
0.2
0.3
V
-
V
IO = −12 mA; VCC = 2.3 V
-
0.4
V
IO = −18 mA; VCC = 2.3 V
-
0.6
V
IO = −12 mA; VCC = 2.7 V
-
0.4
V
IO = −18 mA; VCC = 3.0 V
-
-
0.4
V
IO = −24 mA; VCC = 3.0 V
0.55
±10.0
V
[2]
IOZ
OFF-state output current VI = VIH or VIL; VO = VCC or GND;
±0.1
µA
V
CC = 3.6 V
VI = VCC or GND; VCC = 3.6 V
power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V
supply current VI = VCC or GND; IO = 0 A;
CC = 3.6 V
II
input leakage current
-
-
-
±0.1
±0.1
0.2
±5.0
±10.0
10
µA
µA
µA
IOFF
ICC
V
∆ICC
additional supply current per input pin; VCC = 3.0 V to 3.6 V;
-
5
750
µA
VI = VCC − 0.6 V; IO = 0 A;
CI
input capacitance
-
-
3.5
3.5
-
-
pF
pF
CI/O
input/output capacitance
[1] All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
[2] For transceivers, the parameter IOZ includes the input leakage current.
74ALVC245_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 7 January 2008
5 of 14
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7.
Symbol
Parameter
Conditions
−40 °C to +85 °C
Unit
Min
Typ[1]
Max
[2]
[2]
[2]
[3]
tpd
propagation delay An to Bn; Bn to An; see Figure 5
VCC = 1.65 V to 1.95 V
1.0
1.0
1.0
1.0
2.7
2.1
3.0
2.3
6.0
3.5
3.6
3.4
ns
ns
ns
ns
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
ten
enable time
disable time
OE to An; OE to Bn; see Figure 6
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.0
1.0
1.0
1.0
4.0
3.0
2.6
2.9
8.6
6.0
6.3
5.5
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
OE to An; OE to Bn; see Figure 6
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
tdis
1.0
1.0
1.0
1.0
4.4
2.3
3.3
3.2
8.0
4.8
5.3
5.5
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
CPD
power dissipation per buffer; VI = GND to VCC; VCC = 3.3 V
capacitance
outputs enabled
-
-
25
1
-
-
pF
pF
outputs disabled
[1] All typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V and 3.3 V.
[2] tpd is the same as tPLH and tPHL
ten is the same as tPZL and tPZH
tdis is the same as tPLZ and tPHZ
.
.
.
[3] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
74ALVC245_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 7 January 2008
6 of 14
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
11. Waveforms
V
I
An, Bn input
GND
V
M
V
M
t
t
PLH
PHL
V
OH
V
V
M
Bn, An output
M
V
OL
mna176
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5. Propagation delay input (An, Bn) to output (Bn, An)
V
I
OE input
V
M
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
mna367
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. Enable and disable times
Table 8.
Measurement points
Supply voltage
VCC
Input
VI
Output
VM
VM
VX
VY
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VCC
VCC
2.7 V
2.7 V
0.5 × VCC
0.5 × VCC
1.5 V
0.5 × VCC
0.5 × VCC
1.5 V
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
V
V
V
V
OH − 0.15 V
OH − 0.15 V
OH − 0.3 V
OH − 0.3 V
3.0 V to 3.6 V
1.5 V
1.5 V
74ALVC245_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 7 January 2008
7 of 14
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
V
CC
R
L
V
V
O
I
G
DUT
R
T
C
L
R
L
001aae331
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistor
Fig 7. Load circuitry for switching times
Table 9.
Test data
Supply voltage
VCC
Input
VI
Load
CL
VEXT
tr, tf
RL
tPLH, tPHL
open
tPLZ, tPZL
2 × VCC
2 × VCC
6 V
tPHZ, tPZH
GND
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VCC
VCC
2.7 V
2.7 V
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
30 pF
30 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
open
GND
open
GND
3.0 V to 3.6 V
open
6 V
GND
74ALVC245_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 7 January 2008
8 of 14
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
12. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
H
E
v
M
A
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
mm
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
2.65
0.1
0.25
0.01
1.27
0.05
1.4
0.25
0.01
0.25
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.51
0.014 0.009 0.49
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT163-1
075E04
MS-013
Fig 8. Package outline SOT163-1 (SO20)
74ALVC245_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 7 January 2008
9 of 14
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
D
E
A
X
c
H
v
M
A
y
E
Z
11
20
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
1
10
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
6.6
6.4
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.5
0.2
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT360-1
MO-153
Fig 9. Package outline SOT360-1 (TSSOP20)
74ALVC245_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 7 January 2008
10 of 14
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 x 4.5 x 0.85 mm
SOT764-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
9
L
1
10
E
h
e
20
11
19
12
D
h
X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
b
c
E
e
e
1
y
D
D
E
L
v
w
y
1
1
h
h
max.
0.05 0.30
0.00 0.18
4.6
4.4
3.15
2.85
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
3.5
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT764-1
- - -
MO-241
- - -
Fig 10. Package outline SOT764-1 (DHVQFN20)
74ALVC245_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 7 January 2008
11 of 14
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
13. Abbreviations
Table 10. Abbreviations
Acronym
CDM
CMOS
DUT
Description
Charged Device Model
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 11. Revision history
Document ID
74ALVC245_2
Modifications:
Release date
20080107
Data sheet status
Change notice
Supersedes
Product data sheet
74ALVC245_1
• The format of this data sheet has been redesigned to comply with the new identity guidelines of
NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Section 3: DHVQFN20 package added.
• Section 7: derating values added for DHVQFN20 package.
• Section 12: outline drawing added for DHVQFN20 package.
74ALVC245_1
20030710
Product specification
-
-
74ALVC245_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 7 January 2008
12 of 14
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of an NXP Semiconductors product can reasonably be expected
15.2 Definitions
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
15.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
16. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
74ALVC245_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 7 January 2008
13 of 14
74ALVC245
NXP Semiconductors
Octal bus transceiver; 3-state
17. Contents
1
2
3
4
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
7
8
9
10
11
12
13
14
15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15.1
15.2
15.3
15.4
16
17
Contact information. . . . . . . . . . . . . . . . . . . . . 13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 7 January 2008
Document identifier: 74ALVC245_2
相关型号：
74ALVC245D-T
Octal bus transceiver; 3-state - Description: 2.5/3.3V Octal Transceiver with Direction Pin, Non-Inverting (3-State) ; Logic switching levels: TTL ; Number of pins: 20 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.3@3.3V ns; Voltage: 1.65-3.6
NXP
74ALVC245MTCX_NL
Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs
FAIRCHILD
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