74ALVCHT16835 [NXP]

18-bit registered driver (3-State); 18位注册的驱动程序(三态)
74ALVCHT16835
型号: 74ALVCHT16835
厂家: NXP    NXP
描述:

18-bit registered driver (3-State)
18位注册的驱动程序(三态)

驱动
文件: 总12页 (文件大小:93K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
74ALVCHT16835  
18-bit registered driver (3-State)  
Product data  
2002 Jun 05  
Philips  
Semiconductors  
Philips Semiconductors  
Product data  
74ALVCHT16835  
18-bit registered driver (3-State)  
FEATURES  
PIN CONFIGURATION  
Wide supply voltage range of 2.3 V to 3.6 V  
NC  
NC  
1
2
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
GND  
NC  
Complies with JEDEC standard no. 8-1A.  
CMOS low power consumption  
Direct interface with TTL levels  
Current drive ± 24 mA at 3.0 V  
Y
3
A
1
1
GND  
4
GND  
Y
2
5
A
2
Y
6
A
V
A
A
A
3
3
TM  
MULTIBYTE flow-through standard pin-out architecture  
V
7
CC  
CC  
4
Low inductance multiple V and GND pins for minimum noise  
CC  
Y
Y
Y
8
4
5
6
and ground bounce  
9
5
Output drive capability 50 transmission lines @ 85 °C  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
6
ESD protection exceeds 1500 V HBM per JESD22-A114, A115  
GND  
GND  
and 1000 V CDM per JESD22-C101  
Y
Y
Y
A
A
A
A
A
A
7
8
9
7
8
Bus hold on data inputs eliminates the need for external  
pullup/pulldown resistors  
9
Y
10  
10  
11  
12  
Y
11  
12  
DESCRIPTION  
Y
The 74ALVCHT16835 is a 18-bit registered driver. Data flow is  
controlled by active low output enable (OE), active high latch enable  
(LE) and clock inputs (CP).  
GND  
GND  
Y
Y
Y
A
A
A
V
A
A
13  
14  
15  
13  
14  
15  
CC  
16  
17  
When LE is HIGH, the A to Y data flow is transparent. When LE is  
LOW and CP is held at LOW or HIGH, the data is latched; on the  
LOW to HIGH transient of CP the A-data is stored in the  
latch/flip-flop.  
V
CC  
Y
16  
17  
Y
When OE is LOW the outputs are active. When OE is HIGH, the  
outputs go to the high impedance OFF-state. Operation of the OE  
input does not affect the state of the latch/flip-flop.  
GND  
GND  
Y
A
18  
18  
OE  
LE  
CP  
To ensure the high-impedance state during power up or power  
down, OE should be tied to V through a pullup resistor; the  
GND  
CC  
minimum value of the resistor is determined by the current-sinking  
capability of the driver.  
SH00188  
QUICK REFERENCE DATA  
GND = 0 V; T  
= 25 °C; t = t 2.5 ns  
amb  
r f  
SYMBOL  
PARAMETER  
CONDITIONS  
TYPICAL  
UNIT  
Propagation delay  
An to Yn;  
LE to Yn;  
2.3  
2.7  
2.2  
t
f
/t  
V
V
= 3.3 V, C = 50 pF  
ns  
PHL PLH  
CC  
L
CP to Yn  
Maximum clock frequency  
Input capacitance  
= 3.3 V, C = 50 pF  
350  
4.0  
8.0  
MHz  
pF  
max  
CC  
L
C
C
I
Input/Output capacitance  
pF  
I/O  
transparent mode  
Output enabled  
Output disabled  
13  
3
1
C
Power dissipation capacitance per buffer  
V = GND to V  
I CC  
pF  
PD  
Clocked mode  
Output enabled  
Output disabled  
22  
15  
NOTES:  
1. C is used to determine the dynamic power dissipation (P in µW):  
PD  
D
2
2
P
= C × V  
× f + S (C × V  
× f ) where: f = input frequency in MHz; C = output load capacitance in pF;  
CC o i L  
D
PD  
CC  
i
L
2
f = output frequency in MHz; V = supply voltage in V; S (C × V  
o
× f ) = sum of outputs.  
o
CC  
L
CC  
2
2002 Jun 05  
853-2350 28376  
Philips Semiconductors  
Product data  
74ALVCHT16835  
18-bit registered driver (3-State)  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE  
RANGE  
DRAWING  
NUMBER  
ORDER CODE  
56-Pin Plastic TSSOP (TVSOP), 0.4 mm pitch  
–40 to +85 °C  
74ALVCHT16835DGV  
SOT481-2  
PIN DESCRIPTION  
LOGIC SYMBOL  
PIN NUMBER  
SYMBOL NAME AND FUNCTION  
1, 2, 55  
NC  
No connection  
OE  
CP  
LE  
3, 5, 6, 8, 9, 10, 12, 13,  
14, 15, 16, 17, 19, 20,  
21, 23, 24, 26  
Y to Y  
Data outputs  
1
18  
4, 11, 18, 25, 29, 32, 39,  
46, 53, 56  
GND  
Ground (0 V)  
7, 22, 35, 50  
27  
V
CC  
Positive supply voltage  
Output enable input  
(active LOW)  
OE  
28  
30  
LE  
Latch enable input  
Clock input  
CP  
54, 52, 51, 49, 48, 47,  
45, 44, 43, 42, 41, 40,  
38, 37, 36, 34, 33, 31  
A to A  
1
Data inputs  
18  
A
D
1
Y
1
LE  
CP  
TO THE 17 OTHER CHANNELS  
SH00203  
3
2002 Jun 05  
Philips Semiconductors  
Product data  
74ALVCHT16835  
18-bit registered driver (3-State)  
LOGIC SYMBOL (IEEE/IEC)  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
A
27  
OE  
H
L
LE  
X
H
H
L
CP  
X
X
X
OE  
CP  
LE  
EN5  
3C4  
30  
28  
X
L
Z
L
G7  
L
H
L
H
L
L
3
5
54  
52  
51  
49  
48  
47  
45  
44  
43  
42  
Y
1
A
A
A
A
A
A
A
A
4D  
1, 2  
1
2
3
4
5
6
7
8
Y
2
L
L
H
X
X
H
6
Y
3
1
L
L
H
L
Y
0
0
8
Y
4
2
L
L
Y
9
Y
5
H
L
X
Z
=
=
=
=
=
HIGH voltage level  
LOW voltage level  
Don’t care  
High impedance “off” state  
LOW-to-HIGH level transition  
10  
12  
13  
14  
Y
6
Y
7
Y
8
Y
9
A
A
A
A
A
A
A
A
9
NOTES:  
15  
16  
17  
19  
20  
21  
23  
24  
25  
Y
10  
10  
11  
12  
13  
14  
15  
16  
1. Output level before the indicated steady-state input conditions  
were established, provided that CP is high before LE goes low.  
2. Output level before the indicated steady-state input conditions  
were established.  
41  
40  
38  
37  
36  
34  
33  
31  
Y
11  
8D  
5, 6  
Y
12  
Y
13  
Y
14  
Y
15  
Y
16  
Y
A
A
17  
17  
18  
Y
18  
SH00190  
4
2002 Jun 05  
Philips Semiconductors  
Product data  
74ALVCHT16835  
18-bit registered driver (3-State)  
RECOMMENDED OPERATING CONDITIONS  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
MAX  
UNIT  
DC supply voltage 2.5 V range (for max. speed  
performance @ 30 pF output load)  
2.3  
2.7  
DC supply voltage 3.3 V range (for max. speed  
performance @ 50 pF output load)  
V
V
CC  
3.0  
3.6  
3.6  
DC supply voltage (for low-voltage applications)  
DC Input voltage range  
2.3  
0
V
V
CC  
V
CC  
V
V
I
V
DC output voltage range  
0
O
T
amb  
Operating free-air temperature range  
–40  
+85  
°C  
V
CC  
V
CC  
= 2.3 to 3.0 V  
= 3.0 to 3.6 V  
0
0
20  
10  
t , t  
r
Input rise and fall times  
ns/V  
f
ABSOLUTE MAXIMUM RATINGS  
In accordance with the Absolute Maximum Rating System (IEC 134).  
Voltages are referenced to GND (ground = 0 V).  
SYMBOL  
PARAMETER  
DC supply voltage  
CONDITIONS  
RATING  
–0.5 to +4.6  
-50  
UNIT  
V
V
CC  
I
IK  
DC input diode current  
V t0  
I
mA  
1
For control pins  
–0.5 to +4.6  
V
DC input voltage  
V
I
1
For data inputs  
uV or V t 0  
–0.5 to V +0.5  
CC  
I
DC output diode current  
DC output voltage  
V
O
"50  
mA  
V
OK  
CC  
O
V
O
Note 1  
= 0 to V  
CC  
–0.5 to V +0.5  
CC  
I
O
DC output source or sink current  
V
O
"50  
"100  
mA  
mA  
°C  
I
, I  
DC V or GND current  
GND CC  
CC  
T
stg  
Storage temperature range  
–65 to +150  
Power dissipation per package  
-plastic thin-medium-shrink (TSSOP)  
For temperature range: –40 to +125 °C  
above +55°C derate linearly with 8 mW/K  
P
TOT  
600  
93  
mW  
Θ
Package thermal impedance  
See Note 2  
°C/W  
JA  
NOTE:  
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The package thermal impedance is calculated in accordance with JESD 51.  
5
2002 Jun 05  
Philips Semiconductors  
Product data  
74ALVCHT16835  
18-bit registered driver (3-State)  
DC ELECTRICAL CHARACTERISTICS  
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).  
LIMITS  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
Temp = –40 to +85 °C  
UNIT  
1
MIN  
TYP  
1.2  
1.5  
1.2  
1.5  
MAX  
V
V
V
V
V
= 2.3 to 2.7 V  
1.7  
2.0  
CC  
CC  
CC  
CC  
CC  
V
HIGH level Input voltage  
LOW level Input voltage  
V
V
IH  
= 2.7 to 3.6 V  
= 2.3 to 2.7 V  
= 2.7 to 3.6 V  
0.7  
0.8  
V
IL  
= 2.3 to 3.6 V; V = V or V ;  
= –100 µA  
I
IH  
IL  
V
CC  
*0.2  
V
CC  
I
O
V
V
V
V
V
V
= 2.3 V; V = V or V ; I = –6 mA  
V
V
V
V
V
*0.3  
*0.6  
*0.5  
*0.6  
*1.0  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
*0.08  
*0.26  
*0.14  
*0.09  
*0.28  
CC  
CC  
CC  
CC  
CC  
CC  
I
IH  
IL  
O
CC  
CC  
CC  
CC  
CC  
= 2.3 V; V = V or V ; I = –12 mA  
I
IH  
IL  
O
V
HIGH level output voltage  
V
OH  
= 2.7 V; V = V or V ; I = –12 mA  
I
IH  
IL  
O
= 3.0 V; V = V or V ; I = –12 mA  
I
IH  
IL  
O
O
= 3.0 V; V = V or V  
I
= –24 mA  
I
IH  
IL;  
= 2.3 to 3.6 V; V = V or V ;  
I
IH  
IL  
GND  
0.20  
V
V
I
O
= 100 µA  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2.3 V; V = V or V ; I = 6 mA  
0.07  
0.15  
0.14  
0.27  
0.40  
0.70  
0.40  
0.55  
I
IH  
IL  
O
V
LOW level output voltage  
OL  
= 2.3 V; V = V or V ; I = 12 mA  
I
IH  
IL  
O
= 2.7 V; V = V or V ; I = 12 mA  
V
I
IH  
IL  
O
O
= 3.0 V; V = V or V  
I
= 24 mA  
I
IH  
IL;  
= 2.3 V; V = 0.7 V  
45  
–45  
75  
–75  
I
= 2.3 V; V = 1.7 V  
I
= 3.0 V; V = 0.8 V  
I
µA  
I
I(hold)  
= 3.0 V; V = 2.0 V  
I
= 3.6 V; V = 0 to 3.6 V  
±500  
I
V
= 2.3 to 3.6 V;  
CC  
CC  
I
Input leakage current  
0.1  
0.1  
5
µA  
µA  
I
V = V or GND  
I
V
V
= 2.3 to 3.6 V; V = V or V ;  
I IH IL  
CC  
O
I
3-State output OFF-state current  
10  
OZ  
= V or GND  
CC  
I
Quiescent supply current  
Additional quiescent supply current  
Control inputs  
V
= 2.3 to 3.6 V; V = V or GND; I = 0  
30  
150  
3.5  
6
60  
400  
µA  
µA  
CC  
CC  
CC  
I
CC  
O
I  
V
= 2.3 V to 3.6 V; V = V – 0.6 V; I = 0  
I CC O  
CC  
V = V or GND  
I
CC  
= 3.3 V  
C
pF  
pF  
i
V
CC  
Data inputs  
V
V
= V or GND  
CC  
= 3.3 V  
O
CC  
C
Outputs  
7
o
NOTE:  
1. All typical values are at T  
= 25 °C.  
amb  
6
2002 Jun 05  
Philips Semiconductors  
Product data  
74ALVCHT16835  
18-bit registered driver (3-State)  
AC CHARACTERISTICS FOR V = 2.3 V TO 2.7 V RANGE  
CC  
GND = 0 V; t = t 2.0 ns; C = 30 pF  
r
f
L
LIMITS  
SYMBOL  
PARAMETER  
WAVEFORM  
V
CC  
= 2.3 to 2.7 V  
UNIT  
1
MIN  
TYP  
MAX  
Propagation delay  
An to Yn  
1, 7  
2, 7  
4, 7  
6, 7  
6, 7  
1.3  
3.0  
3.6  
3.0  
3.7  
2.5  
4.7  
Propagation delay  
LE to Yn  
t
/t  
ns  
1.4  
1.2  
1.4  
1.0  
5.7  
4.7  
5.3  
3.7  
PHL PLH  
Propagation delay  
CP to Yn  
3-State output enable time  
OE to Yn  
t
t
/t  
ns  
ns  
PZH PZL  
3-State output disable time  
OE to Yn  
/t  
PHZ PLZ  
CP pulse width HIGH or LOW  
LE pulse width HIGH  
Set-up time An to CP  
Set-up time An to LE  
Hold time An to CP  
4, 7  
2, 7  
5, 7  
3, 7  
5, 7  
3, 7  
3.3  
3.3  
0.1  
0.7  
0.4  
0.1  
0.5  
t
ns  
ns  
ns  
W
t
SU  
t
h
Hold time An to LE  
t
sk  
Output skew  
ns  
f
Maximum clock pulse frequency  
4, 7  
150  
MHz  
max  
NOTE:  
1. All typical values are at V = 2.5 V and T  
= 25 °C.  
CC  
amb  
2. Output skew is not production tested  
AC CHARACTERISTICS FOR V = 3.0 V TO 3.6 V RANGE AND V = 2.7 V  
CC  
CC  
GND = 0 V; t = t 2.5 ns; C = 50 pF  
r
f
L
LIMITS  
LIMITS  
SYMBOL  
PARAMETER  
WAVEFORM  
V
CC  
= 3.3 ± 0.3 V  
V
CC  
= 2.7 V  
UNIT  
1, 2  
1
MIN  
TYP  
MAX  
MIN  
TYP  
MAX  
Propagation delay  
An to Yn  
1, 7  
2, 7  
4, 7  
6, 7  
6, 7  
1.2  
1.3  
1.0  
1.0  
1.0  
2.3  
3.6  
4.2  
3.7  
3.8  
3.7  
1.3  
2.7  
3.0  
2.3  
2.4  
2.5  
3.8  
Propagation delay  
LE to Yn  
t
/t  
ns  
2.7  
2.2  
2.3  
2.5  
1.4  
1.2  
1.4  
1.0  
4.9  
3.7  
4.2  
3.7  
PHL PLH  
Propagation delay  
CP to Yn  
3-State output enable time  
OE to Yn  
t
t
/t  
ns  
ns  
PZH PZL  
3-State output disable time  
OE to Yn  
/t  
PHZ PLZ  
CP pulse width HIGH or LOW  
LE pulse width HIGH  
Set-up time An to CP  
Set-up time An to LE  
Hold time An to CP  
4, 7  
2, 7  
5, 7  
3, 7  
5, 7  
3, 7  
2.0  
2.0  
0.1  
0.5  
0.4  
0.1  
2.0  
2.0  
0
0.5  
t
ns  
ns  
ns  
W
t
SU  
0
0.5  
0.25  
0.3  
0.4  
t
h
Hold time An to LE  
3
t
sk  
Output skew  
ns  
f
Maximum clock pulse frequency  
4, 7  
150  
150  
MHz  
max  
NOTES:  
1. All typical values are measured T  
= 25 °C.  
amb  
2. Typical value is measured at V = 3.3 V  
CC  
3. Output skew is not production tested  
7
2002 Jun 05  
Philips Semiconductors  
Product data  
74ALVCHT16835  
18-bit registered driver (3-State)  
AC WAVEFORMS FOR V = 3.0 V TO 3.6 V AND  
CC  
1/f  
MAX  
V
= 2.7 V RANGE  
CC  
V
I
V
V
V
V
= 1.5 V  
M
X
Y
V
V
M
= V + 0.3 V  
M
CP INPUT  
GND  
OL  
= V – 0.3 V  
OH  
t
W
and V are the typical output voltage drop that occur with the  
OL  
OH  
t
t
PLH  
PHL  
output load.  
V = 2.7 V  
I
V
OH  
V
Yn OUTPUT  
M
AC WAVEFORMS FOR V = 2.3 V TO 2.7 V AND  
CC  
V
OL  
V
< 2.3 V RANGE  
CC  
NOTE: V = 0.5V at V = 2.3 to 2.7 V  
M
CC  
CC  
SH00135  
V
V
V
V
= 0.5 V  
M
CC  
Waveform 4. The clock (CP) to Yn propagation delays,  
the clock pulse width and the maximum clock frequency.  
= V + 0.15 V  
X
OL  
= V – 0.15 V  
Y
OH  
and V are the typical output voltage drop that occur with the  
OL  
OH  
output load.  
V = V  
I
CC  
V
I
V
CP INPUT  
M
V
I
GND  
A
n
t
su  
V
t
su  
M
INPUT  
t
h
t
h
GND  
V
I
t
t
PLH  
PHL  
An INPUT  
V
Y
OH  
n
GND  
V
M
OUTPUT  
V
OH  
V
V
M
Yn OUTPUT  
OL  
NOTE: V = 0.5V at V = 2.3 to 2.7 V  
M
CC  
CC  
SH00132  
V
OL  
Waveform 1. Input (An) to output (Yn) propagation delay  
NOTE: The shaded areas indicate when the input is permitted to change  
for predictable output performance.  
V
= 0.5V at V = 2.3 to 2.7 V  
M
CC CC  
SH00136  
V
I
Waveform 5. Data set-up and hold times for the An input to the  
clock CP input  
V
V
M
M
LE INPUT  
GND  
t
W
t
t
PLH  
PHL  
V
I
V
OH  
V
nOE INPUT  
GND  
M
V
M
Yn OUTPUT  
V
OL  
NOTE: V = 0.5V at V = 2.3 to 2.7V  
M
CC  
CC  
SH00134  
t
t
PZL  
PLZ  
Waveform 2. Latch enable input (LE) pulse width,  
V
CC  
the latch enable input to output (Yn) propagation delays.  
OUTPUT  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
V
I
An  
INPUT  
V
M
t
t
PZH  
PHZ  
GND  
V
OH  
th  
th  
OUTPUT  
HIGH-to-OFF  
OFF-to-HIGH  
V
Y
t
t
SU  
SU  
V
M
V
I
LE  
INPUT  
V
M
GND  
outputs  
enabled  
outputs  
disabled  
outputs  
enabled  
GND  
NOTE: V = 0.5V at V = 2.3 to 2.7 V  
NOTE: The shaded areas indicate when the input is permitted to change  
M
CC  
CC  
SH00137  
for predictable output performance.  
V
= 0.5V at V = 2.3 to 2.7V  
CC CC  
Waveform 6. 3-State enable and disable times  
M
SH00133  
Waveform 3. Data set-up and hold times for the An input to the  
LE input  
8
2002 Jun 05  
Philips Semiconductors  
Product data  
74ALVCHT16835  
18-bit registered driver (3-State)  
TEST CIRCUIT  
S
1
2 * V  
V
CC  
CC  
Open  
GND  
R
R
= 500  
= 500 Ω  
L
L
V
V
O
I
PULSE  
GENERATOR  
D.U.T.  
R
T
C
L
Test Circuit for switching times  
DEFINITIONS  
R
L
C
L
R
T
= Load resistor  
= Load capacitance includes jig and probe capacitance  
= Termination resistance should be equal to Z of pulse generators.  
OUT  
SWITCH POSITION  
TEST  
S
V
V
I
1
CC  
t
t
Open  
< 2.7V  
V
CC  
PLH/ PHL  
t
t
t
2.7–3.6V  
2.7V  
PLZ/ PZL  
2 < V  
CC  
t
GND  
PHZ/ PZH  
SV00906  
Waveform 7. Load circuitry for switching times  
9
2002 Jun 05  
Philips Semiconductors  
Product data  
74ALVCHT16835  
18-bit registered driver (3-State)  
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 4.4 mm  
SOT481–2  
E
A
D
X
c
y
H
E
v
M
A
Z
29  
56  
A
(A )  
3
2
A
A
1
pin 1 index  
θ
L
p
L
detail X  
1
28  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
UNIT  
A1  
A2  
A3  
bp  
c
D (1) E (2)  
e
HE  
L
Lp  
v
w
y
Z (1)  
θ
max.  
8o  
0o  
0.15  
0.05  
1.05  
0.80  
0.23  
0.13  
0.20  
0.09  
11.4  
11.2  
4.5  
4.3  
6.6  
6.2  
0.75  
0.45  
0.4  
0.1  
mm  
1.2  
0.4  
1
0.2  
0.07  
0.08  
0.25  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
VERSION  
EUROPEAN  
PROJECTION  
ISSUE DATE  
IEC  
JEDEC  
JEITA  
01–11–24  
SOT481–2  
– – –  
MO–194  
– – –  
10  
2002 Jun 05  
Philips Semiconductors  
Product data  
74ALVCHT16835  
18-bit registered driver (3-State)  
NOTES  
11  
2002 Jun 05  
Philips Semiconductors  
Product data  
74ALVCHT16835  
18-bit registered driver (3-State)  
Data sheet status  
Product  
status  
Definitions  
[1]  
Data sheet status  
[2]  
Objective data  
Development  
This data sheet contains data from the objective specification for product development.  
Philips Semiconductors reserves the right to change the specification in any manner without notice.  
Preliminary data  
Product data  
Qualification  
Production  
This data sheet contains data from the preliminary specification. Supplementary data will be  
published at a later date. Philips Semiconductors reserves the right to change the specification  
without notice, in order to improve the design and supply the best possible product.  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply.  
Changes will be communicated according to the Customer Product/Process Change Notification  
(CPCN) procedure SNW-SQ-650A.  
[1] Please consult the most recently issued data sheet before initiating or completing a design.  
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL  
http://www.semiconductors.philips.com.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Koninklijke Philips Electronics N.V. 2002  
Contact information  
All rights reserved. Printed in U.S.A.  
For additional information please visit  
http://www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
Date of release: 06-02  
9397 750 09943  
For sales offices addresses send e-mail to:  
sales.addresses@www.semiconductors.philips.com.  
Document order number:  
Philips  
Semiconductors  

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