74AVCM162836DG [NXP]

IC AVC SERIES, 20-BIT DRIVER, TRUE OUTPUT, PDSO56, 6.10 MM, PLASTIC, MO-153, SOT-364-1, TSSOP2-56, Bus Driver/Transceiver;
74AVCM162836DG
型号: 74AVCM162836DG
厂家: NXP    NXP
描述:

IC AVC SERIES, 20-BIT DRIVER, TRUE OUTPUT, PDSO56, 6.10 MM, PLASTIC, MO-153, SOT-364-1, TSSOP2-56, Bus Driver/Transceiver

驱动 光电二极管 输出元件 逻辑集成电路
文件: 总10页 (文件大小:91K)
中文:  中文翻译
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INTEGRATED CIRCUITS  
74AVCM162836  
20-bit registered driver with inverted  
register enable and 15 termination  
resistors (3-State)  
Product specification  
2001 Apr 20  
File under Integrated Circuits ICL03  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
20-bit registered driver with inverted register enable  
and 15 termination resistors (3-State)  
74AVCM162836  
FEATURES  
PIN CONFIGURATION  
Wide supply voltage range of 1.2 V to 3.6 V  
OE  
1
2
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
CP  
Complies with JEDEC standard no. 8-1A/5/7.  
CMOS low power consumption  
Y
Y
A
A
0
1
0
1
3
Input/output tolerant up to 3.6 V  
GND  
4
GND  
Y
2
5
A
2
Low inductance multiple V and GND pins for minimum noise  
CC  
and ground bounce  
Y
6
A
V
A
A
A
3
3
V
7
CC  
CC  
4
Integrated 15 termination resistors to minimize output overshoot  
Y
Y
Y
8
4
5
6
and undershoot  
9
5
Full PC133 solution provided when used with PCK2510S and  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
6
CBT16292  
GND  
GND  
Y
Y
Y
A
A
A
A
A
A
7
8
9
7
DESCRIPTION  
8
The 74AVCM162836 is a 20-bit universal bus driver. Data flow is  
controlled by output enable (OE), latch enable (LE) and clock inputs  
(CP).  
9
Y
10  
10  
11  
12  
Y
11  
12  
This product is designed to have an extremely fast propagation  
delay and a minimum amount of power consumption.  
Y
GND  
GND  
To ensure the high-impedance state during power up or power  
Y
Y
Y
A
A
A
V
A
A
13  
14  
15  
13  
14  
15  
CC  
16  
17  
down, OE should be tied to V through a pullup resistor (Live  
CC  
Insertion).  
V
CC  
Y
16  
17  
Y
GND  
GND  
Y
Y
A
A
18  
19  
18  
19  
NC  
LE  
SH00159  
QUICK REFERENCE DATA  
GND = 0 V; T  
= 25 °C; t = t 2.0 ns; C = 30 pF.  
amb  
r
f
L
SYMBOL  
PARAMETER  
CONDITIONS  
TYPICAL  
UNIT  
V
V
V
= 1.8 V  
= 2.5 V  
= 3.3 V  
2.6  
2.0  
1.7  
CC  
CC  
CC  
Propagation delay  
An to Yn  
t
t
/t  
ns  
PHL PLH  
Propagation delay  
LE to Yn;  
CP to Yn  
V
CC  
V
CC  
V
CC  
= 1.8 V  
= 2.5 V  
= 3.3 V  
3.0  
2.4  
2.0  
/t  
ns  
PHL PLH  
C
C
Input capacitance  
5.0  
25  
6
pF  
pF  
I
Outputs enabled  
Output disabled  
1
Power dissipation capacitance per buffer  
V = GND to V  
I CC  
PD  
NOTES:  
1. C is used to determine the dynamic power dissipation (P in µW):  
PD  
D
2
2
P
= C × V  
× f + S (C × V  
× f ) where: f = input frequency in MHz; C = output load capacitance in pF;  
CC o i L  
D
PD  
CC  
i
L
2
f = output frequency in MHz; V = supply voltage in V; S (C × V  
o
× f ) = sum of outputs.  
o
CC  
L
CC  
ORDERING INFORMATION  
TEMPERATURE  
RANGE  
DRAWING  
NUMBER  
PACKAGES  
ORDER CODE  
74AVCM162836DGG  
56-Pin Plastic Thin Shrink Small Outline (TSSOP) Type II  
–40°C to +85°C  
SOT364-1  
2
2001 Apr 20  
853-2175 26096  
Philips Semiconductors  
Product specification  
20-bit registered driver with inverted register enable  
and 15 termination resistors (3-State)  
74AVCM162836  
PIN DESCRIPTION  
LOGIC SYMBOL (IEEE/IEC)  
PIN NUMBER  
SYMBOL NAME AND FUNCTION  
1
56  
29  
OE  
CP  
LE  
EN1  
2C3  
28  
NC  
No connection  
2, 3, 5, 6, 8, 9, 10, 12,  
13, 14, 15, 16, 17, 19,  
20, 21, 23, 24, 26, 27  
C3  
G2  
Y to Y  
Data outputs  
0
19  
55  
4, 11, 18, 25, 32, 35, 39,  
46, 53  
2
3
Y
0
A
0
GND  
Ground (0V)  
54  
Y
Y
Y
Y
Y
Y
Y
Y
Y
A
A
A
A
A
A
A
A
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
52  
51  
49  
48  
47  
45  
44  
43  
42  
5
7, 22, 35, 50  
1
V
Positive supply voltage  
CC  
6
1
1
3D  
Output enable input  
(active LOW)  
OE  
8
9
Latch enable input  
(active LOW)  
29  
56  
LE  
10  
12  
13  
CP  
Clock input  
55, 54, 52, 51, 49, 48,  
47, 45, 44, 43, 42, 41,  
40, 38, 37, 36, 34, 33,  
31, 30  
14  
15  
16  
17  
19  
20  
21  
23  
A
A
A
A
A
A
A
A
A
A
A
9
A to A  
0
Data inputs  
19  
Y
10  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
41  
40  
38  
37  
36  
34  
33  
31  
30  
Y
11  
12  
13  
14  
15  
16  
17  
18  
19  
Y
Y
Y
Y
Y
Y
Y
Y
LOGIC SYMBOL  
OE  
CP  
24  
26  
27  
LE  
SH00160  
A
0
D
Y
0
LE  
FUNCTION TABLE  
CP  
INPUTS  
OUTPUTS  
OE  
H
L
LE  
X
CP  
X
X
X
A
X
L
Z
L
L
TO THE 19 OTHER CHANNELS  
L
L
H
L
H
L
L
H
H
H
H
SH00163  
L
H
X
X
H
1
L
H
L
Y
0
Y
0
2
L
H
L
X
Z
=
=
=
=
=
HIGH voltage level  
LOW voltage level  
Don’t care  
High impedance “off” state  
LOW-to-HIGH level transition  
NOTES:  
1. Output level before the indicated steady-state input conditions  
were established, provided that CP is high before LE goes low.  
2. Output level before the indicated steady-state input conditions  
were established.  
3
2001 Apr 20  
Philips Semiconductors  
Product specification  
20-bit registered driver with inverted register enable  
and 15 termination resistors (3-State)  
74AVCM162836  
168-pin SDR SDRAM DIMM  
BACK SIDE  
FRONT SIDE  
PCK2509S or PCK2510S  
74AVCM162836 74AVCM162836 74AVCM162836  
The PLL clock distribution device and AVCM registered drivers reduce signal loads on the memory  
controller and prevent timing delays and waveform distortions that would cause unreliable operation  
SW00423  
RECOMMENDED OPERATING CONDITIONS  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
MAX  
UNIT  
1.65  
2.3  
3.0  
1.95  
2.7  
3.6  
DC supply voltage  
(according to JEDEC Low Voltage Standards)  
V
CC  
V
DC supply voltage  
(for low voltage applications)  
1.2  
3.6  
V
DC Input voltage range  
0
0
3.6  
3.6  
V
V
I
DC output voltage range; output 3-State  
V
O
DC output voltage range;  
output HIGH or LOW state  
0
V
CC  
T
amb  
Operating free-air temperature range  
–40  
+85  
°C  
V
V
V
= 1.65 to 2.3 V  
= 2.3 to 3.0 V  
= 3.0 to 3.6 V  
0
0
0
30  
20  
10  
CC  
t , t  
r
Input rise and fall times  
ns/V  
f
CC  
CC  
ABSOLUTE MAXIMUM RATINGS  
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V)  
SYMBOL  
PARAMETER  
DC supply voltage  
CONDITIONS  
RATING  
–0.5 to +4.6  
–50  
UNIT  
V
V
CC  
I
IK  
DC input diode current  
DC input voltage  
V t0  
mA  
V
I
1
V
I
For all inputs  
–0.5 to 4.6  
"50  
I
DC output diode current  
DC output voltage; output 3-State  
V
O
uV or V t 0  
mA  
V
OK  
CC  
O
V
O
Note 1  
Note 1  
–0.5 to 4.6  
DC output voltage;  
output HIGH or LOW state  
V
I
–0.5 to V +0.5  
V
O
CC  
DC output source or sink current  
V
O
= 0 to V  
CC  
mA  
mA  
°C  
"50  
"100  
O
I
, I  
DC V or GND current  
GND CC  
CC  
T
stg  
Storage temperature range  
–65 to +150  
Power dissipation per package  
–plastic thin-medium-shrink (TSSOP) above +55 °C derate linearly with 8 mW/K  
For temperature range: –40 to +125 °C  
P
TOT  
mW  
600  
NOTE:  
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
4
2001 Apr 20  
Philips Semiconductors  
Product specification  
20-bit registered driver with inverted register enable  
and 15 termination resistors (3-State)  
74AVCM162836  
DC ELECTRICAL CHARACTERISTICS  
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).  
LIMITS  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
Temp = -40°C to +85°C  
UNIT  
1
MIN  
TYP  
MAX  
V
V
V
V
V
V
V
V
V
= 1.2 V  
V
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
= 1.65 to 1.95 V  
= 2.3 to 2.7 V  
= 3.0 to 3.6 V  
= 1.2 V  
0.65V  
0.9  
1.2  
1.5  
CC  
V
HIGH level Input voltage  
V
IH  
1.7  
2.0  
GND  
= 1.65 to 1.95 V  
= 2.3 to 2.7 V  
= 3.0 to 3.6 V  
0.9  
1.2  
1.5  
0.35V  
0.7  
CC  
V
LOW level Input voltage  
HIGH level output voltage  
V
V
IL  
0.8  
= 1.65 to 3.6 V; V = V or V ;  
= –100 µA  
I
IH  
IL  
V
*0.20  
V
CC  
CC  
I
O
V
CC  
V
CC  
V
CC  
V
CC  
= 1.65 V; V = V or V ; I = –4 mA  
V
V
V
0.45  
V
V
V
0.10  
0.28  
0.32  
*
*
I
IH  
IL  
O
CC  
CC  
CC  
CC  
V
OH  
= 2.3 V; V = V or V ; I = –8 mA  
0.55  
0.70  
*
*
*
*
I
IH  
IL  
O
CC  
CC  
= 3.0 V; V = V or V ; I = –12 mA  
I
IH  
IL  
O
= 1.65 to 3.6 V; V = V or V ;  
= 100 µA  
I
IH  
IL  
GND  
0.20  
I
O
V
V
V
V
= 1.65 V; V = V or V ; I = 4 mA  
0.10  
0.26  
0.36  
0.45  
0.55  
0.70  
CC  
CC  
CC  
CC  
I
IH  
IL  
O
V
LOW level output voltage  
Input leakage current  
V
OL  
= 2.3 V; V = V or V ; I = 8 mA  
I
IH  
IL  
O
= 3.0 V; V = V or V ; I = 12 mA  
I
IH  
IL  
O
= 1.65 to 3.6 V;  
CC  
I
0.1  
2.5  
µA  
I
V = V or GND  
I
I
3-State output OFF-state current  
3-State output OFF-state current  
V
V
= 0 V; V or V = 3.6 V  
0.1  
0.1  
µA  
µA  
"10  
OFF  
CC  
CC  
CC  
I
O
I
/I  
= 1.65 to 3.6 V; V = V or GND  
12.5  
IHZ ILZ  
I
CC  
V
V
= 1.65 to 2.7 V; V = V or V ;  
I IH IL  
0.1  
0.1  
5
= V or GND  
O
CC  
I
3-State output OFF-state current  
Quiescent supply current  
µA  
µA  
OZ  
V
V
= 3.0 to 3.6 V; V = V or V ;  
I IH IL  
CC  
O
10  
= V or GND  
CC  
V
= 1.65 to 2.7 V; V = V or GND; I = 0  
0.1  
0.2  
20  
40  
CC  
CC  
I
CC  
O
I
CC  
V
= 3.0 to 3.6 V; V = V or GND; I = 0  
I
CC  
O
NOTE:  
1. All typical values are at T  
= 25 °C.  
amb  
5
2001 Apr 20  
Philips Semiconductors  
Product specification  
20-bit registered driver with inverted register enable  
and 15 termination resistors (3-State)  
74AVCM162836  
AC CHARACTERISTICS  
GND = 0 V; t = t 2.0 ns; C = 30 pF  
r
f
L
LIMITS  
= 2.5 ± 0.2 V  
WAVE-  
FORM  
SYMBOL  
PARAMETER  
V
CC  
= 3.3 ± 0.3 V  
V
CC  
V
CC  
= 1.8 ± 0.15 V  
V
CC  
= 1.2 V UNIT  
1
1
1
MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP  
Propagation delay An to Yn  
Propagation delay LE to Yn  
Propagation delay CP to Yn  
1, 7  
2, 7  
3, 7  
0.7  
0.7  
0.7  
1.7  
2.0  
1.9  
2.5  
2.7  
2.5  
0.8  
0.8  
0.8  
2.0  
2.4  
2.2  
3.1  
3.3  
3.0  
1.0  
1.0  
1.0  
2.6  
3.0  
2.8  
4.5  
5.0  
4.5  
5.2  
5.6  
5.2  
t
/t  
ns  
PHL PLH  
3-State output enable time OE  
to Yn  
t
t
/t  
6, 7  
6, 7  
1.0  
1.0  
2.5  
2.5  
4.5  
3.5  
1.0  
1.0  
2.8  
2.4  
4.5  
4.0  
1.5  
1.5  
3.5  
4.0  
6.5  
6.5  
5.5  
6.9  
ns  
ns  
PZH PZL  
3-State output disable time OE  
to Yn  
/t  
PHZ PLZ  
CP pulse width HIGH or LOW  
LE pulse width HIGH  
3, 7  
2, 7  
5, 7  
4, 7  
4, 7  
5, 7  
4, 7  
4, 7  
3, 7  
1.0  
1.0  
0.7  
0.5  
0.5  
0.9  
1.6  
1.4  
500  
1.2  
1.2  
0.7  
0.5  
0.5  
0.9  
1.7  
1.5  
400  
2.0  
2.0  
0.7  
0.5  
0.6  
1.0  
2.0  
1.7  
250  
t
ns  
W
Set-up time An to CP  
1.0  
0.2  
2.0  
1.5  
3.2  
2.8  
ns  
ns  
ns  
Set-up time An to LE HIGH  
Set-up time An to LE LOW  
Hold time An to CP  
t
SU  
Hold time An to LE HIGH  
Hold time An to LE LOW  
t
h
ns  
F
max  
Maximum clock pulse frequency  
MHz  
NOTES:  
1. All typical values are measured at T  
= 25 °C and at V = 1.8 V, 2.5 V, 3.3 V.  
amb  
CC  
AC WAVEFORMS FOR V = 3.0 V TO 3.6 V RANGE  
CC  
V
V
V
V
= 0.5 V  
M
X
Y
CC  
= V + 0.300 V  
V
I
OL  
= V – 0.300 V  
OH  
V
V
M
M
LE INPUT  
GND  
and V are the typical output voltage drop that occur with the  
OL  
OH  
output load.  
V = V  
t
W
I
CC  
t
t
PLH  
PHL  
V
OH  
AC WAVEFORMS FOR V = 2.3 V TO 2.7 V AND  
CC  
V
M
Yn OUTPUT  
V
< 2.3 V RANGE  
CC  
V
V
= 0.5 V  
OL  
M
X
CC  
V
V
V
= V + 0.15 V  
NOTE: V = 0.5 V at V = 2.3 to 2.7 V  
OL  
M
CC  
CC  
= V – 0.15 V  
SH00165  
Y
OH  
and V are the typical output voltage drop that occur with the  
OL  
OH  
Waveform 2. Latch enable input (LE) pulse width, the latch  
enable input to output (Yn) propagation delays.  
output load.  
V = V  
I
CC  
V
I
A
n
V
M
INPUT  
GND  
t
t
PLH  
PHL  
V
Y
OH  
n
V
M
OUTPUT  
V
OL  
NOTE: V = 0.5V at V = 2.3 to 2.7 V  
M
CC  
CC  
SH00132  
Waveform 1. Input (An) to output (Yn) propagation delay  
6
2001 Apr 20  
Philips Semiconductors  
Product specification  
20-bit registered driver with inverted register enable  
and 15 termination resistors (3-State)  
74AVCM162836  
AC WAVEFORMS FOR V = 3.0 V TO 3.6 V RANGE  
CC  
(Continued)  
V
V
V
V
= 0.5 V  
M
X
Y
CC  
V
I
= V + 0.300V  
OL  
= V – 0.300V  
V
CP INPUT  
M
OH  
and V are the typical output voltage drop that occur with the  
OL  
OH  
GND  
output load.  
V = V  
t
su  
I
CC  
t
su  
t
h
t
h
AC WAVEFORMS FOR V = 2.3 V TO 2.7 V AND  
CC  
V
I
V
< 2.3V RANGE (Continued)  
CC  
An INPUT  
V
V
V
V
= 0.5 V  
M
X
Y
OL  
CC  
GND  
= V + 0.15V  
OL  
= V – 0.15V  
OH  
V
OH  
and V are the typical output voltage drop that occur with the  
OH  
V
output load.  
V = V  
M
Yn OUTPUT  
I
CC  
V
OL  
NOTE: The shaded areas indicate when the input is permitted to change  
for predictable output performance.  
V
= 0.5V at V = 2.3 to 2.7 V  
1/f  
MAX  
M
CC CC  
SH00136  
V
I
Waveform 5. Data set-up and hold times for the An input to  
the clock CP input  
V
V
M
M
CP INPUT  
GND  
t
W
t
t
PLH  
PHL  
V
I
V
OH  
V
Yn OUTPUT  
M
V
nOE INPUT  
GND  
M
V
OL  
NOTE: V = 0.5V at V = 2.3 to 2.7 V  
M
CC  
CC  
SH00135  
Waveform 3. The clock (CP) to Yn propagation delays, the  
clock pulse width and the maximum clock frequency.  
t
t
PZL  
PLZ  
V
CC  
OUTPUT  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
I
V
X
An  
INPUT  
V
M
V
OL  
GND  
t
t
PZH  
th  
th  
PHZ  
t
t
SU  
SU  
V
OH  
V
I
OUTPUT  
HIGH-to-OFF  
OFF-to-HIGH  
V
Y
LE  
INPUT  
V
M
V
M
GND  
GND  
outputs  
enabled  
outputs  
disabled  
outputs  
enabled  
NOTE: The shaded areas indicate when the input is permitted to change  
for predictable output performance.  
V
= 0.5V at V = 2.3 to 2.7 V  
M
CC CC  
NOTE: V = 0.5V at V = 2.3 to 2.7 V  
M
CC  
CC  
SH00166  
SH00137  
Waveform 6. 3-State enable and disable times  
Waveform 4. Data set-up and hold times for the An input to the  
LE input  
7
2001 Apr 20  
Philips Semiconductors  
Product specification  
20-bit registered driver with inverted register enable  
and 15 termination resistors (3-State)  
74AVCM162836  
TEST CIRCUIT  
S
1
2 * V  
V
CC  
CC  
Open  
GND  
R
R
L
L
V
V
O
I
PULSE  
GENERATOR  
D.U.T.  
R
T
C
L
Test Circuit for switching times  
DEFINITIONS  
R
L
C
L
R
T
= Load resistor  
= Load capacitance includes jig and probe capacitance  
= Termination resistance should be equal to Z of pulse generators.  
OUT  
SWITCH POSITION  
TEST  
S
V
V
R
L
1
CC  
I
t
t
Open  
< 2.3 V  
V
V
1000  
500 Ω  
500 Ω  
PLH/ PHL  
CC  
CC  
t
t
t
2.3–2.7 V  
3.0 –3.6 V  
PLZ/ PZL  
2 < V  
CC  
t
GND  
V
CC  
PHZ/ PZH  
SV01883  
Waveform 7. Load circuitry for switching times  
8
2001 Apr 20  
Philips Semiconductors  
Product specification  
20-bit registered driver with inverted register enable  
and 15 termination resistors (3-State)  
74AVCM162836  
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm  
SOT364-1  
9
2001 Apr 20  
Philips Semiconductors  
Product specification  
20-bit registered driver with inverted register enable  
and 15 termination resistors (3-State)  
74AVCM162836  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make changes at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
Production  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 2001  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
Date of release: 04-01  
Document order number:  
9397-750-08281  
Philips  
Semiconductors  

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